DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
DAKAIT	MAC	20-JAN-77 10:35		DIAGNOSTIC PARAMETERS                                                              SEQ 0011

     1					;DAKAI
     2
     3			000000			MCNVER==0
     4			000002			DECVER==2
     5
     6
     7						XLIST
     8						LIST
     9						LALL
    10
    11						NAME	\MCNVER,\DECVER^
    12
    13					TITLE	DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2
    14					^
    15
    16					;(LOGICAL SHIFT, ROTATE, ARITHMETIC SHIFT; SINGLE AND COMBINED)
    17
    18					;COPYRIGHT 1975,1977
    19					;DIGITAL EQUIPMENT CORPORATION
    20					;MARLBORO, MASS. 01752
    21
    22					;JOHN R. KIRCHOFF
    23
    24	000137					LOC	137
    25	000137	000000	000002			MCNVER,,DECVER
    26
    27						NOSYM
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 2
DAKAIT	MAC	20-JAN-77 10:35		DIAGNOSTIC PARAMETERS                                                              SEQ 0012

    28					SUBTTL	DIAGNOSTIC PARAMETERS
    29
    30					;OPERATOR DEFINITIONS
    31
    32		001000	000000		OPDEF	ER1	[1B8]
    33		002000	000000		OPDEF	ER2	[2B8]
    34		003000	000000		OPDEF	ER3	[3B8]
    35		004000	000000		OPDEF	ER4	[4B8]
    36		005000	000000		OPDEF	ER5	[5B8]
    37		006000	000000		OPDEF	ER6	[6B8]
    38		007000	000000		OPDEF	ER7	[7B8]
    39		010000	000000		OPDEF	ER10	[10B8]
    40		011000	000000		OPDEF	ER11	[11B8]
    41		012000	000000		OPDEF	ER12	[12B8]
    42		013000	000000		OPDEF	ER13	[13B8]
    43
    44			041423		LUUO1=ERRMES
    45			041423		LUUO2=ERRMES
    46			041423		LUUO3=ERRMES
    47			041423		LUUO4=ERRMES
    48			041423		LUUO5=ERRMES
    49			041423		LUUO6=ERRMES
    50			041423		LUUO7=ERRMES
    51			041423		LUUO10=ERRMES
    52			041423		LUUO11=ERRMES
    53			041423		LUUO12=ERRMES
    54			041423		LUUO13=ERRMES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 3
DAKAIT	MAC	20-JAN-77 10:35		DIAGNOSTIC PARAMETERS                                                              SEQ 0013

    55					;SUBROUTINE ASSEMBLY DEFINITIONS
    56
    57			000001		KLOLD==1
    58			000040		DEBUG=40
    59			000001		EXCASB=1
    60			000001		USRASB=1
    61			000001		KA10=1
    62			000001		PGMEND=1
    63			000001		ERDIAG=1
    64
    65					;SPECIAL FEATURE DEFINITIONS
    66
    67			030000		SADR1=BEGIN
    68			030000		SADR2=BEGIN
    69			030000		SADR3=BEGIN
    70			030000		SADR4=BEGIN
    71		254000	030000		SADR5=JRST BEGIN
    72		254000	030000		SADR6=JRST BEGIN
    73		254000	030000		SADR7=JRST BEGIN
    74		254000	030000		SADR8=JRST BEGIN
    75		254000	030000		SADR9=JRST BEGIN
    76		254000	030000		SADR10=JRST BEGIN
    77		254000	030000		SADR11=JRST BEGIN
    78
    79					;SPECIAL FEATURE PARAMETERS
    80
    81			000000		PAREA0=0
    82			000000		PAREA1=0
    83			000000		PAREA2=0
    84		444153	415100		PAREA3=SIXBIT/DAKAI/
    85		645560	000000		PAREA4=SIXBIT/TMP/
    86			000000		PAREA5=0
    87			000000		PAREA6=0
    88			001000		ITERAT==1000
    89
    90					;MACROS
    91
    92					DEFINE	SAVEAC	(A,B)<
    93						MOVEI	AC+2,.		;SAVE TEST PC
    94						MOVEM	AC+2,TESTPC
    95						MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
    96						MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION>
    97
    98					DEFINE	SETACS	(WW,XX)<
    99						MOVEI	AC-1,WW		;SETUP AC-1
   100						HRLI	AC-1,WW		;FOR COMPARISION
   101						MOVE	AC-2,<AC-1>&17	;SETUP AC-2 FOR COMPARISON
   102						MOVEI	AC,XX		;SETUP AC RIGHT
   103						HRLI	AC,XX		;SETUP AC LEFT
   104						MOVEM	AC,<AC+1>&17	;SETUP AC2>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 4
DAKAIT	MAC	20-JAN-77 10:35		DIAGNOSTIC PARAMETERS                                                              SEQ 0014

   105					;USER DEFINED MACROS
   106
   107					DEFINE	SR1	(T,D1A,D1B,R1A,R1B,OP,S)<
   108					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD D1A,D1B] S BIT
   109					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD R1A,R1B]
   110					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
   111
   112					E'T'00:	MOVE	AC,[XWD D1A,D1B]	;INITIALIZE AC
   113						MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
   114						OP	AC,S			;*SHIFT/ROTATE S BIT POSITIONS
   115						CAME	AC,[XWD R1A,R1B]	;IS RESULT IN AC CORRECT?
   116						ER3	AC,T'01			;RESULT IN AC IS INCORRECT
   117						CAME	AC+1,[XWD 741703,607417]
   118						ER4	AC+1,T'01		;C(AC+1) WAS MODIFIED INCORRECTLY
   119						JUMPL	AC+2,E'T'00		;LOOP ON ERROR SWITCH>
   120
   121
   122					DEFINE	SR2	(T,D1A,D1B,D2A,D2B,R1A,R1B,R2A,R2B,OP,S)<
   123					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
   124					;DATA SPECIFIED IN [XWD D1A,D1B] AND [XWD D2A,D2B] S BIT POSITIONS AND
   125					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD R1A,R1B] AND
   126					;[XWD R2A,R2B]
   127
   128					E'T'00:	MOVE	AC,[XWD D1A,D1B]	;INITIALIZE AC
   129						MOVE	AC+1,[XWD D2A,D2B]	;INITIALIZE AC+1
   130						OP	AC,S			;*SHIFT/ROTATE COMBINED S PLACES
   131						CAME	AC,[XWD R1A,R1B]	;IS RESULT IN AC CORRECT?
   132						ER3	AC,T'01			;RESULT IN AC IS INCORRECT
   133						CAME	AC+1,[XWD R2A,R2B]	;IS RESULT IN AC+1 CORRECT?
   134						ER4	AC+1,T'01		;RESULT IN AC+1 IS INCORRECT
   135						JUMPL	AC+2,E'T'00		;LOOP ON ERROR SWITCH>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
PARAM	KLM	18-JAN-77 11:38		*PARAM*	CONSOLE DATA SWITCH ASSIGNMENTS, JAN 18,1977                               SEQ 0015

   136					SUBTTL	*PARAM*	CONSOLE DATA SWITCH ASSIGNMENTS, JAN 18,1977
   137
   138					DEFINE	S,<;*********************************************************************>
   139
   140					S^;*********************************************************************^
   141					;*DATA SWITCHES (READ FROM CONSOLE IN EXEC MODE OR TYPED IN IN USER MODE)
   142					;*LEFT HALF SWITCHES ARE PRE-ASSIGNED FOR SUBROUTINE PACKAGE USE
   143					;*AND CONTROL LOOPING, PRINTING (TTY OR OTHER DEVICE) AND MISC. FUNCTIONS
   144					S^;*********************************************************************^
   145
   146			400000		ABORT==	400000			;ABORT PROGRAM ON PASS COMPLETION
   147			200000		RSTART==200000			;RESTART TEST, PRINT TOTALS
   148			100000		TOTALS==100000			;PRINT TOTALS, CONTINUE
   149
   150			040000		NOPNT==	040000			;INHIBIT ALL PRINT/TYPE OUT (EXCEPT FORCED)
   151			020000		PNTLPT==020000			;PRINT ALL DATA ON LPT (LOGICAL DEVICE, USER MODE)
   152			010000		DING==	010000			;RING BELL ON ERROR
   153
   154			004000		LOOPER==004000			;ENTER EXERCISE/CHECK LOOP ON ERROR
   155			002000		ERSTOP==002000			;HALT ON TEST ERROR
   156			001000		PALERS==001000			;PRINT ALL ERRORS
   157
   158			000400		RELIAB==000400			;RELIABILITY MODE
   159			000200		TXTINH==000200			;INHIBIT ERROR TEXT
   160			000100		INHPAG==000100			;INHIBIT PAGING
   161
   162			000040		MODDVC==000040			;MODIFY DEVICE CODE
   163			000020		INHCSH==000020			;INHIBIT CACHE
   164			000010		OPRSEL==000010			;OPERATOR SELECTION
   165
   166			000004		CHAIN==	000004			;CHAIN CONTROL SWITCH
   167
   168			000002		KAHZ50==000002			;KA10 50 HERTZ POWER
   169
   170									;SWITCH 17 RESERVED !!!
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 2
PARAM	KLM	18-JAN-77 11:38		*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977                                 SEQ 0016

   171					SUBTTL	*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977
   172
   173					S^;*********************************************************************^
   174					;*SPECIAL SUBPROGRAM LINKAGES
   175					S^;*********************************************************************^
   176
   177			027772		FSELNK=	27772	;FILE SELECT LINK
   178			027773		FRDLNK=	27773	;FILE READ LINK
   179			027774		LDLNK=	27774	;LOAD LINKAGE ADDRESS
   180			027775		DDTLNK=	27775	;DDT LINKAGE ADDRESS
   181			027776		MODLNK=	27776	;OPERATIONAL MODE CHECK LINKAGE ADDRESS
   182			027777		SUBLNK=	27777	;SUBROUTINE LINKAGE ADDRESS
   183
   184					S^;*********************************************************************^
   185					;*SPECIAL SUBROUTINE FATAL HALTS
   186					;*USED TO REPORT ERRORS THAT CAUSE THE SUBROUTINES TO BE UNUSABLE
   187					S^;*********************************************************************^
   188
   189					;ADDRESS   TAG	REASON
   190					;---------------------
   191
   192					; 1010 	NOEXEC	;PROGRAM NOT CODED FOR EXEC MODE OPERATION
   193					; 1011  PLERR	;FATAL PUSH LIST POINTER ERROR
   194					; 1012  PLERR1	;INITIAL PUSH LIST POINTER ERROR
   195					; 1013  MUOERR	;MUUO WITH LUUO HANDLER WIPED OUT
   196					; 1014  DTEBER	;DTE20 INTERRUPT WITHOUT DOORBELL
   197					; 1015  DTECER	;DTE20 CLOCK INTERRUPT WITHOUT FLAG SET
   198					; 1016  CPIERR	;CPU INITIALIZATION ERROR
   199					; 1017  EOPERR	;END OF PROGRAM ERROR
   200					; 1020  LUOERR	;INTERRUPT WITH LUUO HANDLER WIPED OUT
   201
   202					S^;*********************************************************************^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 3
PARAM	KLM	18-JAN-77 11:38		*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977                                 SEQ 0017

   203					S^;*********************************************************************^
   204					;OPERATOR DEFINITIONS (NON-UUO'S)
   205					S^;*********************************************************************^
   206
   207		260740	000000		OPDEF	GO	[PUSHJ	P,]	;SUBROUTINE CALL
   208		263740	000000		OPDEF	RTN	[POPJ	P,]	;SUBROUTINE RETURN
   209		261740	000000		OPDEF	PUT	[PUSH	P,]	;PUT DATA ON PUSH LIST
   210		262740	000000		OPDEF	GET	[POP	P,]	;GET DATA FROM PUSH LIST
   211		254000	000000		OPDEF	PJRST	[JRST	]	;JRST TO ROUTINE THAT RTN'S
   212		254200	000000		OPDEF	HALT	[JRST	4,]	;DEFINITION FOR DDT
   213		254100	000000		OPDEF	JRSTF	[JRST	2,]	;DEFINITION FOR DDT
   214		254500	000000		OPDEF	JEN	[JRST	12,]	;DEFINITION FOR DDT
   215
   216					S^;*********************************************************************^
   217					;*SUBROUTINE INITIALIZATION CALL
   218					S^;*********************************************************************^
   219
   220		265000	030011		OPDEF	PGMINT	[JSP	0,SBINIT]	;SUBROUTINE INITIALIZATION
   221
   222					S^;*********************************************************************^
   223					;*HALTING UUO'S (A MORE GRACEFUL HALT THAN SIMPLY USING THE HALT INSTRUCTION).
   224					S^;*********************************************************************^
   225
   226		037640	000004		OPDEF	FATAL	[37B8!15B12!4]	;FATAL PROGRAMMING HALT
   227		037600	000004		OPDEF	ERRHLT	[37B8!14B12!4]	;PROGRAM ERROR HALT
   228
   229					S^;*********************************************************************^
   230					;*TERMINAL INPUT UUO'S
   231					;*ALWAYS COME FROM THE CONSOLE TERMINAL IN EXEC MODE OR THE
   232					;*CONTROLLING TERMINAL (REAL TERMINAL OR PTY) IN USER MODE.
   233					S^;*********************************************************************^
   234
   235		037000	000003		OPDEF	TTICHR 	[37B8!0B12!3]	;TTY, INPUT ANY CHARACTER
   236		037040	000003		OPDEF	TTIYES	[37B8!1B12!3]	;TTY, NORMAL RETURN Y
   237		037100	000003		OPDEF	TTINO	[37B8!2B12!3]	;TTY, NORMAL RETURN N
   238		037140	000003		OPDEF	TTIOCT	[37B8!3B12!3]	;TTY, INPUT OCTAL WORD
   239		037200	000003		OPDEF	TTIDEC	[37B8!4B12!3]	;TTY, INPUT DECIMAL WORD
   240		037240	000003		OPDEF	TTICNV	[37B8!5B12!3]	;TTY, INPUT CONVERTABLE WORD
   241		037300	000003		OPDEF	TTLOOK	[37B8!6B12!3]	;TTY, KEYBOARD CHECK
   242		037340	000003		OPDEF	TTALTM	[37B8!7B12!3]	;TTY, ALT-MODE CHECK
   243		037400	000003		OPDEF	TTSIXB	[37B8!10B12!3]	;TTY, INPUT SIXBIT WORD
   244		037440	000003		OPDEF	TTYINP	[37B8!11B12!3]	;TTY, IMAGE MODE INPUT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 4
PARAM	KLM	18-JAN-77 11:38		*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977                                 SEQ 0018

   245					;*TERMINAL OUTPUT UUO'S.
   246
   247		037000	000000		OPDEF	PNTA	[37B8!0B12!0]	;PRINT ASCII WORD
   248		037000	000001		OPDEF	PNTAF	[37B8!0B12!1]	;PRINT ASCII WORD FORCED
   249		037740	000000		OPDEF	PNTAL	[37B8!17B12!0]	;PRINT ASCIZ LINE
   250		037740	000001		OPDEF	PNTALF	[37B8!17B12!1]	;PRINT ASCIZ LINE FORCED
   251		037600	000003		OPDEF	PSIXL	[37B8!14B12!3]	;PRINT SIXBIT'Z LINE
   252		037640	000003		OPDEF	PSIXLF	[37B8!15B12!3]	;PRINT SIXBIT'Z LINE FORCED
   253		037000	000000		OPDEF	PNTMSG	[37B8!0B12!0]	;PRINT MESSAGE IMMEDIATE
   254		037040	000000		OPDEF	PNTMSF	[37B8!1B12!0]	;PRINT MESSAGE IMMEDIATE FORCED
   255		037100	000000		OPDEF	PSIXM	[37B8!2B12!0]	;PRINT SIXBIT'Z MSG IMMEDIATE
   256		037200	000000		OPDEF	PSIXMF	[37B8!4B12!0]	;PRINT SIXBIT'Z MSG IMM FORCED
   257		037000	000000		OPDEF	PNTCI	[37B8!0B12!0]	;PRINT CHARACTER IMMEDIATE
   258		037040	000000		OPDEF	PNTCIF	[37B8!1B12!0]	;PRINT CHARACTER IMMEDIATE FORCED
   259		037500	000000		OPDEF	PNTCHR	[37B8!12B12!0]	;PRINT CHARACTER
   260		037500	000001		OPDEF	PNTCHF	[37B8!12B12!1]	;PRINT CHARACTER FORCED
   261		037040	000000		OPDEF	PNT1	[37B8!1B12!0]	;PRINT ONE OCTAL DIGIT
   262		037040	000001		OPDEF	PNT1F	[37B8!1B12!1]	;PRINT 1 OCTAL DIGIT FORCED
   263		037100	000000		OPDEF	PNT2	[37B8!2B12!0]	;PRINT TWO OCTAL DIGITS
   264		037100	000001		OPDEF	PNT2F	[37B8!2B12!1]	;PRINT 2 OCTAL DIGITS FORCED
   265		037140	000000		OPDEF	PNT3	[37B8!3B12!0]	;PRINT THREE OCTAL DIGITS
   266		037140	000001		OPDEF	PNT3F	[37B8!3B12!1]	;PRINT THREE OCTAL DIGITS FORCED
   267		037200	000000		OPDEF	PNT4	[37B8!4B12!0]	;PRINT FOUR OCTAL DIGITS
   268		037200	000001		OPDEF	PNT4F	[37B8!4B12!1]	;PRINT FOUR OCTAL DIGITS FORCED
   269		037240	000000		OPDEF	PNT5	[37B8!5B12!0]	;PRINT FIVE OCTAL DIGITS
   270		037240	000001		OPDEF	PNT5F	[37B8!5B12!1]	;PRINT FIVE OCTAL DIGITS FORCED
   271		037300	000000		OPDEF	PNT6	[37B8!6B12!0]	;PRINT SIX OCTAL DIGITS
   272		037300	000001		OPDEF	PNT6F	[37B8!6B12!1]	;PRINT SIX OCTAL DIGITS FORCED
   273		037340	000000		OPDEF	PNT7	[37B8!7B12!0]	;PRINT 7 OCTAL DIGITS
   274		037340	000001		OPDEF	PNT7F	[37B8!7B12!1]	;PRINT 7 OCTAL DIGITS FORCED
   275		037440	000000		OPDEF	PNT11	[37B8!11B12!0]	;PRINT 11 OCTAL DIGITS
   276		037440	000001		OPDEF	PNT11F	[37B8!11B12!1]	;PRINT 11 OCTAL DIGITS FORCED.
   277		037400	000000		OPDEF	PNTADR	[37B8!10B12!0]	;PRINT PHYSICAL ADDRESS
   278		037400	000001		OPDEF	PNTADF	[37B8!10B12!1]	;PRINT PHYSICAL ADDRESS FORCED
   279		037600	000000		OPDEF	PNTOCT  [37B8!14B12!0]	;PRINT FULL WORD OCTAL
   280		037600	000001		OPDEF	PNTOTF	[37B8!14B12!1]	;PRINT FULL WORD OCTAL FORCED
   281		037540	000000		OPDEF	PNTHW	[37B8!13B12!0]	;PRINT OCTAL HALF WORDS, 6 SP 6
   282		037540	000001		OPDEF	PNTHWF	[37B8!13B12!1]	;PRINT OCTAL HALF WORDS, 6 SP 6 FORCED
   283		037700	000003		OPDEF	PNTOCS	[37B8!16B12!3]	;PRINT OCTAL, SUPPRESS LEADING 0'S
   284		037740	000003		OPDEF	PNTOCF	[37B8!17B12!3]	;PRINT OCTAL, SUPPRESS LEADING 0'S FORCED
   285		037640	000000		OPDEF	PNTDEC	[37B8!15B12!0]	;PRINT DECIMAL, SUPRESS LEADING 0'S
   286		037640	000001		OPDEF	PNTDCF	[37B8!15B12!1]	;PRINT DECIMAL, SUPRESS LEADING 0'S FORCED
   287		037700	000000		OPDEF	PNTDS	[37B8!16B12!0]	;PRINT DECIMAL, SPACES FOR LD 0'S
   288		037700	000001		OPDEF	PNTDSF	[37B8!16B12!1]	;PRINT DECIMAL, SPACES FOR LD 0'S FORCED
   289		037200	000002		OPDEF	PNTNM	[37B8!4B12!2]	;PRINT PROGRAM NAME
   290		037000	000002		OPDEF	PNTSIX	[37B8!0B12!2]	;PRINT SIXBIT WORD
   291		037040	000002		OPDEF	PNTSXF	[37B8!1B12!2]	;PRINT SIXBIT WORD FORCED
   292		037240	000002		OPDEF	DROPDV	[37B8!5B12!2]	;CLOSE LOGICAL FILE, USER MODE
   293		037100	000002		OPDEF	PNTCW	[37B8!2B12!2]	;PRINT DF10 CONTROL WORD
   294		037140	000002		OPDEF	PNTCWF	[37B8!3B12!2]	;PRINT DF10 CONTROL WORD FORCED
   295		037000	030242		OPDEF	PCRL	[37B8!0B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED
   296		037040	030242		OPDEF	PCRLF	[37B8!1B12!CRLF] ;PRINT CARRIAGE RETURN/LINE FEED FORCED
   297		037000	000040		OPDEF	PSP	[37B8!0B12!40]	;PRINT SPACE
   298		037040	000040		OPDEF	PSPF	[37B8!1B12!40]	;PRINT SPACE FORCED
   299		037000	030243		OPDEF	PCRL2	[37B8!0B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE)
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 4-1
PARAM	KLM	18-JAN-77 11:38		*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977                                 SEQ 0019

   300		037040	030243		OPDEF	PCRL2F	[37B8!1B12!CRLF2] ;PRINT CARRIAGE RETURN/LINE FEED (TWICE) FORCED
   301		037040	000007		OPDEF	PBELL	[37B8!1B12!7]	;PRINT TTY BELL
   302
   303		037040	000026		OPDEF	PFORCE	[37B8!1B12!26]	;PRINT FORCE, CONTROL O OVERRIDE
   304
   305					DEFINE	PMSG	(ARG),<
   306						PSIXM	[SIXBIT\ARG'_\]>
   307
   308					DEFINE	PMSGF	(ARG),<
   309						PSIXMF	[SIXBIT\ARG'_\]>
   310
   311					;*SIXBTZ -- MACRO TO GENERATE SIXBIT DATA FOR PRINTING
   312					;*	CONSERVES CORE OVER ASCIZ
   313
   314					DEFINE	SIXBTZ	(ARG),<	[SIXBIT\ARG'_\]>
   315
   316					;*CONSOLE SWITCH INPUT UUO.
   317					;*READS CONSOLE SWITCHES IF IN EXEC MODE OR ASKS FOR THEM IF
   318					;* USER MODE.
   319
   320		037400	000002		OPDEF	SWITCH	[37B8!10B12!2]	;INPUT CONSOLE SWITCHES
   321
   322					;*CLOCK INITIALIZATION UUO - TO SET DESIRED CLOCK OPERATION
   323					;*EITHER IGNORE CLOCK, ONLY LET IT TICK OR CAUSE INTERRUPT TO OCCUR.
   324
   325		037540	000004		OPDEF	CLOKOP	[37B8!13B12!4]	;CLOCK OPERATION UUO - PDP-11 CLOCK
   326		037200	000004		OPDEF	MTROP	[37B8!4B12!4]	;CLOCK OPERATION UUO - DK20 METER
   327
   328					;*KL10 ONLY CACHE OPERATION UUO'S
   329
   330		037040	000004		OPDEF	CINVAL	[37B8!1B12!4]	;CACHE INVALIDATE
   331		037100	000004		OPDEF	CFLUSH	[37B8!2B12!4]	;CACHE FLUSH
   332		037140	000004		OPDEF	CWRTBI	[37B8!3B12!4]	;CACHE WRITE-BACK & INVALIDATE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 5
PARAM	KLM	18-JAN-77 11:38		*PARAM* PROGRAM/SUBROUTINE PARAMETERS, JAN 18,1977                                 SEQ 0020

   333					;*END OF PASS/PROGRAM UUOS
   334
   335					;PERFORMS THE END OF PASS FUNCTIONS. INCREMENT PASS COUNT,
   336					;*DECREMENT ITERATION COUNT, CHECK IF FINISHED WITH THIS PROGRAM ETC.
   337
   338		037500	000004		OPDEF	ENDUUO	[37B8!12B12!4]	;UUO TO DISPLAY LIGHTS
   339		037700	000004		OPDEF	EOPUUO	[37B8!16B12!4]	;END OF PROGRAM UUO
   340
   341					;*MEMORY MANAGEMENT UUO'S
   342					;*UUO'S TO PERFORM VARIOUS MEMORY FUNCTIONS. MAPPING, ZEROING, PAGING,
   343					;*ADDRESS CONVERSION, ETC...
   344
   345		037000	000004		OPDEF	MAPMEM	[37B8!0B12!4]	;MAP MEMORY
   346		037500	000002		OPDEF	MEMZRO	[37B8!12B12!2]	;ZERO MEMORY
   347		037440	000002		OPDEF	MEMSEG	[37B8!11B12!2]	;SETUP MEMORY SEGMENT
   348		037540	000002		OPDEF	MAPADR	[37B8!13B12!2]	;VIRTUAL TO PHYSICAL ADR CONVERT
   349		037640	000002		OPDEF	MAPCNK	[37B8!15B12!2]	;MAP MEMORY CHUNK
   350		037600	000002		OPDEF	MAPSET	[37B8!14B12!2]	;SET KI10 EXEC PAGE MAP
   351		037740	000002		OPDEF	MAPPNT	[37B8!17B12!2]	;PRINT MEMORY MAP
   352
   353					;*DEVICE CODE MODIFICATION UUO
   354					;*ALLOWS THE MODIFICATION OF IOT'S TO ONE DEVICE TO BE CHANGED TO
   355					;*IOT'S TO A DIFFERENT DEVICE CODE.
   356
   357		037340	000002		OPDEF	MODPCU	[37B8!7B12!2]	;MODIFY PERHIPERAL CODE, USER
   358		037300	000002		OPDEF	MODPCP	[37B8!6B12!2]	;MODIFY PERHIPERAL CODE, PROGRAM
   359
   360			030000			IFNDEF	MODDVL,<MODDVL==BEGIN>
   361			030000			IFNDEF	MODDVU,<MODDVU==BEGIN>
   362
   363					;*"DIAMON" FILE SELECTION AND READ UUOS
   364
   365		037240	000004		OPDEF	FSELECT	[37B8!5B12!4]	;FILE SELECTION
   366		037300	000004		OPDEF	FREAD	[37B8!6B12!4]	;FILE READ - ASCII DATA
   367		037340	000004		OPDEF	FRD36	[37B8!7B12!4]	;FILE READ - 36 BIT DATA
   368		037400	000004		OPDEF	FRD8	[37B8!10B12!4]	;FILE READ - 8 BIT DATA
   369
   370					;*KI10 ONLY UUO FOR PRINTING MARGIN VALUES
   371
   372		037700	000002		OPDEF	PNTMGN	[37B8!16B12!2]	;PRINT MARGIN VALUE
   373
   374						XLIST
   375						LIST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0021

   376					SUBTTL	*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977
   377
   378	030000					LOC	30000
   379
   380					S^;*********************************************************************^
   381					;*PROGRAM STARTING ADDRESSES
   382					;*THESE ADDRESSES CALL VARIOUS SPECIAL START ROUTINES AND OR OPTIONS
   383					;*NORMAL START ADDRESS IS 30000 ALL OTHERS ARE SPECIAL. INVOKED BECAUSE
   384					;*OF END OF PASS, POWER FAILURE, DDT START, RE-ENTERING(TYPICALLY USER
   385					;*MODE), OR ANY NUMBER OF SPECIAL FEATURE TESTS.
   386					S^;*********************************************************************^
   387
   388	030000	254 00 1 00 027776 	BEGIN:	JRST	@MODLNK		;STAND-ALONE START
   389	030001	254 00 0 00 030620 	$START:	JRST	START		;MODE CHECK STARTING ADDRESS
   390
   391	030002	254 00 1 00 027774 	DIAGMN:	JRST	@LDLNK		;DIAGNOSTIC MONITOR START
   392
   393	030003	254 00 1 00 027774 	SYSEXR:	JRST	@LDLNK		;SYSTEM EXERCISER START
   394
   395	030004	254 00 0 00 030000 	SFSTRT:	JRST	SADR1		;SPECIAL FEATURE START
   396
   397	030005	254 00 0 00 030000 	PFSTRT:	JRST	SADR2		;POWER FAIL RESTART
   398
   399	030006	254 00 0 00 030000 	REENTR:	JRST	SADR3		;REENTER START(USUALLY USER MODE ONLY)
   400
   401	030007				SRTDDT:				;COMMONLY MISTAKEN NAME FOR "DDTSRT"
   402	030007	254 00 1 00 027775 	DDTSRT:	JRST	@DDTLNK		;DDT START
   403
   404	030010	254 00 0 00 030623 	BEGIN1:	JRST	STARTA		;LOOP START(END OF PASS COMES HERE)
   405	030011	254 00 1 00 027777 	SBINIT:	JRST	@SUBLNK		;PMGINT LINKAGE
   406	030012	000000	000000		RETURN:	0			;RETURN ADDRESS STORAGE
   407
   408	030013	254000	030000		START1:	SADR7			;OPTIONAL STARTING ADR/INSTRUCTIONS
   409	030014	254000	030000		START2:	SADR8			; "
   410	030015	254000	030000		START3:	SADR9			; "
   411	030016	254000	030000		START4:	SADR10			; "
   412	030017	254000	030000		START5:	SADR11			; "
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 2
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0022

   413					S^;*********************************************************************^
   414					;*PROGRAM FIXED PARAMETER AREA
   415					S^;*********************************************************************^
   416
   417	030020	444153	415100		PNTNAM:	PAREA3		;SIXBIT PROGRAM NAME
   418	030021	645560	000000		PNTEXT:	PAREA4		;SIXBIT PROGRAM EXTENSION
   419	030022	000000	000000		RANDBS:	PAREA1		;RANDOM BASE NUMBER
   420	030023	000000	000000		SWTEXR:	PAREA2		;SYSTEM EXERCISER SWITCHES
   421	030024	000000	001000		ITRCNT:	ITERAT		;PROGRAM ITERATIONS
   422	030025	000000	030602		$PNAME:	PGMNAM		;POINTER TO PROGRAMS NAME
   423	030026	000000	000002		$PVER:	MCNVER,,DECVER	;MCN & DEC VERSION LEVEL
   424	030027	000000	030000		$MODVL:	MODDVL		;DEVICE CODE CHANGE LOWER LIMIT
   425	030030	000000	030000		$MODVU:	MODDVU		;DEVICE CODE CHANGE UPPER LIMIT
   426	030031	777777	777777		$EMODE:	IFNDEF EXCASB,<0> IFDEF EXCASB,<-1>	;EXEC ALLOWED
   427	030032	777777	777777		$UMODE:	IFNDEF USRASB,<0> IFDEF USRASB,<-1>	;USER ALLOWED
   428	030033	000000	000000		$DSKUP:	IFNDEF DSKUPD,<0> IFDEF DSKUPD,<-1>	;DISK UPDATE MODE
   429	030034	000000	000000		$MMAP:	IFNDEF MEMMAP,<0> IFDEF MEMMAP,<-1>	;ALLOW MEMORY RTNS
   430	030035	000000	000000		PAREA7:	PAREA5		;OPTIONAL PARAMETER
   431	030036	000000	000000		PAREA8:	PAREA6		;OPTIONAL PARAMETER
   432
   433					S^;*********************************************************************^
   434					;*PROGRAM VARIABLE PARAMETER AREA
   435					S^;*********************************************************************^
   436
   437	030037	000000	000000		USER:	0		; 0 = EXEC, -1 = USER MODE FLAG
   438	030040	000000	000000		KAIFLG:	0		;PROCESSOR TYPE, 0 = KA10, -1 = KI10
   439	030041	000000	000000		KLFLG:	0		;PROCESSOR TYPE, 0 = KA/KI, -1 = KL10
   440	030042	777777	777777		MONFLG:	-1		;DIAG MONITOR SPECIAL USER FLAG
   441	030043	000000	000000		MONCTL:	0		;DIAG MON/SYS EXR FLAG
   442	030044	000000	000000		MONTEN:	0		;-1= LOADED BY 10
   443	030045	000000	000000		CLOCKF:	0		;CLOCK TICKED FLAG
   444	030046	000000	000000		CONSW:	0		;CONSOLE SWITCH SETTINGS
   445	030047	000000	000000		PASCNT:	0		;PROGRAM PASS COUNT
   446	030050	000000	000000		RUNFLG:	0		;PROGRAM RUN FLAG
   447	030051	000000	000000		TESTPC:	0		;SUBTEST PC
   448	030052	000000	000000		ERRPC:	0		;ERROR PC
   449	030053	000000	000000		ERRTLS:	0		;ERROR TOTALS
   450	030054	000000	000000		TICKS:	0		;PROGRAM RUNNING TIME
   451	030055	000000	000000		MARGIN:	0		;KI10 MARGIN WORD VALUE
   452	030056	000000	000000		$ONETM:	0		;SUBROUTINE INITIALIZATION FLAG
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 3
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0023

   453					S^;*********************************************************************^
   454					;*SPECIAL PROGRAM DISPATCH ADDRESSES
   455					S^;*********************************************************************^
   456
   457	030057	037 12 0 00 000004 	BEGEND:	ENDUUO		;END OF PASS
   458	030060	254 00 0 00 030010 	$BEND1:	JRST	BEGIN1	;KEEP RUNNING PROGRAM
   459	030061	037 16 0 00 000004 	$BEND2:	EOPUUO		;END OF PROGRAM - NO RETURN
   460	030062	254000	030000		CNTLC:	SADR5		;CONTROL C XFER ADDRESS
   461	030063	254000	030000		ALTMGO:	SADR6		;ALTMODE XFER ADDRESS
   462	030064				CPOPJ1:			;SKIP RETURN
   463	030064	350 00 0 17 000000 	UUOSKP:	AOS	(P)	;SKIP RETURN FROM UUO
   464	030065				CPOPJ:			;NON-SKIP REGULAR RETURN
   465	030065	263 17 0 00 000000 	UUOEXT:	RTN		;UUO RETURN
   466	030066	255 00 0 00 000000 	UUORTN:	JFCL		;ADDITIONAL USERS UUO ROUTINE
   467	030067	255 00 0 00 000000 	$UORTX:	JFCL		;ADDITIONAL UUO LINKAGE
   468	030070	255 00 0 00 000000 	$UUOER:	JFCL		;INITED AS (JRST $UOERX)
   469	030071	255 00 0 00 000000 	$ITRHL:	JFCL		;ADDITIONAL INTERRUPT LINKAGE
   470	030072	255 00 0 00 000000 	$ITRX1:	JFCL		; "
   471	030073	255 00 0 00 000000 	$USRHL:	JFCL		; "
   472	030074	255 00 0 00 000000 	$RSRTX:	JFCL		;ADDITIONAL POWER FAIL LINKAGE
   473	030075	255 00 0 00 000000 	$RSRTY:	JFCL		; "
   474	030076	255 00 0 00 000000 	RESRT1:	JFCL		; INITED AS (JRST RESRTX)
   475	030077	255 00 0 00 000000 	RESRT2:	JFCL		; "
   476	030100	255 00 0 00 000000 	$PARER:	JFCL		;ADDITIONAL PARITY ERROR LINKAGE
   477	030101	255 00 0 00 000000 	ERMORE:	JFCL		;ADDITIONAL ERROR HANDLER LINKAGE
   478	030102	254 04 0 00 030102 		HALT	.	;IMPROPER TRANSFER HALT
   479
   480	030103	000000	000000		$PSHER:	0		;INITED AS (JRST PSHERR)
   481	030104	000000	000000		ITRCH1:	0		;PC & FLAGS OF CURRENT INTERRUPT
   482	030105	000000	000000			0		;INITED AS (JRST $ITRC1)
   483
   484					S^;*********************************************************************^
   485					;*PROCESSOR CONTROL STORAGE
   486					S^;*********************************************************************^
   487
   488	030106	000000	000000		$ACC0:	0		;INTERRUPT SAVED AC0
   489	030107	000000	000000		$SVPI:	0		;INTERRUPT SAVED PI
   490	030110	000000	000000		$SVAPR:	0		;INTERRUPT SAVED APR
   491	030111	000000	000000		$SVPAG:	0		;INTERRUPT SAVED PAG (DATAI)
   492	030112	000000	000000		$SPAG1:	0		;INTERRUPT SAVED PAG (CONI)
   493
   494	030113	000000	000000		$SVUUO:	0		;CURRENT USERS UUO
   495	030114	000000	000000		$SVUPC:	0		;PC OF CURRENT USERS UUO
   496
   497	030115	000000	000000		REPTU:	0		;REPEAT UUO ITERATIONS
   498	030116	000000	000000		SCOPE:	0		;ERROR HANDLER SCOPE LOOP FLAG
   499	030117	000000	000000		%CORFLG:0		; " CORRECT FLAG
   500	030120	000000	000000		%COREC:	0		; " CORRECT DATA
   501	030121	000000	000000		%ACTFL:	0		; " ACTUAL FLAG
   502	030122	000000	000000		%ACTUL:	0		; " ACTUAL DATA
   503	030123	000000	000000		%DISCR:	0		; " DISCREPENCY DATA
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 4
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0024

   504					S^;*********************************************************************^
   505					;*UUO DISPATCH TABLE
   506					S^;*********************************************************************^
   507						XLIST
   508						LIST
   509	030124	041423	030070		UUODIS:	LUUO1,,$UUOER
   510	030125	041423	041423			LUUO3,,LUUO2
   511	030126	041423	041423			LUUO5,,LUUO4
   512	030127	041423	041423			LUUO7,,LUUO6
   513	030130	041423	041423			LUUO11,,LUUO10
   514	030131	041423	041423			LUUO13,,LUUO12
   515	030132	030070	030070			LUUO15,,LUUO14
   516	030133	030070	030070			LUUO17,,LUUO16
   517	030134	030070	030070			LUUO21,,LUUO20
   518	030135	030070	030070			LUUO23,,LUUO22
   519	030136	030070	030070			LUUO25,,LUUO24
   520	030137	030070	030070			LUUO27,,LUUO26
   521	030140	030070	030070			LUUO31,,LUUO30
   522	030141	030070	030070			LUUO33,,LUUO32
   523
   524					S^;*********************************************************************^
   525					;*MEMORY MANAGMENT STORAGE
   526					S^;*********************************************************************^
   527
   528	030142	000000	000000		DF22F:	0		;DF10 CONTROL FLAG, 0 = 18, -1 = 22 BIT
   529	030143	000000	000000		MAPNEW:	0		;MEMORY MAPPING CONTROL FLAG, -1 = 4096K MAPPING
   530	030144	000000	000000		MEMTOT:	0		;TOTAL MEMORY SIZE IN K (1024.)
   531	030145	000000	000000		MEMLOW:	0		;LOWEST USABLE MEMORY
   532	030146				MEMSIZ:	BLOCK ^D41	;MEMORY SEGMENT POINTER TABLE
   533
   534					S^;*********************************************************************^
   535					;*PRINT CONTROL STORAGE
   536					S^;*********************************************************************^
   537
   538	030217	000000	000000		PNTFLG:	0		;PRINT FLAG, -1 WHILE IN PRINT ROUTINE
   539	030220	000000	000000		PNTENB:	0		;PRINT ENABLE
   540	030221	000000	000000		PDISF:	0		;PRINT DISABLED FLAG
   541	030222	000000	000000		PNTINH:	0		;INHIBIT PRINT INPUT CHECKS
   542	030223	000000	000000		PNTSPC:	0		;PRINT SPACE CONTROL
   543	030224	000000	000000		OPTIME:	0		;TYPE-IN WAIT TIME
   544	030225	000000	000000		$TWCNT:	0		;TIME WAITED
   545	030226	000000	000000		$DVOFF:	0		;LOGICAL DEVICE INITED FLAG
   546	030227	000000	000000		TTYFIL:	0		;TTY EXEC FILLERS FLAG
   547	030230	000000	000000		TTYSPD:	0		;TTY EXEC BAUD RATE
   548	030231	000000	000000		$TTCHR:	0		;ACTUAL TYPED IN CHAR
   549	030232	000000	000000		$CHRIN:	0		;UPPER CASED & PARITY STRIPPED CHAR
   550	030233	000000	000000		$TYPNB:	0		;TYPED IN NUMBER
   551	030234	000000	000000		$CRLF:	0		;FREE CR/LF FLAG
   552	030235	000000	000000		$TABF:	0		;TAB CONVERSION FLAG
   553	030236	000000	000000		$FFF:	0		;FORM FEED CONVERSION FLAG
   554	030237	000000	000000		$VTF:	0		;VERTICAL TAB CONVERSION FLAG
   555	030240	000000	000000		USRLFF:	0		;USER LF FILLERS
   556	030241	000000	000000		USRCRF:	0		;USER CR FILLERS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 5
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0025

   557					S^;*********************************************************************^
   558					;*THE FOLLOWING MISCELLANEOUS PRINT CHARACTERS ARE INCLUDED
   559					;*TO FACILITATE PRINTING AND ARE CALLED AS FOLLOWS:
   560					;*	MOVEI	NAME
   561					;*	PNTA		;OR PNTAF
   562					S^;*********************************************************************^
   563
   564	030242				CRLF:	ASCII/
   565	030242	015 012 000 000 000 	/
   566	030243				CRLF2:	ASCII/
   567
   568	030243	015 012 015 012 000 	/
   569	030244	054 000 000 000 000 	COMMA:	ASCII/,/
   570	030245	056 000 000 000 000 	PERIOD:	ASCII/./
   571	030246	040 000 000 000 000 	SPACE:	ASCII/ /
   572	030247	011 000 000 000 000 	TAB:	ASCII/	/
   573	030250				MINUS:
   574	030250	055 000 000 000 000 	HYPEN:	ASCII/-/
   575	030251	053 000 000 000 000 	PLUS:	ASCII/+/
   576	030252	052 000 000 000 000 	AST:	ASCII/*/
   577	030253	100 000 000 000 000 	ATSIN:	ASCII/@/
   578	030254	050 000 000 000 000 	LFP:	ASCII/(/
   579	030255	051 000 000 000 000 	RTP:	ASCII/)/
   580	030256	007 0000000000 		BELL:	BYTE (7) 007
   581	030257	077 000 000 000 000 	QUEST:	ASCII/?/
   582	030260	057 000 000 000 000 	SLASH:	ASCII!/!
   583	030261	044 000 000 000 000 	DOLLAR:	ASCII/$/
   584	030262	000000	000012		RADIX:	^D10			;DECIMAL PRINT RADIX
   585	030263	000000	000040		RADLSP:	40			;DECIMAL PRINT LEADING CHAR
   586	030264	000000	000012		RADLSC:	^D10			;DECIMAL PRINT LEADING CHAR COUNT
   587
   588					S^;*********************************************************************^
   589					;*USER MODE OUTPUT FILE INFORMATION
   590					S^;*********************************************************************^
   591
   592	030265				$OBUF:	BLOCK	3		;LOGICAL FILE OUTPUT BUFFER HEADER
   593	030270	60 62 51 56 64 00 	$OUTNM:	SIXBIT	/PRINT/		;FILE NAME
   594	030271	60 56 64 00 00 00 	$OUTEX:	SIXBIT	/PNT/		;FILE NAME EXTENSION
   595	030272					BLOCK	2
   596
   597					S^;*********************************************************************^
   598					;*DISK UPDATE MODE FILE INFORMATION
   599					S^;*********************************************************************^
   600
   601	030274				$IBUF:	BLOCK	3
   602	030277	60 62 51 56 64 00 	$INNM:	SIXBIT	/PRINT/
   603	030300	60 56 64 00 00 00 	$INEXT:	SIXBIT	/PNT/
   604	030301					BLOCK	2
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0026

   605					S^;*********************************************************************^
   606					;*PUSHDOWN LIST CONTROL INFORMATION
   607					S^;*********************************************************************^
   608
   609	030303	777577	030303		PLIST:	PLIST-PLISTE,,PLIST
   610	030304				PLISTS:	BLOCK	200
   611	030504	000000	000000		PLISTE:	0		;END OF PUSHDOWN LIST
   612
   613					S^;*********************************************************************^
   614					;*POWER LINE CLOCK FREQUENCY FLAG
   615					S^;*********************************************************************^
   616
   617	030505	000000	000000		CYCL60:	0	;0 = 60, -1 = 50 CYCLE
   618
   619					S^;*********************************************************************^
   620					;*KL10 CACHE CONTROL FLAGS
   621					S^;*********************************************************************^
   622
   623	030506	000000	000000		CSHFLG:	0	;ALLOW CACHE IF 0
   624	030507	000000	000000		CSHMEM:	0	;CACHE MEMORY SEGMENTS IF 0
   625
   626					S^;*********************************************************************^
   627					;*NUMBER INPUT DIGIT FLAG
   628					S^;*********************************************************************^
   629
   630	030510	000000	000000		TTNBRF:	0	;-1 IF ANY DIGIT TYPED
   631
   632					S^;*********************************************************************^
   633					;*KL10 & KI10 "INHPAG" SWITCH PAGING PREVENTION
   634					S^;*********************************************************************^
   635
   636	030511	000000	000000		PVPAGI:	0	;IF NON-ZERO, OVERRIDE "INHPAG" SWITCH ACTION
   637
   638					S^;*********************************************************************^
   639					;*ERROR REPORTING ROUTINE ADDITIONAL USERS CONTROL INSTRUCTIONS
   640					S^;*********************************************************************^
   641
   642	030512	000000	000000		%ERHI1:	0	;IF NON-ZERO, XCT'D AT START OF %ERUUO
   643	030513	000000	000000		%ERHI2:	0	;IF NON-ZERO, XCT'D AT END OF %ERUUO
   644	030514	000000	000000		%ERHI3:	0	;IF NON-ZERO, XCT'D AFTER "PC" OF %ERUUO
   645
   646					S^;*********************************************************************^
   647					;*SPECIAL USERS UUO INTERCEPT INSTRUCTION
   648					S^;*********************************************************************^
   649
   650	030515	000000	000000		$$UUO:	0	;IF NON-ZERO, XCT'D AT START OF $UORTN
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7
FIXED	KLM	18-JAN-77 11:39		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0027

   651					S^;*********************************************************************^
   652					;*KL10 PROCESSOR TYPE FLAG, 0=P0, 1=BBD NEW, 2=BBD OLD
   653					S^;*********************************************************************^
   654
   655	030516	000000	000000		KLTYP:	0
   656
   657					S^;*********************************************************************^
   658					;*SPECIAL USERS MUUO INTERCEPT INSTRUCTION
   659					S^;*********************************************************************^
   660
   661	030517	000000	000000		$$MUUO:	0	;IF NON-ZERO, XCT'D AT START OF MUUOER
   662
   663					S^;*********************************************************************^
   664					;*SPECIAL USERS USER MODE OUTPUT ERROR INTERCEPT INSTUCTION
   665					S^;*********************************************************************^
   666
   667	030520	000000	000000		$$OUTER:0	;IF NON-ZERO, XCT'D AT END OF USER MODE ERROR
   668
   669					S^;*********************************************************************^
   670					;*"SWITCH" CALL USAGE CONTROL
   671					S^;*********************************************************************^
   672
   673	030521	000000	000000		$$TOGGLE:0	;IF NON-ZERO, USE C(CONSW) FOR SWITCHES
   674
   675					S^;*********************************************************************^
   676					;*SPECIAL USERS ALTMODE SWITCH CALL INTERCEPT INSTRUCTIONS
   677					S^;*********************************************************************^
   678
   679	030522	000000	000000		$$TAX1:	0	;IF NON-ZERO, XCT'D AT START OF ALTMODE SWITCH CALL
   680	030523	000000	000000		$$TAX2:	0	;IF NON-ZERO, XCT'D AT END OF ALTMODE SWITCH CALL
   681
   682					S^;*********************************************************************^
   683					;*SPECIAL FUTURE EXPANSION ROOM
   684					;*IF ANY FIXED AREA TAGS ARE ADDED, REDUCE THE SIZE OF
   685					;*THIS BLOCK STATEMENT ACCORDINGLY.  THIS MUST BE DONE
   686					;*SO THAT PREVIOUS FIXED ASSIGNMENTS DO NOT CHANGE.
   687					S^;*********************************************************************^
   688
   689	030524					BLOCK	53	;HOPEFULLY THIS IS ENOUGH FOREVER
   690
   691					S^;*********************************************************************^
   692					;*END OF FIXED STORAGE
   693					S^;*********************************************************************^
   694
   695			030577			$ENDFX=<PLISTE+100>&<777700>-1
   696	030577					LOC	$ENDFX
   697	030577	000000	000000		ENDFIX:	0		;END OF FIXED STORAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
DAKAIM	MAC	20-JAN-77 10:36		*FIXED* FIXED CONTROL AND DISPATCH STORAGE, JAN 18,1977                            SEQ 0028

   698	030600	037 05 0 00 000002 	EXIT:	DROPDV			;CLOSE LOGICAL OUTPUT FILE
   699	030601	000000	030600			EXIT
   700
   701	030602				PGMNAM:	ASCIZ/
   702	030602	015 012 120 104 120 	PDP-10 KA10 BASIC INSTRUCTION DIAGNOSTIC #9 SHIFT-ROTATE [DAKAI]
   703	030603	055 061 060 040 113
   704	030604	101 061 060 040 102
   705	030605	101 123 111 103 040
   706	030606	111 116 123 124 122
   707	030607	125 103 124 111 117
   708	030610	116 040 104 111 101
   709	030611	107 116 117 123 124
   710	030612	111 103 040 043 071
   711	030613	040 123 110 111 106
   712	030614	124 055 122 117 124
   713	030615	101 124 105 040 133
   714	030616	104 101 113 101 111
   715	030617	135 015 012 000 000 	/
   716
   717					;INITIALIZE SUBROUTINES
   718
   719	030620	265 00 0 00 030011 	START:	PGMINT
   720	030621	200 00 0 00 041614 		MOVE	[ASCIZ/AI/]
   721	030622	202 00 0 00 041536 		MOVEM	TLET
   722
   723	030623	254 00 0 00 030624 	STARTA:	JRST	E00		;GO PERFORM DIAGNOSTIC
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS                        SEQ 0029

   724					SUBTTL	DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS
   725
   726					;TEST FETCH,STORE AND DECODE
   727					;TEST THE ABILITY OF ROT, ROTC TO FETCH AND STORE
   728					;AC,AC+1
   729					;TESTING IS ACCOMPLISHED BY ROTATING ZERO TIMES ALL
   730					;ZERO'S, ALL ONE'S.
   731					;OPERANDS SELECTED ARE LEAST AFFECTED BY
   732					;INADVERTENT ROTATING
   733					;FAILURE OF A SC BIT TO SET,OR SC TO
   734					;COUNT WILL RESULT IN LOOPING
   735
   736
   737			000001			AC=1
   738	030624				E00:	SAVEAC	(1,1)^
   739	030624	201 03 0 00 030624 		MOVEI	AC+2,.		;SAVE TEST PC
   740	030625	202 03 0 00 030051 		MOVEM	AC+2,TESTPC
   741	030626	201 03 0 00 000003 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   742	030627	202 03 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   743
   744	030630	400 01 0 00 000000 	E100:	SETZ	AC,		;CLEAR AC
   745	030631	241 01 0 00 000000 		ROT	AC,0		;*ROTATE LEFT ZERO TIMES
   746	030632	332 00 0 00 000001 		SKIPE	AC		;TEST AC FOR ZERO
   747	030633	003 01 0 00 000101 		ER3	AC,101		;FETCH OR STORE FAILED
   748	030634	321 03 0 00 030630 		JUMPL	AC+2,E100	;LOOP ON ERROR SWITCH
   749
   750	030635	477 01 0 00 000000 	E200:	SETOB	AC,AC-1		;SET AC,AC-1 FOR COMPARE
   751	030636	241 01 0 00 000000 		ROT	AC,0		;*ROTATE LEFT ZERO TIMES
   752	030637	312 01 0 00 000000 		CAME 	AC,AC-1		;TEST AC FOR A -1
   753	030640	003 01 0 00 000201 		ER3	AC,201		;FETCH OR STORE FAILED
   754	030641	321 03 0 00 030635 		JUMPL	AC+2,E200	;LOOP ON ERROR SWITCH
   755
   756			000002			AC=2
   757						SAVEAC	(1,1)^
   758	030642	201 04 0 00 030642 		MOVEI	AC+2,.		;SAVE TEST PC
   759	030643	202 04 0 00 030051 		MOVEM	AC+2,TESTPC
   760	030644	201 04 0 00 000004 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   761	030645	202 04 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   762
   763	030646	403 02 0 00 000003 	E300:	SETZB	AC,AC+1		;CLEAR AC,AC+1
   764	030647	245 02 0 00 000000 		ROTC	AC,0		;*ROTATE COMBINED LEFT ZERO TIMES
   765	030650	332 00 0 00 000002 		SKIPE	AC		;TEST AC FOR ZERO
   766	030651	003 02 0 00 000301 		ER3	AC,301		;FETCH OR STORE AC FAILED
   767	030652	332 00 0 00 000003 		SKIPE	AC+1		;TEST AC+1 FOR ZERO
   768	030653	004 03 0 00 000301 		ER4	AC+1,301	;FETCH OR STORE AC+1 FAILED
   769	030654	321 04 0 00 030646 		JUMPL	AC+2,E300	;LOOP ON ERROR SWITCH
   770
   771	030655	474 01 0 00 000000 	E400:	SETO	AC-1,		;SET UP FOR COMPARISON
   772	030656	477 02 0 00 000003 		SETOB	AC,AC+1		;SET AC,AC+1
   773	030657	245 02 0 00 000000 		ROTC	AC,0		;*ROTATE COMBINED LEFT ZERO TIMES
   774	030660	312 02 0 00 000001 		CAME	AC,AC-1		;TEST AC FOR A -1
   775	030661	003 02 0 00 000401 		ER3	AC,401		;FETCH OR STORE AC FAILED
   776	030662	312 03 0 00 000001 		CAME	AC+1,AC-1	;TEST AC+1 FOR A -1
   777	030663	004 03 0 00 000401 		ER4	AC+1,401	;FETCH OR STORE AC+1 FAILED
   778	030664	321 04 0 00 030655 		JUMPL	AC+2,E400	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS                        SEQ 0030

   779					;TEST FETCH,STORE AND DECODE
   780					;TEST THE ABILITY OF LSH, LSHC TO FETCH AND STORE
   781					;AC,AC+1
   782					;TESTING IS ACCOMPLISHED BY SHIFTING ZERO TIMES ALL
   783					;ZERO'S ALL ONE'S
   784					;OPERANDS SELECTED ARE LEAST AFFECTED BY
   785					;INADVERTENT SHIFTING
   786					;FAILURE OF A SC BIT TO SET,OR SC TO
   787					;COUNT WILL RESULT IN LOOPING
   788
   789			000003			AC=3
   790						SAVEAC	(1,1)^
   791	030665	201 05 0 00 030665 		MOVEI	AC+2,.		;SAVE TEST PC
   792	030666	202 05 0 00 030051 		MOVEM	AC+2,TESTPC
   793	030667	201 05 0 00 000005 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   794	030670	202 05 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   795
   796	030671	400 03 0 00 000000 	E500:	SETZ	AC,		;CLEAR AC
   797	030672	242 03 0 00 000000 		LSH	AC,0		;*SHIFT LEFT ZERO TIMES
   798	030673	332 00 0 00 000003 		SKIPE	AC		;TEST AC FOR ZERO
   799	030674	003 03 0 00 000501 		ER3	AC,501		;FETCH OR STORE AC FAILED
   800	030675	321 05 0 00 030671 		JUMPL	AC+2,E500	;LOOP ON ERROR SWITCH
   801
   802	030676	477 03 0 00 000002 	E600:	SETOB	AC,AC-1		;SET AC,AC-1 FOR COMPARE
   803	030677	242 03 0 00 000000 		LSH	AC,0		;*SHIFT LEFT ZERO TIMES
   804	030700	312 03 0 00 000002 		CAME	AC,AC-1		;TEST AC FOR -1
   805	030701	003 03 0 00 000601 		ER3	AC,601		;FETCH OR STORE AC FAILED
   806	030702	321 05 0 00 030676 		JUMPL	AC+2,E600	;LOOP ON ERROR SWITCH
   807
   808			000014			AC=14
   809						SAVEAC	(1,1)^
   810	030703	201 16 0 00 030703 		MOVEI	AC+2,.		;SAVE TEST PC
   811	030704	202 16 0 00 030051 		MOVEM	AC+2,TESTPC
   812	030705	201 16 0 00 000016 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   813	030706	202 16 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   814
   815	030707	403 14 0 00 000015 	E700:	SETZB	AC,AC+1		;CLEAR AC,AC+1
   816	030710	246 14 0 00 000000 		LSHC	AC,0		;*SHIFT COMBINED LEFT ZERO TIMES
   817	030711	332 00 0 00 000014 		SKIPE	AC		;TEST AC FOR 0
   818	030712	003 14 0 00 000701 		ER3	AC,701		;FETCH OR STORE AC FAILED
   819	030713	332 00 0 00 000015 		SKIPE	AC+1		;TEST AC+1 FOR 0
   820	030714	004 15 0 00 000701 		ER4	AC+1,701	;FETCH OR STORE AC+1 FAILED
   821	030715	321 16 0 00 030707 		JUMPL	AC+2,E700	;LOOP ON ERROR SWITCH
   822
   823	030716	474 13 0 00 000000 	E1000:	SETO	AC-1,		;SET UP FOR COMPARISON
   824	030717	477 14 0 00 000015 		SETOB	AC,AC+1		;SET AC,AC+1
   825	030720	246 14 0 00 000000 		LSHC	AC,0		;*SHIFT COMBINED LEFT ZERO TIMES
   826	030721	312 14 0 00 000013 		CAME	AC,AC-1		;TEST AC FOR -1
   827	030722	003 14 0 00 001001 		ER3	AC,1001		;FETCH OR STORE AC FAILED
   828	030723	312 15 0 00 000013 		CAME	AC+1,AC-1	;TEST AC+1 FOR -1
   829	030724	004 15 0 00 001001 		ER4	AC+1,1001	;FETCH OR STORE AC+1 FAILED
   830	030725	321 16 0 00 030716 		JUMPL	AC+2,E1000	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST FETCH, STORE AND DECODE FUNCTIONS                        SEQ 0031

   831					;TEST FETCH,STORE AND DECODE
   832					;TEST THE ABILITY OF ASH, ASHC TO FETCH AND STORE
   833					;AC,AC+1
   834					;TESTING IS ACCOMPLISHED BY SHIFTING ZERO TIMES ALL
   835					;ZERO'S ALL ONES
   836					;OPERANDS SELECTED ARE LEAST AFFECTED BY
   837					;INADVERTENT SHIFTING
   838					;FAILURE OF A SC BIT TO SET,OR SC TO
   839					;COUNT WILL RESULT IN LOOPING
   840
   841			000013			AC=13
   842						SAVEAC	(1,1)^
   843	030726	201 15 0 00 030726 		MOVEI	AC+2,.		;SAVE TEST PC
   844	030727	202 15 0 00 030051 		MOVEM	AC+2,TESTPC
   845	030730	201 15 0 00 000015 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   846	030731	202 15 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   847
   848	030732	400 13 0 00 000000 	E1100:	SETZ	AC,		;CLEAR AC
   849	030733	240 13 0 00 000000 		ASH	AC,0		;*SHIFT LEFT ZERO TIMES
   850	030734	332 00 0 00 000013 		SKIPE	AC		;TEST AC FOR ZERO
   851	030735	003 13 0 00 001101 		ER3	AC,1101		;FETCH OR STORE AC FAILED
   852	030736	321 15 0 00 030732 		JUMPL	AC+2,E1100	;LOOP ON ERROR SWITCH
   853
   854	030737	477 13 0 00 000012 	E1200:	SETOB	AC,AC-1		;SET AC,AC-1 FOR COMPARE
   855	030740	240 13 0 00 000000 		ASH	AC,0		;*SHIFT LEFT ZERO TIMES
   856	030741	312 13 0 00 000012 		CAME	AC,AC-1		;TEST AC FOR A -1
   857	030742	003 13 0 00 001201 		ER3	AC,1201		;FETCH OR STORE AC FAILED
   858	030743	321 15 0 00 030737 		JUMPL	AC+2,E1200	;LOOP ON ERROR SWITCH
   859
   860			000012			AC=12
   861						SAVEAC	(1,1)^
   862	030744	201 14 0 00 030744 		MOVEI	AC+2,.		;SAVE TEST PC
   863	030745	202 14 0 00 030051 		MOVEM	AC+2,TESTPC
   864	030746	201 14 0 00 000014 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   865	030747	202 14 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   866
   867	030750	403 12 0 00 000013 	E1300:	SETZB	AC,AC+1		;CLEAR AC,AC+1
   868	030751	244 12 0 00 000000 		ASHC	AC,0		;*SHIFT COMBINED LEFT ZERO TIMES
   869	030752	332 00 0 00 000012 		SKIPE	AC		;TEST AC FOR 0
   870	030753	003 12 0 00 001301 		ER3	AC,1301		;FETCH OR STORE AC FAILED
   871	030754	332 00 0 00 000013 		SKIPE	AC+1		;TEST AC+1 FOR 0
   872	030755	004 13 0 00 001301 		ER4	AC+1,1301	;FETCH OR STORE AC+1 FAILED
   873	030756	321 14 0 00 030750 		JUMPL	AC+2,E1300	;LOOP ON ERROR SWITCH
   874
   875	030757	474 11 0 00 000000 	E1400:	SETO	AC-1,		;SET UP FOR COMPARISON
   876	030760	477 12 0 00 000013 		SETOB	AC,AC+1		;SET AC,AC+1
   877	030761	244 12 0 00 000000 		ASHC	AC,0		;*SHIFT COMBINED LEFT ZERO TIMES
   878	030762	312 12 0 00 000011 		CAME	AC,AC-1		;TEST AC FOR A -1
   879	030763	003 12 0 00 001401 		ER3	AC,1401		;FETCH OR STORE AC FAILED
   880	030764	312 13 0 00 000011 		CAME	AC+1,AC-1	;TEST AC+1 FOR A -1
   881	030765	004 13 0 00 001401 		ER4	AC+1,1401	;FETCH OR STORE AC+1 FAILED
   882	030766	321 14 0 00 030757 		JUMPL	AC+2,E1400	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - CHECK SIGN BIT OF AC+1 FOR ASHC                               SEQ 0032

   883					SUBTTL	DIAGNOSTIC SECTION - CHECK SIGN BIT OF AC+1 FOR ASHC
   884
   885					;VERIFY THAT THE SIGN BIT OF AC+1 IS NOT MADE TO AGREE WITH THE SIGN BIT OF AC
   886					;WHEN THE 'E' FIELD OF ASHC SECIFIES A SHIFT OF ZERO BIT POSITIONS.
   887					;HENCE, C(AC+1) IS NOT ALTERE BY 'ASHC AC,0'.
   888					;CHECK THIS WHEN THE SIGN BIT OF AC IS ZERO AND THE SIGN BIT OF AC+1 IS ONE.
   889
   890						SR2	(443,0,0,-1,-1,0,0,-1,-1,ASHC,0)^
   891					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
   892					;DATA SPECIFIED IN [XWD 0,0] AND [XWD -1,-1] 0 BIT POSITIONS AND
   893					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
   894					;[XWD -1,-1]
   895
   896	030767	200 12 0 00 041615 	E44300:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
   897	030770	200 13 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
   898	030771	244 12 0 00 000000 		ASHC	AC,0			;*SHIFT/ROTATE COMBINED 0 PLACES
   899	030772	312 12 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
   900	030773	003 12 0 00 044301 		ER3	AC,44301			;RESULT IN AC IS INCORRECT
   901	030774	312 13 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
   902	030775	004 13 0 00 044301 		ER4	AC+1,44301		;RESULT IN AC+1 IS INCORRECT
   903	030776	321 14 0 00 030767 		JUMPL	AC+2,E44300		;LOOP ON ERROR SWITCH^
   904
   905					;VERIFY THAT THE SIGN BIT OF AC+1 IS NOT MADE TO AGREE WITH THE SIGN BIT OF AC
   906					;WHEN THE 'E' FIELD OF ASHC SECIFIES A SHIFT OF ZERO BIT POSITIONS.
   907					;HENCE, C(AC+1) IS NOT ALTERE BY 'ASHC AC,0'.
   908					;CHECK THIS WHEN THE SIGN BIT OF AC IS ONE AND THE SIGN BIT OF AC+1 IS ZERO.
   909						SR2	(444,-1,-1,0,0,-1,-1,0,0,ASHC,0)^
   910					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
   911					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 0,0] 0 BIT POSITIONS AND
   912					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
   913					;[XWD 0,0]
   914
   915	030777	200 12 0 00 041616 	E44400:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
   916	031000	200 13 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
   917	031001	244 12 0 00 000000 		ASHC	AC,0			;*SHIFT/ROTATE COMBINED 0 PLACES
   918	031002	312 12 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
   919	031003	003 12 0 00 044401 		ER3	AC,44401			;RESULT IN AC IS INCORRECT
   920	031004	312 13 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
   921	031005	004 13 0 00 044401 		ER4	AC+1,44401		;RESULT IN AC+1 IS INCORRECT
   922	031006	321 14 0 00 030777 		JUMPL	AC+2,E44400		;LOOP ON ERROR SWITCH^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0033

   923					SUBTTL	DIAGNOSTIC SECTION - TEST MQ-ADDER GATING
   924
   925			000010			AC=10
   926						SAVEAC	(1,1)^
   927	031007	201 12 0 00 031007 		MOVEI	AC+2,.		;SAVE TEST PC
   928	031010	202 12 0 00 030051 		MOVEM	AC+2,TESTPC
   929	031011	201 12 0 00 000012 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
   930	031012	202 12 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
   931
   932			001500		SN=1500
   933			000000			ZZ=0
   934								;CHECK AC+1 RIGHT <
   935					E1500:	REPEAT	^D18,<
   936
   937					;VERIFY MQ-AD GATING
   938					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
   939					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
   940					;REPEAT FOR ALL 36 BITS OF MQ
   941					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
   942					SN=SN+1
   943						ZZ=ZZ+ZZ			;TESTED BIT
   944						IFE	ZZ,<ZZ=1>
   945						SETZM	AC			;CLEAR AC
   946						MOVEI	AC+1,ZZ			;INITIALIZE AC+1
   947						ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
   948						CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
   949						ER4	AC+1,SN			;MQ-AD GATE FAILED
   950						JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
   951					>
   952
   953
   954					;VERIFY MQ-AD GATING
   955					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
   956					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
   957					;REPEAT FOR ALL 36 BITS OF MQ
   958					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
   959			001501		SN=SN+1
   960			000000			ZZ=ZZ+ZZ			;TESTED BIT
   961			000001			IFE	ZZ,<ZZ=1>
   962	031013	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
   963	031014	201 11 0 00 000001 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
   964	031015	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
   965	031016	302 11 0 00 000001 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
   966	031017	004 11 0 00 001501 		ER4	AC+1,SN			;MQ-AD GATE FAILED
   967	031020	321 12 0 00 031013 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
   968
   969
   970
   971					;VERIFY MQ-AD GATING
   972					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
   973					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
   974					;REPEAT FOR ALL 36 BITS OF MQ
   975					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
   976			001502		SN=SN+1
   977			000002			ZZ=ZZ+ZZ			;TESTED BIT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0034

   978						IFE	ZZ,<ZZ=1>
   979	031021	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
   980	031022	201 11 0 00 000002 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
   981	031023	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
   982	031024	302 11 0 00 000002 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
   983	031025	004 11 0 00 001502 		ER4	AC+1,SN			;MQ-AD GATE FAILED
   984	031026	321 12 0 00 031021 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
   985
   986
   987
   988					;VERIFY MQ-AD GATING
   989					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
   990					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
   991					;REPEAT FOR ALL 36 BITS OF MQ
   992					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
   993			001503		SN=SN+1
   994			000004			ZZ=ZZ+ZZ			;TESTED BIT
   995						IFE	ZZ,<ZZ=1>
   996	031027	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
   997	031030	201 11 0 00 000004 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
   998	031031	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
   999	031032	302 11 0 00 000004 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1000	031033	004 11 0 00 001503 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1001	031034	321 12 0 00 031027 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1002
  1003
  1004
  1005					;VERIFY MQ-AD GATING
  1006					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1007					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1008					;REPEAT FOR ALL 36 BITS OF MQ
  1009					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1010			001504		SN=SN+1
  1011			000010			ZZ=ZZ+ZZ			;TESTED BIT
  1012						IFE	ZZ,<ZZ=1>
  1013	031035	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1014	031036	201 11 0 00 000010 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1015	031037	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1016	031040	302 11 0 00 000010 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1017	031041	004 11 0 00 001504 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1018	031042	321 12 0 00 031035 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1019
  1020
  1021
  1022					;VERIFY MQ-AD GATING
  1023					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1024					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1025					;REPEAT FOR ALL 36 BITS OF MQ
  1026					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1027			001505		SN=SN+1
  1028			000020			ZZ=ZZ+ZZ			;TESTED BIT
  1029						IFE	ZZ,<ZZ=1>
  1030	031043	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1031	031044	201 11 0 00 000020 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1032	031045	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0035

  1033	031046	302 11 0 00 000020 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1034	031047	004 11 0 00 001505 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1035	031050	321 12 0 00 031043 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1036
  1037
  1038
  1039					;VERIFY MQ-AD GATING
  1040					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1041					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1042					;REPEAT FOR ALL 36 BITS OF MQ
  1043					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1044			001506		SN=SN+1
  1045			000040			ZZ=ZZ+ZZ			;TESTED BIT
  1046						IFE	ZZ,<ZZ=1>
  1047	031051	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1048	031052	201 11 0 00 000040 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1049	031053	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1050	031054	302 11 0 00 000040 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1051	031055	004 11 0 00 001506 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1052	031056	321 12 0 00 031051 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1053
  1054
  1055
  1056					;VERIFY MQ-AD GATING
  1057					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1058					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1059					;REPEAT FOR ALL 36 BITS OF MQ
  1060					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1061			001507		SN=SN+1
  1062			000100			ZZ=ZZ+ZZ			;TESTED BIT
  1063						IFE	ZZ,<ZZ=1>
  1064	031057	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1065	031060	201 11 0 00 000100 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1066	031061	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1067	031062	302 11 0 00 000100 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1068	031063	004 11 0 00 001507 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1069	031064	321 12 0 00 031057 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1070
  1071
  1072
  1073					;VERIFY MQ-AD GATING
  1074					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1075					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1076					;REPEAT FOR ALL 36 BITS OF MQ
  1077					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1078			001510		SN=SN+1
  1079			000200			ZZ=ZZ+ZZ			;TESTED BIT
  1080						IFE	ZZ,<ZZ=1>
  1081	031065	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1082	031066	201 11 0 00 000200 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1083	031067	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1084	031070	302 11 0 00 000200 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1085	031071	004 11 0 00 001510 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1086	031072	321 12 0 00 031065 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1087
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0036

  1088
  1089
  1090					;VERIFY MQ-AD GATING
  1091					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1092					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1093					;REPEAT FOR ALL 36 BITS OF MQ
  1094					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1095			001511		SN=SN+1
  1096			000400			ZZ=ZZ+ZZ			;TESTED BIT
  1097						IFE	ZZ,<ZZ=1>
  1098	031073	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1099	031074	201 11 0 00 000400 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1100	031075	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1101	031076	302 11 0 00 000400 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1102	031077	004 11 0 00 001511 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1103	031100	321 12 0 00 031073 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1104
  1105
  1106
  1107					;VERIFY MQ-AD GATING
  1108					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1109					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1110					;REPEAT FOR ALL 36 BITS OF MQ
  1111					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1112			001512		SN=SN+1
  1113			001000			ZZ=ZZ+ZZ			;TESTED BIT
  1114						IFE	ZZ,<ZZ=1>
  1115	031101	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1116	031102	201 11 0 00 001000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1117	031103	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1118	031104	302 11 0 00 001000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1119	031105	004 11 0 00 001512 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1120	031106	321 12 0 00 031101 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1121
  1122
  1123
  1124					;VERIFY MQ-AD GATING
  1125					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1126					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1127					;REPEAT FOR ALL 36 BITS OF MQ
  1128					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1129			001513		SN=SN+1
  1130			002000			ZZ=ZZ+ZZ			;TESTED BIT
  1131						IFE	ZZ,<ZZ=1>
  1132	031107	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1133	031110	201 11 0 00 002000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1134	031111	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1135	031112	302 11 0 00 002000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1136	031113	004 11 0 00 001513 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1137	031114	321 12 0 00 031107 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1138
  1139
  1140
  1141					;VERIFY MQ-AD GATING
  1142					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0037

  1143					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1144					;REPEAT FOR ALL 36 BITS OF MQ
  1145					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1146			001514		SN=SN+1
  1147			004000			ZZ=ZZ+ZZ			;TESTED BIT
  1148						IFE	ZZ,<ZZ=1>
  1149	031115	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1150	031116	201 11 0 00 004000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1151	031117	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1152	031120	302 11 0 00 004000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1153	031121	004 11 0 00 001514 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1154	031122	321 12 0 00 031115 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1155
  1156
  1157
  1158					;VERIFY MQ-AD GATING
  1159					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1160					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1161					;REPEAT FOR ALL 36 BITS OF MQ
  1162					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1163			001515		SN=SN+1
  1164			010000			ZZ=ZZ+ZZ			;TESTED BIT
  1165						IFE	ZZ,<ZZ=1>
  1166	031123	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1167	031124	201 11 0 00 010000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1168	031125	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1169	031126	302 11 0 00 010000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1170	031127	004 11 0 00 001515 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1171	031130	321 12 0 00 031123 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1172
  1173
  1174
  1175					;VERIFY MQ-AD GATING
  1176					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1177					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1178					;REPEAT FOR ALL 36 BITS OF MQ
  1179					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1180			001516		SN=SN+1
  1181			020000			ZZ=ZZ+ZZ			;TESTED BIT
  1182						IFE	ZZ,<ZZ=1>
  1183	031131	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1184	031132	201 11 0 00 020000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1185	031133	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1186	031134	302 11 0 00 020000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1187	031135	004 11 0 00 001516 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1188	031136	321 12 0 00 031131 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1189
  1190
  1191
  1192					;VERIFY MQ-AD GATING
  1193					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1194					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1195					;REPEAT FOR ALL 36 BITS OF MQ
  1196					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1197			001517		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0038

  1198			040000			ZZ=ZZ+ZZ			;TESTED BIT
  1199						IFE	ZZ,<ZZ=1>
  1200	031137	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1201	031140	201 11 0 00 040000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1202	031141	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1203	031142	302 11 0 00 040000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1204	031143	004 11 0 00 001517 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1205	031144	321 12 0 00 031137 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1206
  1207
  1208
  1209					;VERIFY MQ-AD GATING
  1210					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1211					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1212					;REPEAT FOR ALL 36 BITS OF MQ
  1213					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1214			001520		SN=SN+1
  1215			100000			ZZ=ZZ+ZZ			;TESTED BIT
  1216						IFE	ZZ,<ZZ=1>
  1217	031145	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1218	031146	201 11 0 00 100000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1219	031147	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1220	031150	302 11 0 00 100000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1221	031151	004 11 0 00 001520 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1222	031152	321 12 0 00 031145 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1223
  1224
  1225
  1226					;VERIFY MQ-AD GATING
  1227					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1228					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1229					;REPEAT FOR ALL 36 BITS OF MQ
  1230					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1231			001521		SN=SN+1
  1232			200000			ZZ=ZZ+ZZ			;TESTED BIT
  1233						IFE	ZZ,<ZZ=1>
  1234	031153	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1235	031154	201 11 0 00 200000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
  1236	031155	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1237	031156	302 11 0 00 200000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1238	031157	004 11 0 00 001521 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1239	031160	321 12 0 00 031153 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1240
  1241
  1242
  1243					;VERIFY MQ-AD GATING
  1244					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1245					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1246					;REPEAT FOR ALL 36 BITS OF MQ
  1247					;RESULT IN AC+1 SHOULD BE SAME AS INTIALIZATION DATA
  1248			001522		SN=SN+1
  1249			400000			ZZ=ZZ+ZZ			;TESTED BIT
  1250						IFE	ZZ,<ZZ=1>
  1251	031161	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1252	031162	201 11 0 00 400000 		MOVEI	AC+1,ZZ			;INITIALIZE AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0039

  1253	031163	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSIOTIONS
  1254	031164	302 11 0 00 400000 		CAIE	AC+1,ZZ			;CHECK BIT (N) OF AC+1
  1255	031165	004 11 0 00 001522 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1256	031166	321 12 0 00 031161 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1257
  1258					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0040

  1259			000000		ZZ=0
  1260								;CHECK AC+1 LEFT <
  1261						REPEAT	^D18,<
  1262
  1263					;VERIFY MQ-AD GATING
  1264					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1265					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1266					;REPEAT FOR ALL 36 BITS OF MQ
  1267					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1268					SN=SN+1
  1269						ZZ=ZZ+ZZ			;TESTED BIT
  1270						IFE	ZZ,<ZZ=1>
  1271						SETZM	AC			;CLEAR AC
  1272						MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1273						MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1274						ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1275						CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1276						ER4	AC+1,SN			;MQ-AD GATE FAILED
  1277						JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1278					>
  1279
  1280
  1281					;VERIFY MQ-AD GATING
  1282					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1283					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1284					;REPEAT FOR ALL 36 BITS OF MQ
  1285					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1286			001523		SN=SN+1
  1287			000000			ZZ=ZZ+ZZ			;TESTED BIT
  1288			000001			IFE	ZZ,<ZZ=1>
  1289	031167	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1290	031170	205 11 0 00 000001 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1291	031171	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1292	031172	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1293	031173	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1294	031174	004 11 0 00 001523 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1295	031175	321 12 0 00 031170 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1296
  1297
  1298
  1299					;VERIFY MQ-AD GATING
  1300					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1301					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1302					;REPEAT FOR ALL 36 BITS OF MQ
  1303					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1304			001524		SN=SN+1
  1305			000002			ZZ=ZZ+ZZ			;TESTED BIT
  1306						IFE	ZZ,<ZZ=1>
  1307	031176	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1308	031177	205 11 0 00 000002 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1309	031200	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1310	031201	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1311	031202	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1312	031203	004 11 0 00 001524 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1313	031204	321 12 0 00 031177 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0041

  1314
  1315
  1316
  1317					;VERIFY MQ-AD GATING
  1318					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1319					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1320					;REPEAT FOR ALL 36 BITS OF MQ
  1321					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1322			001525		SN=SN+1
  1323			000004			ZZ=ZZ+ZZ			;TESTED BIT
  1324						IFE	ZZ,<ZZ=1>
  1325	031205	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1326	031206	205 11 0 00 000004 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1327	031207	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1328	031210	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1329	031211	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1330	031212	004 11 0 00 001525 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1331	031213	321 12 0 00 031206 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1332
  1333
  1334
  1335					;VERIFY MQ-AD GATING
  1336					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1337					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1338					;REPEAT FOR ALL 36 BITS OF MQ
  1339					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1340			001526		SN=SN+1
  1341			000010			ZZ=ZZ+ZZ			;TESTED BIT
  1342						IFE	ZZ,<ZZ=1>
  1343	031214	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1344	031215	205 11 0 00 000010 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1345	031216	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1346	031217	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1347	031220	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1348	031221	004 11 0 00 001526 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1349	031222	321 12 0 00 031215 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1350
  1351
  1352
  1353					;VERIFY MQ-AD GATING
  1354					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1355					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1356					;REPEAT FOR ALL 36 BITS OF MQ
  1357					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1358			001527		SN=SN+1
  1359			000020			ZZ=ZZ+ZZ			;TESTED BIT
  1360						IFE	ZZ,<ZZ=1>
  1361	031223	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1362	031224	205 11 0 00 000020 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1363	031225	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1364	031226	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1365	031227	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1366	031230	004 11 0 00 001527 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1367	031231	321 12 0 00 031224 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1368
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0042

  1369
  1370
  1371					;VERIFY MQ-AD GATING
  1372					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1373					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1374					;REPEAT FOR ALL 36 BITS OF MQ
  1375					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1376			001530		SN=SN+1
  1377			000040			ZZ=ZZ+ZZ			;TESTED BIT
  1378						IFE	ZZ,<ZZ=1>
  1379	031232	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1380	031233	205 11 0 00 000040 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1381	031234	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1382	031235	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1383	031236	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1384	031237	004 11 0 00 001530 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1385	031240	321 12 0 00 031233 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1386
  1387
  1388
  1389					;VERIFY MQ-AD GATING
  1390					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1391					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1392					;REPEAT FOR ALL 36 BITS OF MQ
  1393					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1394			001531		SN=SN+1
  1395			000100			ZZ=ZZ+ZZ			;TESTED BIT
  1396						IFE	ZZ,<ZZ=1>
  1397	031241	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1398	031242	205 11 0 00 000100 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1399	031243	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1400	031244	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1401	031245	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1402	031246	004 11 0 00 001531 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1403	031247	321 12 0 00 031242 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1404
  1405
  1406
  1407					;VERIFY MQ-AD GATING
  1408					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1409					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1410					;REPEAT FOR ALL 36 BITS OF MQ
  1411					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1412			001532		SN=SN+1
  1413			000200			ZZ=ZZ+ZZ			;TESTED BIT
  1414						IFE	ZZ,<ZZ=1>
  1415	031250	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1416	031251	205 11 0 00 000200 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1417	031252	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1418	031253	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1419	031254	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1420	031255	004 11 0 00 001532 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1421	031256	321 12 0 00 031251 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1422
  1423
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0043

  1424
  1425					;VERIFY MQ-AD GATING
  1426					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1427					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1428					;REPEAT FOR ALL 36 BITS OF MQ
  1429					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1430			001533		SN=SN+1
  1431			000400			ZZ=ZZ+ZZ			;TESTED BIT
  1432						IFE	ZZ,<ZZ=1>
  1433	031257	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1434	031260	205 11 0 00 000400 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1435	031261	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1436	031262	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1437	031263	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1438	031264	004 11 0 00 001533 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1439	031265	321 12 0 00 031260 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1440
  1441
  1442
  1443					;VERIFY MQ-AD GATING
  1444					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1445					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1446					;REPEAT FOR ALL 36 BITS OF MQ
  1447					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1448			001534		SN=SN+1
  1449			001000			ZZ=ZZ+ZZ			;TESTED BIT
  1450						IFE	ZZ,<ZZ=1>
  1451	031266	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1452	031267	205 11 0 00 001000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1453	031270	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1454	031271	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1455	031272	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1456	031273	004 11 0 00 001534 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1457	031274	321 12 0 00 031267 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1458
  1459
  1460
  1461					;VERIFY MQ-AD GATING
  1462					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1463					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1464					;REPEAT FOR ALL 36 BITS OF MQ
  1465					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1466			001535		SN=SN+1
  1467			002000			ZZ=ZZ+ZZ			;TESTED BIT
  1468						IFE	ZZ,<ZZ=1>
  1469	031275	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1470	031276	205 11 0 00 002000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1471	031277	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1472	031300	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1473	031301	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1474	031302	004 11 0 00 001535 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1475	031303	321 12 0 00 031276 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1476
  1477
  1478
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0044

  1479					;VERIFY MQ-AD GATING
  1480					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1481					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1482					;REPEAT FOR ALL 36 BITS OF MQ
  1483					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1484			001536		SN=SN+1
  1485			004000			ZZ=ZZ+ZZ			;TESTED BIT
  1486						IFE	ZZ,<ZZ=1>
  1487	031304	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1488	031305	205 11 0 00 004000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1489	031306	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1490	031307	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1491	031310	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1492	031311	004 11 0 00 001536 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1493	031312	321 12 0 00 031305 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1494
  1495
  1496
  1497					;VERIFY MQ-AD GATING
  1498					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1499					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1500					;REPEAT FOR ALL 36 BITS OF MQ
  1501					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1502			001537		SN=SN+1
  1503			010000			ZZ=ZZ+ZZ			;TESTED BIT
  1504						IFE	ZZ,<ZZ=1>
  1505	031313	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1506	031314	205 11 0 00 010000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1507	031315	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1508	031316	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1509	031317	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1510	031320	004 11 0 00 001537 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1511	031321	321 12 0 00 031314 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1512
  1513
  1514
  1515					;VERIFY MQ-AD GATING
  1516					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1517					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1518					;REPEAT FOR ALL 36 BITS OF MQ
  1519					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1520			001540		SN=SN+1
  1521			020000			ZZ=ZZ+ZZ			;TESTED BIT
  1522						IFE	ZZ,<ZZ=1>
  1523	031322	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1524	031323	205 11 0 00 020000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1525	031324	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1526	031325	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1527	031326	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1528	031327	004 11 0 00 001540 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1529	031330	321 12 0 00 031323 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1530
  1531
  1532
  1533					;VERIFY MQ-AD GATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0045

  1534					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1535					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1536					;REPEAT FOR ALL 36 BITS OF MQ
  1537					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1538			001541		SN=SN+1
  1539			040000			ZZ=ZZ+ZZ			;TESTED BIT
  1540						IFE	ZZ,<ZZ=1>
  1541	031331	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1542	031332	205 11 0 00 040000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1543	031333	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1544	031334	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1545	031335	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1546	031336	004 11 0 00 001541 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1547	031337	321 12 0 00 031332 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1548
  1549
  1550
  1551					;VERIFY MQ-AD GATING
  1552					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1553					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1554					;REPEAT FOR ALL 36 BITS OF MQ
  1555					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1556			001542		SN=SN+1
  1557			100000			ZZ=ZZ+ZZ			;TESTED BIT
  1558						IFE	ZZ,<ZZ=1>
  1559	031340	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1560	031341	205 11 0 00 100000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1561	031342	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1562	031343	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1563	031344	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1564	031345	004 11 0 00 001542 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1565	031346	321 12 0 00 031341 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1566
  1567
  1568
  1569					;VERIFY MQ-AD GATING
  1570					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
  1571					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1572					;REPEAT FOR ALL 36 BITS OF MQ
  1573					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1574			001543		SN=SN+1
  1575			200000			ZZ=ZZ+ZZ			;TESTED BIT
  1576						IFE	ZZ,<ZZ=1>
  1577	031347	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1578	031350	205 11 0 00 200000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1579	031351	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1580	031352	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1581	031353	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1582	031354	004 11 0 00 001543 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1583	031355	321 12 0 00 031350 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1584
  1585
  1586
  1587					;VERIFY MQ-AD GATING
  1588					;ROTC A RIPPLED ONE ZERO POSITIONS IN AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 6-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0046

  1589					;FIRST CLEAR AC; THEN, SET ONE BIT OF AC+1
  1590					;REPEAT FOR ALL 36 BITS OF MQ
  1591					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1592			001544		SN=SN+1
  1593			400000			ZZ=ZZ+ZZ			;TESTED BIT
  1594						IFE	ZZ,<ZZ=1>
  1595	031356	402 00 0 00 000010 		SETZM	AC			;CLEAR AC
  1596	031357	205 11 0 00 400000 		MOVSI	AC+1,ZZ			;INITIALIZE AC+1
  1597	031360	200 07 0 00 000011 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1598	031361	245 10 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1599	031362	312 11 0 00 000007 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1600	031363	004 11 0 00 001544 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1601	031364	321 12 0 00 031357 		JUMPL	AC+2,.-5		;LOOP ON ERROR SWITCH
  1602
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0047

  1603			000007			AC=7
  1604						SAVEAC	(1,1)^
  1605	031365	201 11 0 00 031365 		MOVEI	AC+2,.		;SAVE TEST PC
  1606	031366	202 11 0 00 030051 		MOVEM	AC+2,TESTPC
  1607	031367	201 11 0 00 000011 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  1608	031370	202 11 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  1609
  1610			001600		SN=1600
  1611
  1612			000000			ZZ=0
  1613
  1614								;CHECK AC+1 RIGHT <
  1615					E1600:	REPEAT	^D18,<
  1616
  1617					;VERIFY MQ-AD GATING
  1618					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1619					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1620					;REPEAT FOR ALL 36 BITS OF MQ
  1621					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1622					SN=SN+1
  1623						ZZ=ZZ+ZZ+1			;TESTED BIT
  1624						IFE	ZZ,<ZZ=-2>
  1625						SETOM	AC			;INITIALIZE TO ALL ONES
  1626						HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1627						MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1628						ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1629						CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1630						ER4	AC+1,SN			;MQ-AD GATE FAILED
  1631						JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1632					>
  1633
  1634
  1635					;VERIFY MQ-AD GATING
  1636					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1637					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1638					;REPEAT FOR ALL 36 BITS OF MQ
  1639					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1640			001601		SN=SN+1
  1641			000001			ZZ=ZZ+ZZ+1			;TESTED BIT
  1642						IFE	ZZ,<ZZ=-2>
  1643	031371	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1644	031372	561 10 0 00 000001 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1645	031373	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1646	031374	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1647	031375	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1648	031376	004 10 0 00 001601 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1649	031377	321 11 0 00 031371 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1650
  1651
  1652
  1653					;VERIFY MQ-AD GATING
  1654					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1655					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1656					;REPEAT FOR ALL 36 BITS OF MQ
  1657					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0048

  1658			001602		SN=SN+1
  1659			000003			ZZ=ZZ+ZZ+1			;TESTED BIT
  1660						IFE	ZZ,<ZZ=-2>
  1661	031400	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1662	031401	561 10 0 00 000003 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1663	031402	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1664	031403	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1665	031404	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1666	031405	004 10 0 00 001602 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1667	031406	321 11 0 00 031400 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1668
  1669
  1670
  1671					;VERIFY MQ-AD GATING
  1672					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1673					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1674					;REPEAT FOR ALL 36 BITS OF MQ
  1675					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1676			001603		SN=SN+1
  1677			000007			ZZ=ZZ+ZZ+1			;TESTED BIT
  1678						IFE	ZZ,<ZZ=-2>
  1679	031407	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1680	031410	561 10 0 00 000007 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1681	031411	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1682	031412	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1683	031413	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1684	031414	004 10 0 00 001603 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1685	031415	321 11 0 00 031407 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1686
  1687
  1688
  1689					;VERIFY MQ-AD GATING
  1690					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1691					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1692					;REPEAT FOR ALL 36 BITS OF MQ
  1693					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1694			001604		SN=SN+1
  1695			000017			ZZ=ZZ+ZZ+1			;TESTED BIT
  1696						IFE	ZZ,<ZZ=-2>
  1697	031416	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1698	031417	561 10 0 00 000017 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1699	031420	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1700	031421	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1701	031422	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1702	031423	004 10 0 00 001604 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1703	031424	321 11 0 00 031416 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1704
  1705
  1706
  1707					;VERIFY MQ-AD GATING
  1708					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1709					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1710					;REPEAT FOR ALL 36 BITS OF MQ
  1711					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1712			001605		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0049

  1713			000037			ZZ=ZZ+ZZ+1			;TESTED BIT
  1714						IFE	ZZ,<ZZ=-2>
  1715	031425	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1716	031426	561 10 0 00 000037 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1717	031427	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1718	031430	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1719	031431	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1720	031432	004 10 0 00 001605 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1721	031433	321 11 0 00 031425 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1722
  1723
  1724
  1725					;VERIFY MQ-AD GATING
  1726					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1727					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1728					;REPEAT FOR ALL 36 BITS OF MQ
  1729					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1730			001606		SN=SN+1
  1731			000077			ZZ=ZZ+ZZ+1			;TESTED BIT
  1732						IFE	ZZ,<ZZ=-2>
  1733	031434	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1734	031435	561 10 0 00 000077 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1735	031436	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1736	031437	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1737	031440	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1738	031441	004 10 0 00 001606 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1739	031442	321 11 0 00 031434 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1740
  1741
  1742
  1743					;VERIFY MQ-AD GATING
  1744					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1745					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1746					;REPEAT FOR ALL 36 BITS OF MQ
  1747					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1748			001607		SN=SN+1
  1749			000177			ZZ=ZZ+ZZ+1			;TESTED BIT
  1750						IFE	ZZ,<ZZ=-2>
  1751	031443	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1752	031444	561 10 0 00 000177 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1753	031445	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1754	031446	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1755	031447	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1756	031450	004 10 0 00 001607 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1757	031451	321 11 0 00 031443 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1758
  1759
  1760
  1761					;VERIFY MQ-AD GATING
  1762					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1763					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1764					;REPEAT FOR ALL 36 BITS OF MQ
  1765					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1766			001610		SN=SN+1
  1767			000377			ZZ=ZZ+ZZ+1			;TESTED BIT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0050

  1768						IFE	ZZ,<ZZ=-2>
  1769	031452	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1770	031453	561 10 0 00 000377 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1771	031454	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1772	031455	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1773	031456	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1774	031457	004 10 0 00 001610 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1775	031460	321 11 0 00 031452 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1776
  1777
  1778
  1779					;VERIFY MQ-AD GATING
  1780					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1781					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1782					;REPEAT FOR ALL 36 BITS OF MQ
  1783					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1784			001611		SN=SN+1
  1785			000777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1786						IFE	ZZ,<ZZ=-2>
  1787	031461	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1788	031462	561 10 0 00 000777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1789	031463	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1790	031464	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1791	031465	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1792	031466	004 10 0 00 001611 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1793	031467	321 11 0 00 031461 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1794
  1795
  1796
  1797					;VERIFY MQ-AD GATING
  1798					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1799					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1800					;REPEAT FOR ALL 36 BITS OF MQ
  1801					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1802			001612		SN=SN+1
  1803			001777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1804						IFE	ZZ,<ZZ=-2>
  1805	031470	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1806	031471	561 10 0 00 001777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1807	031472	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1808	031473	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1809	031474	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1810	031475	004 10 0 00 001612 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1811	031476	321 11 0 00 031470 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1812
  1813
  1814
  1815					;VERIFY MQ-AD GATING
  1816					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1817					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1818					;REPEAT FOR ALL 36 BITS OF MQ
  1819					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1820			001613		SN=SN+1
  1821			003777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1822						IFE	ZZ,<ZZ=-2>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0051

  1823	031477	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1824	031500	561 10 0 00 003777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1825	031501	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1826	031502	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1827	031503	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1828	031504	004 10 0 00 001613 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1829	031505	321 11 0 00 031477 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1830
  1831
  1832
  1833					;VERIFY MQ-AD GATING
  1834					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1835					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1836					;REPEAT FOR ALL 36 BITS OF MQ
  1837					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1838			001614		SN=SN+1
  1839			007777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1840						IFE	ZZ,<ZZ=-2>
  1841	031506	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1842	031507	561 10 0 00 007777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1843	031510	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1844	031511	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1845	031512	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1846	031513	004 10 0 00 001614 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1847	031514	321 11 0 00 031506 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1848
  1849
  1850
  1851					;VERIFY MQ-AD GATING
  1852					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1853					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1854					;REPEAT FOR ALL 36 BITS OF MQ
  1855					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1856			001615		SN=SN+1
  1857			017777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1858						IFE	ZZ,<ZZ=-2>
  1859	031515	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1860	031516	561 10 0 00 017777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1861	031517	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1862	031520	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1863	031521	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1864	031522	004 10 0 00 001615 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1865	031523	321 11 0 00 031515 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1866
  1867
  1868
  1869					;VERIFY MQ-AD GATING
  1870					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1871					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1872					;REPEAT FOR ALL 36 BITS OF MQ
  1873					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1874			001616		SN=SN+1
  1875			037777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1876						IFE	ZZ,<ZZ=-2>
  1877	031524	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0052

  1878	031525	561 10 0 00 037777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1879	031526	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1880	031527	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1881	031530	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1882	031531	004 10 0 00 001616 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1883	031532	321 11 0 00 031524 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1884
  1885
  1886
  1887					;VERIFY MQ-AD GATING
  1888					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1889					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1890					;REPEAT FOR ALL 36 BITS OF MQ
  1891					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1892			001617		SN=SN+1
  1893			077777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1894						IFE	ZZ,<ZZ=-2>
  1895	031533	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1896	031534	561 10 0 00 077777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1897	031535	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1898	031536	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1899	031537	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1900	031540	004 10 0 00 001617 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1901	031541	321 11 0 00 031533 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1902
  1903
  1904
  1905					;VERIFY MQ-AD GATING
  1906					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1907					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1908					;REPEAT FOR ALL 36 BITS OF MQ
  1909					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1910			001620		SN=SN+1
  1911			177777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1912						IFE	ZZ,<ZZ=-2>
  1913	031542	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1914	031543	561 10 0 00 177777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1915	031544	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1916	031545	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1917	031546	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1918	031547	004 10 0 00 001620 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1919	031550	321 11 0 00 031542 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1920
  1921
  1922
  1923					;VERIFY MQ-AD GATING
  1924					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1925					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1926					;REPEAT FOR ALL 36 BITS OF MQ
  1927					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1928			001621		SN=SN+1
  1929			377777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1930						IFE	ZZ,<ZZ=-2>
  1931	031551	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1932	031552	561 10 0 00 377777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0053

  1933	031553	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1934	031554	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1935	031555	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1936	031556	004 10 0 00 001621 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1937	031557	321 11 0 00 031551 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1938
  1939
  1940
  1941					;VERIFY MQ-AD GATING
  1942					;ROTC A RIPPLED ZERO ZERO POSITIONS IN AC+1
  1943					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1944					;REPEAT FOR ALL 36 BITS OF MQ
  1945					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1946			001622		SN=SN+1
  1947			777777			ZZ=ZZ+ZZ+1			;TESTED BIT
  1948						IFE	ZZ,<ZZ=-2>
  1949	031560	476 00 0 00 000007 		SETOM	AC			;INITIALIZE TO ALL ONES
  1950	031561	561 10 0 00 777777 		HRROI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1951	031562	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1952	031563	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1953	031564	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1954	031565	004 10 0 00 001622 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1955	031566	321 11 0 00 031560 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1956
  1957					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0054

  1958			000000		ZZ=0
  1959								;CHECK AC+1 LEFT <
  1960						REPEAT	^D18,<
  1961
  1962					;VERIFY MQ-AD GATING
  1963					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  1964					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1965					;REPEAT FOR ALL 36 BITS OF MQ
  1966					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1967					SN=SN+1
  1968						ZZ=ZZ+ZZ+1			;TESTED BIT
  1969						IFE	ZZ,<ZZ=-2>
  1970						SETOM	AC			;INITIALIZE	AC TO ALL ONES
  1971						HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1972						MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1973						ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1974						CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1975						ER4	AC+1,SN			;MQ-AD GATE FAILED
  1976						JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1977					>
  1978
  1979
  1980					;VERIFY MQ-AD GATING
  1981					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  1982					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  1983					;REPEAT FOR ALL 36 BITS OF MQ
  1984					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  1985			001623		SN=SN+1
  1986			000001			ZZ=ZZ+ZZ+1			;TESTED BIT
  1987						IFE	ZZ,<ZZ=-2>
  1988	031567	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  1989	031570	525 10 0 00 000001 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  1990	031571	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  1991	031572	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  1992	031573	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  1993	031574	004 10 0 00 001623 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  1994	031575	321 11 0 00 031567 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  1995
  1996
  1997
  1998					;VERIFY MQ-AD GATING
  1999					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2000					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2001					;REPEAT FOR ALL 36 BITS OF MQ
  2002					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2003			001624		SN=SN+1
  2004			000003			ZZ=ZZ+ZZ+1			;TESTED BIT
  2005						IFE	ZZ,<ZZ=-2>
  2006	031576	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2007	031577	525 10 0 00 000003 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2008	031600	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2009	031601	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2010	031602	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2011	031603	004 10 0 00 001624 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2012	031604	321 11 0 00 031576 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0055

  2013
  2014
  2015
  2016					;VERIFY MQ-AD GATING
  2017					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2018					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2019					;REPEAT FOR ALL 36 BITS OF MQ
  2020					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2021			001625		SN=SN+1
  2022			000007			ZZ=ZZ+ZZ+1			;TESTED BIT
  2023						IFE	ZZ,<ZZ=-2>
  2024	031605	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2025	031606	525 10 0 00 000007 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2026	031607	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2027	031610	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2028	031611	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2029	031612	004 10 0 00 001625 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2030	031613	321 11 0 00 031605 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2031
  2032
  2033
  2034					;VERIFY MQ-AD GATING
  2035					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2036					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2037					;REPEAT FOR ALL 36 BITS OF MQ
  2038					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2039			001626		SN=SN+1
  2040			000017			ZZ=ZZ+ZZ+1			;TESTED BIT
  2041						IFE	ZZ,<ZZ=-2>
  2042	031614	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2043	031615	525 10 0 00 000017 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2044	031616	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2045	031617	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2046	031620	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2047	031621	004 10 0 00 001626 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2048	031622	321 11 0 00 031614 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2049
  2050
  2051
  2052					;VERIFY MQ-AD GATING
  2053					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2054					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2055					;REPEAT FOR ALL 36 BITS OF MQ
  2056					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2057			001627		SN=SN+1
  2058			000037			ZZ=ZZ+ZZ+1			;TESTED BIT
  2059						IFE	ZZ,<ZZ=-2>
  2060	031623	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2061	031624	525 10 0 00 000037 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2062	031625	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2063	031626	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2064	031627	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2065	031630	004 10 0 00 001627 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2066	031631	321 11 0 00 031623 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2067
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0056

  2068
  2069
  2070					;VERIFY MQ-AD GATING
  2071					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2072					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2073					;REPEAT FOR ALL 36 BITS OF MQ
  2074					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2075			001630		SN=SN+1
  2076			000077			ZZ=ZZ+ZZ+1			;TESTED BIT
  2077						IFE	ZZ,<ZZ=-2>
  2078	031632	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2079	031633	525 10 0 00 000077 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2080	031634	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2081	031635	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2082	031636	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2083	031637	004 10 0 00 001630 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2084	031640	321 11 0 00 031632 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2085
  2086
  2087
  2088					;VERIFY MQ-AD GATING
  2089					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2090					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2091					;REPEAT FOR ALL 36 BITS OF MQ
  2092					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2093			001631		SN=SN+1
  2094			000177			ZZ=ZZ+ZZ+1			;TESTED BIT
  2095						IFE	ZZ,<ZZ=-2>
  2096	031641	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2097	031642	525 10 0 00 000177 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2098	031643	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2099	031644	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2100	031645	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2101	031646	004 10 0 00 001631 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2102	031647	321 11 0 00 031641 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2103
  2104
  2105
  2106					;VERIFY MQ-AD GATING
  2107					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2108					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2109					;REPEAT FOR ALL 36 BITS OF MQ
  2110					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2111			001632		SN=SN+1
  2112			000377			ZZ=ZZ+ZZ+1			;TESTED BIT
  2113						IFE	ZZ,<ZZ=-2>
  2114	031650	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2115	031651	525 10 0 00 000377 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2116	031652	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2117	031653	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2118	031654	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2119	031655	004 10 0 00 001632 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2120	031656	321 11 0 00 031650 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2121
  2122
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0057

  2123
  2124					;VERIFY MQ-AD GATING
  2125					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2126					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2127					;REPEAT FOR ALL 36 BITS OF MQ
  2128					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2129			001633		SN=SN+1
  2130			000777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2131						IFE	ZZ,<ZZ=-2>
  2132	031657	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2133	031660	525 10 0 00 000777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2134	031661	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2135	031662	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2136	031663	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2137	031664	004 10 0 00 001633 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2138	031665	321 11 0 00 031657 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2139
  2140
  2141
  2142					;VERIFY MQ-AD GATING
  2143					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2144					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2145					;REPEAT FOR ALL 36 BITS OF MQ
  2146					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2147			001634		SN=SN+1
  2148			001777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2149						IFE	ZZ,<ZZ=-2>
  2150	031666	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2151	031667	525 10 0 00 001777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2152	031670	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2153	031671	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2154	031672	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2155	031673	004 10 0 00 001634 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2156	031674	321 11 0 00 031666 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2157
  2158
  2159
  2160					;VERIFY MQ-AD GATING
  2161					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2162					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2163					;REPEAT FOR ALL 36 BITS OF MQ
  2164					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2165			001635		SN=SN+1
  2166			003777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2167						IFE	ZZ,<ZZ=-2>
  2168	031675	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2169	031676	525 10 0 00 003777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2170	031677	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2171	031700	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2172	031701	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2173	031702	004 10 0 00 001635 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2174	031703	321 11 0 00 031675 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2175
  2176
  2177
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0058

  2178					;VERIFY MQ-AD GATING
  2179					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2180					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2181					;REPEAT FOR ALL 36 BITS OF MQ
  2182					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2183			001636		SN=SN+1
  2184			007777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2185						IFE	ZZ,<ZZ=-2>
  2186	031704	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2187	031705	525 10 0 00 007777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2188	031706	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2189	031707	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2190	031710	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2191	031711	004 10 0 00 001636 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2192	031712	321 11 0 00 031704 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2193
  2194
  2195
  2196					;VERIFY MQ-AD GATING
  2197					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2198					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2199					;REPEAT FOR ALL 36 BITS OF MQ
  2200					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2201			001637		SN=SN+1
  2202			017777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2203						IFE	ZZ,<ZZ=-2>
  2204	031713	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2205	031714	525 10 0 00 017777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2206	031715	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2207	031716	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2208	031717	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2209	031720	004 10 0 00 001637 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2210	031721	321 11 0 00 031713 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2211
  2212
  2213
  2214					;VERIFY MQ-AD GATING
  2215					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2216					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2217					;REPEAT FOR ALL 36 BITS OF MQ
  2218					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2219			001640		SN=SN+1
  2220			037777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2221						IFE	ZZ,<ZZ=-2>
  2222	031722	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2223	031723	525 10 0 00 037777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2224	031724	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2225	031725	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2226	031726	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2227	031727	004 10 0 00 001640 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2228	031730	321 11 0 00 031722 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2229
  2230
  2231
  2232					;VERIFY MQ-AD GATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0059

  2233					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2234					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2235					;REPEAT FOR ALL 36 BITS OF MQ
  2236					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2237			001641		SN=SN+1
  2238			077777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2239						IFE	ZZ,<ZZ=-2>
  2240	031731	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2241	031732	525 10 0 00 077777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2242	031733	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2243	031734	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2244	031735	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2245	031736	004 10 0 00 001641 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2246	031737	321 11 0 00 031731 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2247
  2248
  2249
  2250					;VERIFY MQ-AD GATING
  2251					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2252					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2253					;REPEAT FOR ALL 36 BITS OF MQ
  2254					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2255			001642		SN=SN+1
  2256			177777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2257						IFE	ZZ,<ZZ=-2>
  2258	031740	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2259	031741	525 10 0 00 177777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2260	031742	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2261	031743	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2262	031744	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2263	031745	004 10 0 00 001642 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2264	031746	321 11 0 00 031740 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2265
  2266
  2267
  2268					;VERIFY MQ-AD GATING
  2269					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
  2270					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2271					;REPEAT FOR ALL 36 BITS OF MQ
  2272					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2273			001643		SN=SN+1
  2274			377777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2275						IFE	ZZ,<ZZ=-2>
  2276	031747	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2277	031750	525 10 0 00 377777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2278	031751	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2279	031752	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2280	031753	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2281	031754	004 10 0 00 001643 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2282	031755	321 11 0 00 031747 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2283
  2284
  2285
  2286					;VERIFY MQ-AD GATING
  2287					;ROTC A RIPPLED ZERO ZERO POSIOTIONS IN AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 7-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ-ADDER GATING                                          SEQ 0060

  2288					;FIRST SET AC TO ALL ONES; THEN, SET ALL BUT ONE BIT OF AC+1
  2289					;REPEAT FOR ALL 36 BITS OF MQ
  2290					;RESULT IN AC+1 SHOULD BE SAME AS INITIALIZATION DATA
  2291			001644		SN=SN+1
  2292			777777			ZZ=ZZ+ZZ+1			;TESTED BIT
  2293						IFE	ZZ,<ZZ=-2>
  2294	031756	476 00 0 00 000007 		SETOM	AC			;INITIALIZE	AC TO ALL ONES
  2295	031757	525 10 0 00 777777 		HRLOI	AC+1,ZZ&777777		;INITIALIZE AC+1
  2296	031760	200 06 0 00 000010 		MOVE	AC-1,AC+1		;SETUP FOR COMPARISON
  2297	031761	245 07 0 00 000000 		ROTC	AC,0		;*ROT 0 BIT POSITIONS
  2298	031762	312 10 0 00 000006 		CAME	AC+1,AC-1		;CHECK BIT (N) OF AC+1
  2299	031763	004 10 0 00 001644 		ER4	AC+1,SN			;MQ-AD GATE FAILED
  2300	031764	321 11 0 00 031756 		JUMPL	AC+2,.-6		;LOOP ON ERROR SWITCH
  2301
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)                    SEQ 0061

  2302					SUBTTL	DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)
  2303
  2304					;BASIC SHIFT TEST
  2305					;TEST ABILITY TO SHIFT A BIT 0,1,-1 AND -2 POSITIONS
  2306
  2307			000004			AC=4
  2308						SAVEAC	(1,1)^
  2309	031765	201 06 0 00 031765 		MOVEI	AC+2,.		;SAVE TEST PC
  2310	031766	202 06 0 00 030051 		MOVEM	AC+2,TESTPC
  2311	031767	201 06 0 00 000006 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  2312	031770	202 06 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  2313
  2314					;TEST ABILITY TO SHIFT A BIT ZERO POSITIONS USING LSH
  2315						SR1	(17,0,10,0,10,LSH,0)^
  2316					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] 0 BIT
  2317					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,10]
  2318					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
  2319
  2320	031771	200 04 0 00 041617 	E1700:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2321	031772	200 05 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
  2322	031773	242 04 0 00 000000 		LSH	AC,0			;*SHIFT/ROTATE 0 BIT POSITIONS
  2323	031774	312 04 0 00 041617 		CAME	AC,[XWD 0,10]	;IS RESULT IN AC CORRECT?
  2324	031775	003 04 0 00 001701 		ER3	AC,1701			;RESULT IN AC IS INCORRECT
  2325	031776	312 05 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
  2326	031777	004 05 0 00 001701 		ER4	AC+1,1701		;C(AC+1) WAS MODIFIED INCORRECTLY
  2327	032000	321 06 0 00 031771 		JUMPL	AC+2,E1700		;LOOP ON ERROR SWITCH^
  2328
  2329					;TEST ABILITY TO SHIFT A BIT LEFT ONE POSITION USING LSH
  2330						SR1	(20,0,10,0,20,LSH,1)^
  2331					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] 1 BIT
  2332					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,20]
  2333					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
  2334
  2335	032001	200 04 0 00 041617 	E2000:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2336	032002	200 05 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
  2337	032003	242 04 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
  2338	032004	312 04 0 00 041621 		CAME	AC,[XWD 0,20]	;IS RESULT IN AC CORRECT?
  2339	032005	003 04 0 00 002001 		ER3	AC,2001			;RESULT IN AC IS INCORRECT
  2340	032006	312 05 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
  2341	032007	004 05 0 00 002001 		ER4	AC+1,2001		;C(AC+1) WAS MODIFIED INCORRECTLY
  2342	032010	321 06 0 00 032001 		JUMPL	AC+2,E2000		;LOOP ON ERROR SWITCH^
  2343
  2344					;TEST ABILITY TO SHIFT A BIT RIGHT ONE POSITION USING LSH
  2345						SR1	(442,0,10,0,4,LSH,-1)^
  2346					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -1 BIT
  2347					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,4]
  2348					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
  2349
  2350	032011	200 04 0 00 041617 	E44200:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2351	032012	200 05 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
  2352	032013	242 04 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
  2353	032014	312 04 0 00 041622 		CAME	AC,[XWD 0,4]	;IS RESULT IN AC CORRECT?
  2354	032015	003 04 0 00 044201 		ER3	AC,44201			;RESULT IN AC IS INCORRECT
  2355	032016	312 05 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
  2356	032017	004 05 0 00 044201 		ER4	AC+1,44201		;C(AC+1) WAS MODIFIED INCORRECTLY
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 8-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)                    SEQ 0062

  2357	032020	321 06 0 00 032011 		JUMPL	AC+2,E44200		;LOOP ON ERROR SWITCH^
  2358
  2359					;TEST ABILITY TO SHIFT A BIT RIGHT TWO POSITIONS USING LSH
  2360						SR1	(21,0,10,0,2,LSH,-2)^
  2361					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
  2362					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
  2363					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
  2364
  2365	032021	200 04 0 00 041617 	E2100:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2366	032022	200 05 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
  2367	032023	242 04 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
  2368	032024	312 04 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
  2369	032025	003 04 0 00 002101 		ER3	AC,2101			;RESULT IN AC IS INCORRECT
  2370	032026	312 05 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
  2371	032027	004 05 0 00 002101 		ER4	AC+1,2101		;C(AC+1) WAS MODIFIED INCORRECTLY
  2372	032030	321 06 0 00 032021 		JUMPL	AC+2,E2100		;LOOP ON ERROR SWITCH^
  2373					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 8-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)                    SEQ 0063

  2374					;TEST ABILITY TO SHIFT A BIT ZERO POSITIONS USING LSHC
  2375						SR2	(22,0,10,0,10,0,10,0,10,LSHC,0)^
  2376					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
  2377					;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] 0 BIT POSITIONS AND
  2378					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,10] AND
  2379					;[XWD 0,10]
  2380
  2381	032031	200 04 0 00 041617 	E2200:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2382	032032	200 05 0 00 041617 		MOVE	AC+1,[XWD 0,10]	;INITIALIZE AC+1
  2383	032033	246 04 0 00 000000 		LSHC	AC,0			;*SHIFT/ROTATE COMBINED 0 PLACES
  2384	032034	312 04 0 00 041617 		CAME	AC,[XWD 0,10]	;IS RESULT IN AC CORRECT?
  2385	032035	003 04 0 00 002201 		ER3	AC,2201			;RESULT IN AC IS INCORRECT
  2386	032036	312 05 0 00 041617 		CAME	AC+1,[XWD 0,10]	;IS RESULT IN AC+1 CORRECT?
  2387	032037	004 05 0 00 002201 		ER4	AC+1,2201		;RESULT IN AC+1 IS INCORRECT
  2388	032040	321 06 0 00 032031 		JUMPL	AC+2,E2200		;LOOP ON ERROR SWITCH^
  2389
  2390					;TEST ABILITY TO SHIFT A BIT LEFT ONE POSITION USING LSHC
  2391						SR2	(23,0,10,0,10,0,20,0,20,LSHC,1)^
  2392					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
  2393					;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] 1 BIT POSITIONS AND
  2394					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,20] AND
  2395					;[XWD 0,20]
  2396
  2397	032041	200 04 0 00 041617 	E2300:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2398	032042	200 05 0 00 041617 		MOVE	AC+1,[XWD 0,10]	;INITIALIZE AC+1
  2399	032043	246 04 0 00 000001 		LSHC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
  2400	032044	312 04 0 00 041621 		CAME	AC,[XWD 0,20]	;IS RESULT IN AC CORRECT?
  2401	032045	003 04 0 00 002301 		ER3	AC,2301			;RESULT IN AC IS INCORRECT
  2402	032046	312 05 0 00 041621 		CAME	AC+1,[XWD 0,20]	;IS RESULT IN AC+1 CORRECT?
  2403	032047	004 05 0 00 002301 		ER4	AC+1,2301		;RESULT IN AC+1 IS INCORRECT
  2404	032050	321 06 0 00 032041 		JUMPL	AC+2,E2300		;LOOP ON ERROR SWITCH^
  2405
  2406					;TEST ABILITY TO SHIFT A BIT RIGHT ONE POSITION USING LSHC
  2407						SR2	(24,0,10,0,10,0,4,0,4,LSHC,-1)^
  2408					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
  2409					;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] -1 BIT POSITIONS AND
  2410					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,4] AND
  2411					;[XWD 0,4]
  2412
  2413	032051	200 04 0 00 041617 	E2400:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2414	032052	200 05 0 00 041617 		MOVE	AC+1,[XWD 0,10]	;INITIALIZE AC+1
  2415	032053	246 04 0 00 777777 		LSHC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
  2416	032054	312 04 0 00 041622 		CAME	AC,[XWD 0,4]	;IS RESULT IN AC CORRECT?
  2417	032055	003 04 0 00 002401 		ER3	AC,2401			;RESULT IN AC IS INCORRECT
  2418	032056	312 05 0 00 041622 		CAME	AC+1,[XWD 0,4]	;IS RESULT IN AC+1 CORRECT?
  2419	032057	004 05 0 00 002401 		ER4	AC+1,2401		;RESULT IN AC+1 IS INCORRECT
  2420	032060	321 06 0 00 032051 		JUMPL	AC+2,E2400		;LOOP ON ERROR SWITCH^
  2421
  2422					;TEST ABILITY TO SHIFT A BIT RIGHT TWO POSITIONS USING LSHC
  2423						SR2	(25,0,10,0,10,0,2,0,2,LSHC,-2)^
  2424					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
  2425					;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,10] -2 BIT POSITIONS AND
  2426					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
  2427					;[XWD 0,2]
  2428
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 8-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - BASIC SHIFT TEST (0,1,-1,-2 BIT POSITIONS)                    SEQ 0064

  2429	032061	200 04 0 00 041617 	E2500:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
  2430	032062	200 05 0 00 041617 		MOVE	AC+1,[XWD 0,10]	;INITIALIZE AC+1
  2431	032063	246 04 0 00 777776 		LSHC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
  2432	032064	312 04 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
  2433	032065	003 04 0 00 002501 		ER3	AC,2501			;RESULT IN AC IS INCORRECT
  2434	032066	312 05 0 00 041623 		CAME	AC+1,[XWD 0,2]	;IS RESULT IN AC+1 CORRECT?
  2435	032067	004 05 0 00 002501 		ER4	AC+1,2501		;RESULT IN AC+1 IS INCORRECT
  2436	032070	321 06 0 00 032061 		JUMPL	AC+2,E2500		;LOOP ON ERROR SWITCH^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SAC FUNCTION                                             SEQ 0065

  2437					SUBTTL	DIAGNOSTIC SECTION - TEST SAC FUNCTION
  2438
  2439			000010			AC=10
  2440						SAVEAC	(1,1)^
  2441	032071	201 12 0 00 032071 		MOVEI	AC+2,.		;SAVE TEST PC
  2442	032072	202 12 0 00 030051 		MOVEM	AC+2,TESTPC
  2443	032073	201 12 0 00 000012 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  2444	032074	202 12 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  2445
  2446			002600		SN=2600
  2447			000001			ZZ=1
  2448
  2449							;TEST SAC
  2450					E2600:	REPEAT	^D3,<
  2451					SN=SN+1
  2452					;FURTHER TEST OF SAC,SAC2
  2453					;TEST FOR ASSERTION OF SAC INH
  2454					;TEST ASSUMES ABILITY TO ROTATE
  2455					;TO SOME DEGREE
  2456						ZZ=ZZ+ZZ
  2457						HRRZI	AC,400000	;SET BIT 18
  2458						ROT	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2459						CAIN	AC,400000	;TEST FOR SAC
  2460						ER3	AC,SN		;STORE AC FAILED
  2461						JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
  2462					>
  2463
  2464			002601		SN=SN+1
  2465					;FURTHER TEST OF SAC,SAC2
  2466					;TEST FOR ASSERTION OF SAC INH
  2467					;TEST ASSUMES ABILITY TO ROTATE
  2468					;TO SOME DEGREE
  2469			000002			ZZ=ZZ+ZZ
  2470	032075	551 10 0 00 400000 		HRRZI	AC,400000	;SET BIT 18
  2471	032076	241 10 0 00 000002 		ROT	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2472	032077	306 10 0 00 400000 		CAIN	AC,400000	;TEST FOR SAC
  2473	032100	003 10 0 00 002601 		ER3	AC,SN		;STORE AC FAILED
  2474	032101	321 12 0 00 032075 		JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
  2475
  2476
  2477			002602		SN=SN+1
  2478					;FURTHER TEST OF SAC,SAC2
  2479					;TEST FOR ASSERTION OF SAC INH
  2480					;TEST ASSUMES ABILITY TO ROTATE
  2481					;TO SOME DEGREE
  2482			000004			ZZ=ZZ+ZZ
  2483	032102	551 10 0 00 400000 		HRRZI	AC,400000	;SET BIT 18
  2484	032103	241 10 0 00 000004 		ROT	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2485	032104	306 10 0 00 400000 		CAIN	AC,400000	;TEST FOR SAC
  2486	032105	003 10 0 00 002602 		ER3	AC,SN		;STORE AC FAILED
  2487	032106	321 12 0 00 032102 		JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
  2488
  2489
  2490			002603		SN=SN+1
  2491					;FURTHER TEST OF SAC,SAC2
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 9-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SAC FUNCTION                                             SEQ 0066

  2492					;TEST FOR ASSERTION OF SAC INH
  2493					;TEST ASSUMES ABILITY TO ROTATE
  2494					;TO SOME DEGREE
  2495			000010			ZZ=ZZ+ZZ
  2496	032107	551 10 0 00 400000 		HRRZI	AC,400000	;SET BIT 18
  2497	032110	241 10 0 00 000010 		ROT	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2498	032111	306 10 0 00 400000 		CAIN	AC,400000	;TEST FOR SAC
  2499	032112	003 10 0 00 002603 		ER3	AC,SN		;STORE AC FAILED
  2500	032113	321 12 0 00 032107 		JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
  2501
  2502					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 9-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SAC FUNCTION                                             SEQ 0067

  2503			002700		SN=2700
  2504			000001			ZZ=1
  2505
  2506							;TEST SAC
  2507					E2700:	REPEAT	^D3,<
  2508					SN=SN+1
  2509					;FURTHER TEST OF SAC,SAC2
  2510					;TEST FOR ASSERTION OF SAC INH
  2511					;TEST ASSUMES ABILITY TO ROTATE
  2512					;TO SOME DEGREE
  2513
  2514						ZZ=ZZ+ZZ
  2515						SETZ	AC,		;CLEAR AC
  2516						HRRZI	AC+1,400000	;SET BIT 18
  2517						ROTC	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2518						CAIN	AC+1,400000	;TEST FOR SAC
  2519						ER4	AC+1,SN		;STORE AC+1 FAILED
  2520						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2521					>
  2522
  2523			002701		SN=SN+1
  2524					;FURTHER TEST OF SAC,SAC2
  2525					;TEST FOR ASSERTION OF SAC INH
  2526					;TEST ASSUMES ABILITY TO ROTATE
  2527					;TO SOME DEGREE
  2528
  2529			000002			ZZ=ZZ+ZZ
  2530	032114	400 10 0 00 000000 		SETZ	AC,		;CLEAR AC
  2531	032115	551 11 0 00 400000 		HRRZI	AC+1,400000	;SET BIT 18
  2532	032116	245 10 0 00 000002 		ROTC	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2533	032117	306 11 0 00 400000 		CAIN	AC+1,400000	;TEST FOR SAC
  2534	032120	004 11 0 00 002701 		ER4	AC+1,SN		;STORE AC+1 FAILED
  2535	032121	321 12 0 00 032114 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2536
  2537
  2538			002702		SN=SN+1
  2539					;FURTHER TEST OF SAC,SAC2
  2540					;TEST FOR ASSERTION OF SAC INH
  2541					;TEST ASSUMES ABILITY TO ROTATE
  2542					;TO SOME DEGREE
  2543
  2544			000004			ZZ=ZZ+ZZ
  2545	032122	400 10 0 00 000000 		SETZ	AC,		;CLEAR AC
  2546	032123	551 11 0 00 400000 		HRRZI	AC+1,400000	;SET BIT 18
  2547	032124	245 10 0 00 000004 		ROTC	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2548	032125	306 11 0 00 400000 		CAIN	AC+1,400000	;TEST FOR SAC
  2549	032126	004 11 0 00 002702 		ER4	AC+1,SN		;STORE AC+1 FAILED
  2550	032127	321 12 0 00 032122 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2551
  2552
  2553			002703		SN=SN+1
  2554					;FURTHER TEST OF SAC,SAC2
  2555					;TEST FOR ASSERTION OF SAC INH
  2556					;TEST ASSUMES ABILITY TO ROTATE
  2557					;TO SOME DEGREE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 9-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SAC FUNCTION                                             SEQ 0068

  2558
  2559			000010			ZZ=ZZ+ZZ
  2560	032130	400 10 0 00 000000 		SETZ	AC,		;CLEAR AC
  2561	032131	551 11 0 00 400000 		HRRZI	AC+1,400000	;SET BIT 18
  2562	032132	245 10 0 00 000010 		ROTC	AC,ZZ		;*ROT LEFT (N) NUMBER OF TIMES
  2563	032133	306 11 0 00 400000 		CAIN	AC+1,400000	;TEST FOR SAC
  2564	032134	004 11 0 00 002703 		ER4	AC+1,SN		;STORE AC+1 FAILED
  2565	032135	321 12 0 00 032130 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2566
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0069

  2567					SUBTTL	DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR
  2568
  2569					;TEST ROT LEFT ONE BIT POSITION USING ALL ZEROS
  2570					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2571					;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
  2572
  2573			000011			AC=11
  2574						SAVEAC	(1,1)^
  2575	032136	201 13 0 00 032136 		MOVEI	AC+2,.		;SAVE TEST PC
  2576	032137	202 13 0 00 030051 		MOVEM	AC+2,TESTPC
  2577	032140	201 13 0 00 000013 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  2578	032141	202 13 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  2579
  2580	032142	403 11 0 00 000010 	E3000:	SETZB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ZERO
  2581	032143	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2582	032144	312 11 0 00 000010 		CAME	AC,AC-1		;TEST AC FOR ALL ZEROS
  2583	032145	003 11 0 00 003001 		ER3	AC,3001		;AD-AR GATING FAILED
  2584	032146	321 13 0 00 032147 		JUMPL	AC+2,E3100	;LOOP ON ERROR SWITCH
  2585
  2586					;TEST ROT LEFT ONE BIT POSITION USING ALL ONES
  2587					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2588					;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
  2589
  2590	032147	477 11 0 00 000010 	E3100:	SETOB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
  2591	032150	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2592	032151	312 11 0 00 000010 		CAME	AC,AC-1		;TEST AC FOR ALL ONES
  2593	032152	003 11 0 00 003101 		ER3	AC,3101		;AD-AR GATING FAILED
  2594	032153	321 13 0 00 032147 		JUMPL	AC+2,E3100	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0070

  2595			003200		SN=3200
  2596			000000			ZZ=0
  2597
  2598							;TEST AC RIGHT HALF <
  2599					E3200:	REPEAT 	^D18,<
  2600					;TEST ROT LEFT ONE BIT POSITION
  2601					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2602					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2603					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2604					;IS ONE AFTER ROTATING
  2605					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2606
  2607					SN=SN+1
  2608						ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2609						IFE	ZZ,<ZZ=1>
  2610						YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2611						MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2612						IFN	<ZZ-400000>,<
  2613						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2614						IFE	<ZZ-400000>,<
  2615						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2616						ROT	AC,1		;*ROTATE LEFT ONE
  2617						CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2618						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2619						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2620					>
  2621
  2622					;TEST ROT LEFT ONE BIT POSITION
  2623					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2624					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2625					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2626					;IS ONE AFTER ROTATING
  2627					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2628
  2629			003201		SN=SN+1
  2630			000000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2631			000001			IFE	ZZ,<ZZ=1>
  2632			000002			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2633	032154	201 11 0 00 000001 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2634						IFN	<ZZ-400000>,<
  2635	032155	201 10 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2636						IFE	<ZZ-400000>,<
  2637						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2638	032156	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2639	032157	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2640	032160	003 11 0 00 003201 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2641	032161	321 13 0 00 032154 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2642
  2643
  2644					;TEST ROT LEFT ONE BIT POSITION
  2645					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2646					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2647					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2648					;IS ONE AFTER ROTATING
  2649					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0071

  2650
  2651			003202		SN=SN+1
  2652			000002			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2653						IFE	ZZ,<ZZ=1>
  2654			000004			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2655	032162	201 11 0 00 000002 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2656						IFN	<ZZ-400000>,<
  2657	032163	201 10 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2658						IFE	<ZZ-400000>,<
  2659						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2660	032164	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2661	032165	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2662	032166	003 11 0 00 003202 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2663	032167	321 13 0 00 032162 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2664
  2665
  2666					;TEST ROT LEFT ONE BIT POSITION
  2667					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2668					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2669					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2670					;IS ONE AFTER ROTATING
  2671					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2672
  2673			003203		SN=SN+1
  2674			000004			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2675						IFE	ZZ,<ZZ=1>
  2676			000010			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2677	032170	201 11 0 00 000004 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2678						IFN	<ZZ-400000>,<
  2679	032171	201 10 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2680						IFE	<ZZ-400000>,<
  2681						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2682	032172	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2683	032173	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2684	032174	003 11 0 00 003203 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2685	032175	321 13 0 00 032170 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2686
  2687
  2688					;TEST ROT LEFT ONE BIT POSITION
  2689					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2690					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2691					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2692					;IS ONE AFTER ROTATING
  2693					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2694
  2695			003204		SN=SN+1
  2696			000010			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2697						IFE	ZZ,<ZZ=1>
  2698			000020			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2699	032176	201 11 0 00 000010 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2700						IFN	<ZZ-400000>,<
  2701	032177	201 10 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2702						IFE	<ZZ-400000>,<
  2703						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2704	032200	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0072

  2705	032201	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2706	032202	003 11 0 00 003204 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2707	032203	321 13 0 00 032176 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2708
  2709
  2710					;TEST ROT LEFT ONE BIT POSITION
  2711					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2712					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2713					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2714					;IS ONE AFTER ROTATING
  2715					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2716
  2717			003205		SN=SN+1
  2718			000020			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2719						IFE	ZZ,<ZZ=1>
  2720			000040			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2721	032204	201 11 0 00 000020 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2722						IFN	<ZZ-400000>,<
  2723	032205	201 10 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2724						IFE	<ZZ-400000>,<
  2725						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2726	032206	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2727	032207	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2728	032210	003 11 0 00 003205 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2729	032211	321 13 0 00 032204 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2730
  2731
  2732					;TEST ROT LEFT ONE BIT POSITION
  2733					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2734					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2735					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2736					;IS ONE AFTER ROTATING
  2737					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2738
  2739			003206		SN=SN+1
  2740			000040			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2741						IFE	ZZ,<ZZ=1>
  2742			000100			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2743	032212	201 11 0 00 000040 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2744						IFN	<ZZ-400000>,<
  2745	032213	201 10 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2746						IFE	<ZZ-400000>,<
  2747						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2748	032214	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2749	032215	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2750	032216	003 11 0 00 003206 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2751	032217	321 13 0 00 032212 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2752
  2753
  2754					;TEST ROT LEFT ONE BIT POSITION
  2755					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2756					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2757					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2758					;IS ONE AFTER ROTATING
  2759					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0073

  2760
  2761			003207		SN=SN+1
  2762			000100			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2763						IFE	ZZ,<ZZ=1>
  2764			000200			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2765	032220	201 11 0 00 000100 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2766						IFN	<ZZ-400000>,<
  2767	032221	201 10 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2768						IFE	<ZZ-400000>,<
  2769						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2770	032222	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2771	032223	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2772	032224	003 11 0 00 003207 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2773	032225	321 13 0 00 032220 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2774
  2775
  2776					;TEST ROT LEFT ONE BIT POSITION
  2777					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2778					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2779					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2780					;IS ONE AFTER ROTATING
  2781					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2782
  2783			003210		SN=SN+1
  2784			000200			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2785						IFE	ZZ,<ZZ=1>
  2786			000400			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2787	032226	201 11 0 00 000200 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2788						IFN	<ZZ-400000>,<
  2789	032227	201 10 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2790						IFE	<ZZ-400000>,<
  2791						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2792	032230	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2793	032231	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2794	032232	003 11 0 00 003210 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2795	032233	321 13 0 00 032226 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2796
  2797
  2798					;TEST ROT LEFT ONE BIT POSITION
  2799					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2800					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2801					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2802					;IS ONE AFTER ROTATING
  2803					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2804
  2805			003211		SN=SN+1
  2806			000400			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2807						IFE	ZZ,<ZZ=1>
  2808			001000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2809	032234	201 11 0 00 000400 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2810						IFN	<ZZ-400000>,<
  2811	032235	201 10 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2812						IFE	<ZZ-400000>,<
  2813						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2814	032236	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0074

  2815	032237	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2816	032240	003 11 0 00 003211 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2817	032241	321 13 0 00 032234 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2818
  2819
  2820					;TEST ROT LEFT ONE BIT POSITION
  2821					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2822					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2823					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2824					;IS ONE AFTER ROTATING
  2825					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2826
  2827			003212		SN=SN+1
  2828			001000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2829						IFE	ZZ,<ZZ=1>
  2830			002000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2831	032242	201 11 0 00 001000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2832						IFN	<ZZ-400000>,<
  2833	032243	201 10 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2834						IFE	<ZZ-400000>,<
  2835						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2836	032244	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2837	032245	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2838	032246	003 11 0 00 003212 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2839	032247	321 13 0 00 032242 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2840
  2841
  2842					;TEST ROT LEFT ONE BIT POSITION
  2843					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2844					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2845					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2846					;IS ONE AFTER ROTATING
  2847					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2848
  2849			003213		SN=SN+1
  2850			002000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2851						IFE	ZZ,<ZZ=1>
  2852			004000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2853	032250	201 11 0 00 002000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2854						IFN	<ZZ-400000>,<
  2855	032251	201 10 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2856						IFE	<ZZ-400000>,<
  2857						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2858	032252	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2859	032253	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2860	032254	003 11 0 00 003213 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2861	032255	321 13 0 00 032250 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2862
  2863
  2864					;TEST ROT LEFT ONE BIT POSITION
  2865					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2866					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2867					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2868					;IS ONE AFTER ROTATING
  2869					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0075

  2870
  2871			003214		SN=SN+1
  2872			004000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2873						IFE	ZZ,<ZZ=1>
  2874			010000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2875	032256	201 11 0 00 004000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2876						IFN	<ZZ-400000>,<
  2877	032257	201 10 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2878						IFE	<ZZ-400000>,<
  2879						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2880	032260	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2881	032261	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2882	032262	003 11 0 00 003214 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2883	032263	321 13 0 00 032256 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2884
  2885
  2886					;TEST ROT LEFT ONE BIT POSITION
  2887					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2888					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2889					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2890					;IS ONE AFTER ROTATING
  2891					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2892
  2893			003215		SN=SN+1
  2894			010000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2895						IFE	ZZ,<ZZ=1>
  2896			020000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2897	032264	201 11 0 00 010000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2898						IFN	<ZZ-400000>,<
  2899	032265	201 10 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2900						IFE	<ZZ-400000>,<
  2901						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2902	032266	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2903	032267	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2904	032270	003 11 0 00 003215 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2905	032271	321 13 0 00 032264 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2906
  2907
  2908					;TEST ROT LEFT ONE BIT POSITION
  2909					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2910					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2911					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2912					;IS ONE AFTER ROTATING
  2913					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2914
  2915			003216		SN=SN+1
  2916			020000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2917						IFE	ZZ,<ZZ=1>
  2918			040000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2919	032272	201 11 0 00 020000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2920						IFN	<ZZ-400000>,<
  2921	032273	201 10 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2922						IFE	<ZZ-400000>,<
  2923						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2924	032274	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0076

  2925	032275	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2926	032276	003 11 0 00 003216 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2927	032277	321 13 0 00 032272 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2928
  2929
  2930					;TEST ROT LEFT ONE BIT POSITION
  2931					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2932					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2933					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2934					;IS ONE AFTER ROTATING
  2935					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2936
  2937			003217		SN=SN+1
  2938			040000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2939						IFE	ZZ,<ZZ=1>
  2940			100000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2941	032300	201 11 0 00 040000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2942						IFN	<ZZ-400000>,<
  2943	032301	201 10 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2944						IFE	<ZZ-400000>,<
  2945						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2946	032302	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2947	032303	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2948	032304	003 11 0 00 003217 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2949	032305	321 13 0 00 032300 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2950
  2951
  2952					;TEST ROT LEFT ONE BIT POSITION
  2953					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2954					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2955					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2956					;IS ONE AFTER ROTATING
  2957					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  2958
  2959			003220		SN=SN+1
  2960			100000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2961						IFE	ZZ,<ZZ=1>
  2962			200000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2963	032306	201 11 0 00 100000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2964						IFN	<ZZ-400000>,<
  2965	032307	201 10 0 00 200000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2966						IFE	<ZZ-400000>,<
  2967						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2968	032310	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2969	032311	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2970	032312	003 11 0 00 003220 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2971	032313	321 13 0 00 032306 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2972
  2973
  2974					;TEST ROT LEFT ONE BIT POSITION
  2975					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2976					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2977					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  2978					;IS ONE AFTER ROTATING
  2979					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0077

  2980
  2981			003221		SN=SN+1
  2982			200000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  2983						IFE	ZZ,<ZZ=1>
  2984			400000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  2985	032314	201 11 0 00 200000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  2986						IFN	<ZZ-400000>,<
  2987	032315	201 10 0 00 400000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  2988						IFE	<ZZ-400000>,<
  2989						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  2990	032316	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  2991	032317	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  2992	032320	003 11 0 00 003221 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  2993	032321	321 13 0 00 032314 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  2994
  2995
  2996					;TEST ROT LEFT ONE BIT POSITION
  2997					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  2998					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  2999					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT
  3000					;IS ONE AFTER ROTATING
  3001					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3002
  3003			003222		SN=SN+1
  3004			400000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3005						IFE	ZZ,<ZZ=1>
  3006		000001	000000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3007	032322	201 11 0 00 400000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  3008						IFN	<ZZ-400000>,<
  3009						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  3010						IFE	<ZZ-400000>,<
  3011	032323	205 10 0 00 000001 		MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  3012	032324	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3013	032325	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3014	032326	003 11 0 00 003222 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3015	032327	321 13 0 00 032322 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3016
  3017					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0078

  3018			000000			ZZ=0
  3019
  3020							;TEST AC LEFT HALF <
  3021						REPEAT	^D18,<;TEST ROT LEFT ONE BIT POSITION
  3022					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3023					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3024					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3025					;ONE AFTER ROTATING
  3026					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3027
  3028					SN=SN+1
  3029
  3030						ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3031						IFE	ZZ,<ZZ=1>
  3032						YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3033						MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3034						IFN	<ZZ-400000>,<
  3035						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3036						IFE	<ZZ-400000>,<
  3037						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3038						ROT	AC,1		;*ROTATE LEFT ONE
  3039						CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3040						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3041						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3042					>
  3043					;TEST ROT LEFT ONE BIT POSITION
  3044					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3045					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3046					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3047					;ONE AFTER ROTATING
  3048					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3049
  3050			003223		SN=SN+1
  3051
  3052			000000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3053			000001			IFE	ZZ,<ZZ=1>
  3054			000002			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3055	032330	205 11 0 00 000001 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3056						IFN	<ZZ-400000>,<
  3057	032331	205 10 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3058						IFE	<ZZ-400000>,<
  3059						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3060	032332	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3061	032333	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3062	032334	003 11 0 00 003223 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3063	032335	321 13 0 00 032330 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3064
  3065					;TEST ROT LEFT ONE BIT POSITION
  3066					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3067					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3068					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3069					;ONE AFTER ROTATING
  3070					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3071
  3072			003224		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0079

  3073
  3074			000002			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3075						IFE	ZZ,<ZZ=1>
  3076			000004			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3077	032336	205 11 0 00 000002 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3078						IFN	<ZZ-400000>,<
  3079	032337	205 10 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3080						IFE	<ZZ-400000>,<
  3081						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3082	032340	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3083	032341	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3084	032342	003 11 0 00 003224 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3085	032343	321 13 0 00 032336 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3086
  3087					;TEST ROT LEFT ONE BIT POSITION
  3088					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3089					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3090					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3091					;ONE AFTER ROTATING
  3092					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3093
  3094			003225		SN=SN+1
  3095
  3096			000004			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3097						IFE	ZZ,<ZZ=1>
  3098			000010			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3099	032344	205 11 0 00 000004 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3100						IFN	<ZZ-400000>,<
  3101	032345	205 10 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3102						IFE	<ZZ-400000>,<
  3103						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3104	032346	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3105	032347	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3106	032350	003 11 0 00 003225 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3107	032351	321 13 0 00 032344 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3108
  3109					;TEST ROT LEFT ONE BIT POSITION
  3110					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3111					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3112					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3113					;ONE AFTER ROTATING
  3114					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3115
  3116			003226		SN=SN+1
  3117
  3118			000010			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3119						IFE	ZZ,<ZZ=1>
  3120			000020			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3121	032352	205 11 0 00 000010 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3122						IFN	<ZZ-400000>,<
  3123	032353	205 10 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3124						IFE	<ZZ-400000>,<
  3125						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3126	032354	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3127	032355	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0080

  3128	032356	003 11 0 00 003226 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3129	032357	321 13 0 00 032352 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3130
  3131					;TEST ROT LEFT ONE BIT POSITION
  3132					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3133					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3134					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3135					;ONE AFTER ROTATING
  3136					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3137
  3138			003227		SN=SN+1
  3139
  3140			000020			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3141						IFE	ZZ,<ZZ=1>
  3142			000040			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3143	032360	205 11 0 00 000020 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3144						IFN	<ZZ-400000>,<
  3145	032361	205 10 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3146						IFE	<ZZ-400000>,<
  3147						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3148	032362	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3149	032363	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3150	032364	003 11 0 00 003227 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3151	032365	321 13 0 00 032360 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3152
  3153					;TEST ROT LEFT ONE BIT POSITION
  3154					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3155					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3156					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3157					;ONE AFTER ROTATING
  3158					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3159
  3160			003230		SN=SN+1
  3161
  3162			000040			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3163						IFE	ZZ,<ZZ=1>
  3164			000100			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3165	032366	205 11 0 00 000040 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3166						IFN	<ZZ-400000>,<
  3167	032367	205 10 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3168						IFE	<ZZ-400000>,<
  3169						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3170	032370	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3171	032371	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3172	032372	003 11 0 00 003230 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3173	032373	321 13 0 00 032366 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3174
  3175					;TEST ROT LEFT ONE BIT POSITION
  3176					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3177					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3178					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3179					;ONE AFTER ROTATING
  3180					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3181
  3182			003231		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0081

  3183
  3184			000100			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3185						IFE	ZZ,<ZZ=1>
  3186			000200			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3187	032374	205 11 0 00 000100 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3188						IFN	<ZZ-400000>,<
  3189	032375	205 10 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3190						IFE	<ZZ-400000>,<
  3191						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3192	032376	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3193	032377	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3194	032400	003 11 0 00 003231 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3195	032401	321 13 0 00 032374 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3196
  3197					;TEST ROT LEFT ONE BIT POSITION
  3198					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3199					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3200					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3201					;ONE AFTER ROTATING
  3202					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3203
  3204			003232		SN=SN+1
  3205
  3206			000200			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3207						IFE	ZZ,<ZZ=1>
  3208			000400			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3209	032402	205 11 0 00 000200 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3210						IFN	<ZZ-400000>,<
  3211	032403	205 10 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3212						IFE	<ZZ-400000>,<
  3213						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3214	032404	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3215	032405	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3216	032406	003 11 0 00 003232 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3217	032407	321 13 0 00 032402 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3218
  3219					;TEST ROT LEFT ONE BIT POSITION
  3220					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3221					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3222					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3223					;ONE AFTER ROTATING
  3224					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3225
  3226			003233		SN=SN+1
  3227
  3228			000400			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3229						IFE	ZZ,<ZZ=1>
  3230			001000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3231	032410	205 11 0 00 000400 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3232						IFN	<ZZ-400000>,<
  3233	032411	205 10 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3234						IFE	<ZZ-400000>,<
  3235						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3236	032412	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3237	032413	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0082

  3238	032414	003 11 0 00 003233 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3239	032415	321 13 0 00 032410 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3240
  3241					;TEST ROT LEFT ONE BIT POSITION
  3242					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3243					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3244					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3245					;ONE AFTER ROTATING
  3246					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3247
  3248			003234		SN=SN+1
  3249
  3250			001000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3251						IFE	ZZ,<ZZ=1>
  3252			002000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3253	032416	205 11 0 00 001000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3254						IFN	<ZZ-400000>,<
  3255	032417	205 10 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3256						IFE	<ZZ-400000>,<
  3257						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3258	032420	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3259	032421	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3260	032422	003 11 0 00 003234 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3261	032423	321 13 0 00 032416 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3262
  3263					;TEST ROT LEFT ONE BIT POSITION
  3264					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3265					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3266					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3267					;ONE AFTER ROTATING
  3268					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3269
  3270			003235		SN=SN+1
  3271
  3272			002000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3273						IFE	ZZ,<ZZ=1>
  3274			004000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3275	032424	205 11 0 00 002000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3276						IFN	<ZZ-400000>,<
  3277	032425	205 10 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3278						IFE	<ZZ-400000>,<
  3279						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3280	032426	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3281	032427	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3282	032430	003 11 0 00 003235 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3283	032431	321 13 0 00 032424 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3284
  3285					;TEST ROT LEFT ONE BIT POSITION
  3286					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3287					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3288					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3289					;ONE AFTER ROTATING
  3290					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3291
  3292			003236		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0083

  3293
  3294			004000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3295						IFE	ZZ,<ZZ=1>
  3296			010000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3297	032432	205 11 0 00 004000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3298						IFN	<ZZ-400000>,<
  3299	032433	205 10 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3300						IFE	<ZZ-400000>,<
  3301						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3302	032434	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3303	032435	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3304	032436	003 11 0 00 003236 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3305	032437	321 13 0 00 032432 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3306
  3307					;TEST ROT LEFT ONE BIT POSITION
  3308					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3309					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3310					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3311					;ONE AFTER ROTATING
  3312					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3313
  3314			003237		SN=SN+1
  3315
  3316			010000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3317						IFE	ZZ,<ZZ=1>
  3318			020000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3319	032440	205 11 0 00 010000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3320						IFN	<ZZ-400000>,<
  3321	032441	205 10 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3322						IFE	<ZZ-400000>,<
  3323						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3324	032442	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3325	032443	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3326	032444	003 11 0 00 003237 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3327	032445	321 13 0 00 032440 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3328
  3329					;TEST ROT LEFT ONE BIT POSITION
  3330					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3331					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3332					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3333					;ONE AFTER ROTATING
  3334					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3335
  3336			003240		SN=SN+1
  3337
  3338			020000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3339						IFE	ZZ,<ZZ=1>
  3340			040000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3341	032446	205 11 0 00 020000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3342						IFN	<ZZ-400000>,<
  3343	032447	205 10 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3344						IFE	<ZZ-400000>,<
  3345						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3346	032450	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3347	032451	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0084

  3348	032452	003 11 0 00 003240 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3349	032453	321 13 0 00 032446 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3350
  3351					;TEST ROT LEFT ONE BIT POSITION
  3352					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3353					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3354					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3355					;ONE AFTER ROTATING
  3356					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3357
  3358			003241		SN=SN+1
  3359
  3360			040000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3361						IFE	ZZ,<ZZ=1>
  3362			100000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3363	032454	205 11 0 00 040000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3364						IFN	<ZZ-400000>,<
  3365	032455	205 10 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3366						IFE	<ZZ-400000>,<
  3367						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3368	032456	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3369	032457	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3370	032460	003 11 0 00 003241 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3371	032461	321 13 0 00 032454 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3372
  3373					;TEST ROT LEFT ONE BIT POSITION
  3374					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3375					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3376					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3377					;ONE AFTER ROTATING
  3378					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3379
  3380			003242		SN=SN+1
  3381
  3382			100000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3383						IFE	ZZ,<ZZ=1>
  3384			200000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3385	032462	205 11 0 00 100000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3386						IFN	<ZZ-400000>,<
  3387	032463	205 10 0 00 200000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3388						IFE	<ZZ-400000>,<
  3389						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3390	032464	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3391	032465	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3392	032466	003 11 0 00 003242 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3393	032467	321 13 0 00 032462 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3394
  3395					;TEST ROT LEFT ONE BIT POSITION
  3396					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3397					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3398					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3399					;ONE AFTER ROTATING
  3400					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3401
  3402			003243		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 11-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0085

  3403
  3404			200000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3405						IFE	ZZ,<ZZ=1>
  3406			400000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3407	032470	205 11 0 00 200000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3408						IFN	<ZZ-400000>,<
  3409	032471	205 10 0 00 400000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3410						IFE	<ZZ-400000>,<
  3411						MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3412	032472	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3413	032473	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3414	032474	003 11 0 00 003243 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3415	032475	321 13 0 00 032470 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3416
  3417					;TEST ROT LEFT ONE BIT POSITION
  3418					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  3419					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3420					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  3421					;ONE AFTER ROTATING
  3422					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  3423
  3424			003244		SN=SN+1
  3425
  3426			400000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  3427						IFE	ZZ,<ZZ=1>
  3428		000001	000000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  3429	032476	205 11 0 00 400000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  3430						IFN	<ZZ-400000>,<
  3431						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  3432						IFE	<ZZ-400000>,<
  3433	032477	201 10 0 00 000001 		MOVEI	AC-1,1		;SETUP FOR COMPARISON>
  3434	032500	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3435	032501	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ONE
  3436	032502	003 11 0 00 003244 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3437	032503	321 13 0 00 032476 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3438
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0086

  3439			003300		SN=3300
  3440			000000			ZZ=0
  3441
  3442						;TEST AC RIGHT HALF<
  3443					E3300:	REPEAT	^D18,<;TEST ROT LEFT ONE BIT POSITION
  3444					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3445					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3446					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3447					;IS ZERO AFTER ROTATING.
  3448					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3449
  3450					SN=SN+1
  3451						ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3452						IFE	<ZZ-1>,<ZZ=-2>
  3453						YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3454						HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3455						IFN	<<ZZ-377777>&377777>,<
  3456						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3457						IFE	<<ZZ-377777>&777777>,<
  3458						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3459						ROT	AC,1		;*ROTATE LEFT ONE
  3460						CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3461						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3462						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3463					>
  3464					;TEST ROT LEFT ONE BIT POSITION
  3465					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3466					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3467					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3468					;IS ZERO AFTER ROTATING.
  3469					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3470
  3471			003301		SN=SN+1
  3472			000001			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3473		777777	777776			IFE	<ZZ-1>,<ZZ=-2>
  3474			777775			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3475	032504	561 11 0 00 777776 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3476						IFN	<<ZZ-377777>&377777>,<
  3477	032505	561 10 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3478						IFE	<<ZZ-377777>&777777>,<
  3479						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3480	032506	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3481	032507	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3482	032510	003 11 0 00 003301 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3483	032511	321 13 0 00 032504 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3484
  3485					;TEST ROT LEFT ONE BIT POSITION
  3486					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3487					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3488					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3489					;IS ZERO AFTER ROTATING.
  3490					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3491
  3492			003302		SN=SN+1
  3493		777777	777775			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0087

  3494						IFE	<ZZ-1>,<ZZ=-2>
  3495			777773			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3496	032512	561 11 0 00 777775 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3497						IFN	<<ZZ-377777>&377777>,<
  3498	032513	561 10 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3499						IFE	<<ZZ-377777>&777777>,<
  3500						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3501	032514	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3502	032515	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3503	032516	003 11 0 00 003302 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3504	032517	321 13 0 00 032512 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3505
  3506					;TEST ROT LEFT ONE BIT POSITION
  3507					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3508					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3509					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3510					;IS ZERO AFTER ROTATING.
  3511					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3512
  3513			003303		SN=SN+1
  3514		777777	777773			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3515						IFE	<ZZ-1>,<ZZ=-2>
  3516			777767			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3517	032520	561 11 0 00 777773 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3518						IFN	<<ZZ-377777>&377777>,<
  3519	032521	561 10 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3520						IFE	<<ZZ-377777>&777777>,<
  3521						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3522	032522	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3523	032523	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3524	032524	003 11 0 00 003303 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3525	032525	321 13 0 00 032520 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3526
  3527					;TEST ROT LEFT ONE BIT POSITION
  3528					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3529					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3530					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3531					;IS ZERO AFTER ROTATING.
  3532					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3533
  3534			003304		SN=SN+1
  3535		777777	777767			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3536						IFE	<ZZ-1>,<ZZ=-2>
  3537			777757			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3538	032526	561 11 0 00 777767 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3539						IFN	<<ZZ-377777>&377777>,<
  3540	032527	561 10 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3541						IFE	<<ZZ-377777>&777777>,<
  3542						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3543	032530	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3544	032531	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3545	032532	003 11 0 00 003304 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3546	032533	321 13 0 00 032526 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3547
  3548					;TEST ROT LEFT ONE BIT POSITION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0088

  3549					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3550					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3551					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3552					;IS ZERO AFTER ROTATING.
  3553					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3554
  3555			003305		SN=SN+1
  3556		777777	777757			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3557						IFE	<ZZ-1>,<ZZ=-2>
  3558			777737			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3559	032534	561 11 0 00 777757 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3560						IFN	<<ZZ-377777>&377777>,<
  3561	032535	561 10 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3562						IFE	<<ZZ-377777>&777777>,<
  3563						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3564	032536	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3565	032537	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3566	032540	003 11 0 00 003305 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3567	032541	321 13 0 00 032534 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3568
  3569					;TEST ROT LEFT ONE BIT POSITION
  3570					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3571					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3572					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3573					;IS ZERO AFTER ROTATING.
  3574					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3575
  3576			003306		SN=SN+1
  3577		777777	777737			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3578						IFE	<ZZ-1>,<ZZ=-2>
  3579			777677			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3580	032542	561 11 0 00 777737 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3581						IFN	<<ZZ-377777>&377777>,<
  3582	032543	561 10 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3583						IFE	<<ZZ-377777>&777777>,<
  3584						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3585	032544	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3586	032545	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3587	032546	003 11 0 00 003306 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3588	032547	321 13 0 00 032542 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3589
  3590					;TEST ROT LEFT ONE BIT POSITION
  3591					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3592					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3593					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3594					;IS ZERO AFTER ROTATING.
  3595					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3596
  3597			003307		SN=SN+1
  3598		777777	777677			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3599						IFE	<ZZ-1>,<ZZ=-2>
  3600			777577			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3601	032550	561 11 0 00 777677 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3602						IFN	<<ZZ-377777>&377777>,<
  3603	032551	561 10 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0089

  3604						IFE	<<ZZ-377777>&777777>,<
  3605						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3606	032552	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3607	032553	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3608	032554	003 11 0 00 003307 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3609	032555	321 13 0 00 032550 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3610
  3611					;TEST ROT LEFT ONE BIT POSITION
  3612					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3613					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3614					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3615					;IS ZERO AFTER ROTATING.
  3616					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3617
  3618			003310		SN=SN+1
  3619		777777	777577			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3620						IFE	<ZZ-1>,<ZZ=-2>
  3621			777377			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3622	032556	561 11 0 00 777577 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3623						IFN	<<ZZ-377777>&377777>,<
  3624	032557	561 10 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3625						IFE	<<ZZ-377777>&777777>,<
  3626						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3627	032560	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3628	032561	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3629	032562	003 11 0 00 003310 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3630	032563	321 13 0 00 032556 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3631
  3632					;TEST ROT LEFT ONE BIT POSITION
  3633					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3634					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3635					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3636					;IS ZERO AFTER ROTATING.
  3637					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3638
  3639			003311		SN=SN+1
  3640		777777	777377			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3641						IFE	<ZZ-1>,<ZZ=-2>
  3642			776777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3643	032564	561 11 0 00 777377 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3644						IFN	<<ZZ-377777>&377777>,<
  3645	032565	561 10 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3646						IFE	<<ZZ-377777>&777777>,<
  3647						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3648	032566	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3649	032567	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3650	032570	003 11 0 00 003311 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3651	032571	321 13 0 00 032564 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3652
  3653					;TEST ROT LEFT ONE BIT POSITION
  3654					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3655					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3656					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3657					;IS ZERO AFTER ROTATING.
  3658					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0090

  3659
  3660			003312		SN=SN+1
  3661		777777	776777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3662						IFE	<ZZ-1>,<ZZ=-2>
  3663			775777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3664	032572	561 11 0 00 776777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3665						IFN	<<ZZ-377777>&377777>,<
  3666	032573	561 10 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3667						IFE	<<ZZ-377777>&777777>,<
  3668						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3669	032574	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3670	032575	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3671	032576	003 11 0 00 003312 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3672	032577	321 13 0 00 032572 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3673
  3674					;TEST ROT LEFT ONE BIT POSITION
  3675					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3676					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3677					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3678					;IS ZERO AFTER ROTATING.
  3679					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3680
  3681			003313		SN=SN+1
  3682		777777	775777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3683						IFE	<ZZ-1>,<ZZ=-2>
  3684			773777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3685	032600	561 11 0 00 775777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3686						IFN	<<ZZ-377777>&377777>,<
  3687	032601	561 10 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3688						IFE	<<ZZ-377777>&777777>,<
  3689						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3690	032602	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3691	032603	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3692	032604	003 11 0 00 003313 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3693	032605	321 13 0 00 032600 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3694
  3695					;TEST ROT LEFT ONE BIT POSITION
  3696					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3697					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3698					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3699					;IS ZERO AFTER ROTATING.
  3700					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3701
  3702			003314		SN=SN+1
  3703		777777	773777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3704						IFE	<ZZ-1>,<ZZ=-2>
  3705			767777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3706	032606	561 11 0 00 773777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3707						IFN	<<ZZ-377777>&377777>,<
  3708	032607	561 10 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3709						IFE	<<ZZ-377777>&777777>,<
  3710						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3711	032610	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3712	032611	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3713	032612	003 11 0 00 003314 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0091

  3714	032613	321 13 0 00 032606 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3715
  3716					;TEST ROT LEFT ONE BIT POSITION
  3717					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3718					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3719					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3720					;IS ZERO AFTER ROTATING.
  3721					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3722
  3723			003315		SN=SN+1
  3724		777777	767777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3725						IFE	<ZZ-1>,<ZZ=-2>
  3726			757777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3727	032614	561 11 0 00 767777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3728						IFN	<<ZZ-377777>&377777>,<
  3729	032615	561 10 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3730						IFE	<<ZZ-377777>&777777>,<
  3731						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3732	032616	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3733	032617	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3734	032620	003 11 0 00 003315 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3735	032621	321 13 0 00 032614 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3736
  3737					;TEST ROT LEFT ONE BIT POSITION
  3738					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3739					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3740					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3741					;IS ZERO AFTER ROTATING.
  3742					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3743
  3744			003316		SN=SN+1
  3745		777777	757777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3746						IFE	<ZZ-1>,<ZZ=-2>
  3747			737777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3748	032622	561 11 0 00 757777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3749						IFN	<<ZZ-377777>&377777>,<
  3750	032623	561 10 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3751						IFE	<<ZZ-377777>&777777>,<
  3752						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3753	032624	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3754	032625	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3755	032626	003 11 0 00 003316 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3756	032627	321 13 0 00 032622 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3757
  3758					;TEST ROT LEFT ONE BIT POSITION
  3759					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3760					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3761					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3762					;IS ZERO AFTER ROTATING.
  3763					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3764
  3765			003317		SN=SN+1
  3766		777777	737777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3767						IFE	<ZZ-1>,<ZZ=-2>
  3768			677777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0092

  3769	032630	561 11 0 00 737777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3770						IFN	<<ZZ-377777>&377777>,<
  3771	032631	561 10 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3772						IFE	<<ZZ-377777>&777777>,<
  3773						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3774	032632	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3775	032633	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3776	032634	003 11 0 00 003317 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3777	032635	321 13 0 00 032630 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3778
  3779					;TEST ROT LEFT ONE BIT POSITION
  3780					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3781					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3782					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3783					;IS ZERO AFTER ROTATING.
  3784					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3785
  3786			003320		SN=SN+1
  3787		777777	677777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3788						IFE	<ZZ-1>,<ZZ=-2>
  3789			577777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3790	032636	561 11 0 00 677777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3791						IFN	<<ZZ-377777>&377777>,<
  3792	032637	561 10 0 00 577777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3793						IFE	<<ZZ-377777>&777777>,<
  3794						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3795	032640	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3796	032641	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3797	032642	003 11 0 00 003320 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3798	032643	321 13 0 00 032636 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3799
  3800					;TEST ROT LEFT ONE BIT POSITION
  3801					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3802					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3803					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3804					;IS ZERO AFTER ROTATING.
  3805					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3806
  3807			003321		SN=SN+1
  3808		777777	577777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3809						IFE	<ZZ-1>,<ZZ=-2>
  3810			377777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3811	032644	561 11 0 00 577777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3812						IFN	<<ZZ-377777>&377777>,<
  3813	032645	561 10 0 00 377777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3814						IFE	<<ZZ-377777>&777777>,<
  3815						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3816	032646	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3817	032647	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3818	032650	003 11 0 00 003321 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3819	032651	321 13 0 00 032644 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3820
  3821					;TEST ROT LEFT ONE BIT POSITION
  3822					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3823					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0093

  3824					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3825					;IS ZERO AFTER ROTATING.
  3826					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3827
  3828			003322		SN=SN+1
  3829		777777	377777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3830						IFE	<ZZ-1>,<ZZ=-2>
  3831			777777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3832	032652	561 11 0 00 377777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  3833						IFN	<<ZZ-377777>&377777>,<
  3834						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  3835						IFE	<<ZZ-377777>&777777>,<
  3836	032653	525 10 0 00 777776 		HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  3837	032654	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3838	032655	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) A ZERO
  3839	032656	003 11 0 00 003322 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3840	032657	321 13 0 00 032652 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3841
  3842					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0094

  3843			000000			ZZ=0
  3844						;TEST AC LEFT HALF<
  3845						REPEAT	^D18,<;TEST ROT LEFT ONE BIT POSITION
  3846					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3847					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3848					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3849					;IS ZERO AFTER ROTATING.
  3850					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3851
  3852					SN=SN+1
  3853						ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3854						IFE	<ZZ-1>,<ZZ=-2>
  3855						YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3856						HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3857						IFN	<<ZZ-377777>&777777>,<
  3858						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3859						IFE	<<ZZ-377777>&777777>,<
  3860						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3861						ROT	AC,1		;*ROTATE LEFT ONE
  3862						CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3863						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3864						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3865					>
  3866					;TEST ROT LEFT ONE BIT POSITION
  3867					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3868					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3869					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3870					;IS ZERO AFTER ROTATING.
  3871					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3872
  3873			003323		SN=SN+1
  3874			000001			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3875		777777	777776			IFE	<ZZ-1>,<ZZ=-2>
  3876			777775			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3877	032660	525 11 0 00 777776 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3878						IFN	<<ZZ-377777>&777777>,<
  3879	032661	525 10 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3880						IFE	<<ZZ-377777>&777777>,<
  3881						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3882	032662	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3883	032663	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3884	032664	003 11 0 00 003323 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3885	032665	321 13 0 00 032660 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3886
  3887					;TEST ROT LEFT ONE BIT POSITION
  3888					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3889					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3890					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3891					;IS ZERO AFTER ROTATING.
  3892					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3893
  3894			003324		SN=SN+1
  3895		777777	777775			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3896						IFE	<ZZ-1>,<ZZ=-2>
  3897			777773			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0095

  3898	032666	525 11 0 00 777775 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3899						IFN	<<ZZ-377777>&777777>,<
  3900	032667	525 10 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3901						IFE	<<ZZ-377777>&777777>,<
  3902						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3903	032670	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3904	032671	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3905	032672	003 11 0 00 003324 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3906	032673	321 13 0 00 032666 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3907
  3908					;TEST ROT LEFT ONE BIT POSITION
  3909					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3910					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3911					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3912					;IS ZERO AFTER ROTATING.
  3913					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3914
  3915			003325		SN=SN+1
  3916		777777	777773			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3917						IFE	<ZZ-1>,<ZZ=-2>
  3918			777767			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3919	032674	525 11 0 00 777773 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3920						IFN	<<ZZ-377777>&777777>,<
  3921	032675	525 10 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3922						IFE	<<ZZ-377777>&777777>,<
  3923						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3924	032676	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3925	032677	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3926	032700	003 11 0 00 003325 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3927	032701	321 13 0 00 032674 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3928
  3929					;TEST ROT LEFT ONE BIT POSITION
  3930					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3931					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3932					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3933					;IS ZERO AFTER ROTATING.
  3934					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3935
  3936			003326		SN=SN+1
  3937		777777	777767			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3938						IFE	<ZZ-1>,<ZZ=-2>
  3939			777757			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3940	032702	525 11 0 00 777767 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3941						IFN	<<ZZ-377777>&777777>,<
  3942	032703	525 10 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3943						IFE	<<ZZ-377777>&777777>,<
  3944						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3945	032704	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3946	032705	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3947	032706	003 11 0 00 003326 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3948	032707	321 13 0 00 032702 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3949
  3950					;TEST ROT LEFT ONE BIT POSITION
  3951					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3952					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0096

  3953					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3954					;IS ZERO AFTER ROTATING.
  3955					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3956
  3957			003327		SN=SN+1
  3958		777777	777757			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3959						IFE	<ZZ-1>,<ZZ=-2>
  3960			777737			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3961	032710	525 11 0 00 777757 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3962						IFN	<<ZZ-377777>&777777>,<
  3963	032711	525 10 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3964						IFE	<<ZZ-377777>&777777>,<
  3965						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3966	032712	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3967	032713	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3968	032714	003 11 0 00 003327 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3969	032715	321 13 0 00 032710 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3970
  3971					;TEST ROT LEFT ONE BIT POSITION
  3972					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3973					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3974					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3975					;IS ZERO AFTER ROTATING.
  3976					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3977
  3978			003330		SN=SN+1
  3979		777777	777737			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  3980						IFE	<ZZ-1>,<ZZ=-2>
  3981			777677			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  3982	032716	525 11 0 00 777737 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  3983						IFN	<<ZZ-377777>&777777>,<
  3984	032717	525 10 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  3985						IFE	<<ZZ-377777>&777777>,<
  3986						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  3987	032720	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  3988	032721	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  3989	032722	003 11 0 00 003330 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  3990	032723	321 13 0 00 032716 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  3991
  3992					;TEST ROT LEFT ONE BIT POSITION
  3993					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  3994					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  3995					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  3996					;IS ZERO AFTER ROTATING.
  3997					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  3998
  3999			003331		SN=SN+1
  4000		777777	777677			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4001						IFE	<ZZ-1>,<ZZ=-2>
  4002			777577			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4003	032724	525 11 0 00 777677 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4004						IFN	<<ZZ-377777>&777777>,<
  4005	032725	525 10 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4006						IFE	<<ZZ-377777>&777777>,<
  4007						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0097

  4008	032726	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4009	032727	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4010	032730	003 11 0 00 003331 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4011	032731	321 13 0 00 032724 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4012
  4013					;TEST ROT LEFT ONE BIT POSITION
  4014					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4015					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4016					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4017					;IS ZERO AFTER ROTATING.
  4018					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4019
  4020			003332		SN=SN+1
  4021		777777	777577			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4022						IFE	<ZZ-1>,<ZZ=-2>
  4023			777377			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4024	032732	525 11 0 00 777577 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4025						IFN	<<ZZ-377777>&777777>,<
  4026	032733	525 10 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4027						IFE	<<ZZ-377777>&777777>,<
  4028						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4029	032734	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4030	032735	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4031	032736	003 11 0 00 003332 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4032	032737	321 13 0 00 032732 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4033
  4034					;TEST ROT LEFT ONE BIT POSITION
  4035					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4036					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4037					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4038					;IS ZERO AFTER ROTATING.
  4039					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4040
  4041			003333		SN=SN+1
  4042		777777	777377			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4043						IFE	<ZZ-1>,<ZZ=-2>
  4044			776777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4045	032740	525 11 0 00 777377 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4046						IFN	<<ZZ-377777>&777777>,<
  4047	032741	525 10 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4048						IFE	<<ZZ-377777>&777777>,<
  4049						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4050	032742	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4051	032743	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4052	032744	003 11 0 00 003333 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4053	032745	321 13 0 00 032740 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4054
  4055					;TEST ROT LEFT ONE BIT POSITION
  4056					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4057					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4058					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4059					;IS ZERO AFTER ROTATING.
  4060					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4061
  4062			003334		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0098

  4063		777777	776777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4064						IFE	<ZZ-1>,<ZZ=-2>
  4065			775777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4066	032746	525 11 0 00 776777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4067						IFN	<<ZZ-377777>&777777>,<
  4068	032747	525 10 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4069						IFE	<<ZZ-377777>&777777>,<
  4070						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4071	032750	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4072	032751	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4073	032752	003 11 0 00 003334 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4074	032753	321 13 0 00 032746 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4075
  4076					;TEST ROT LEFT ONE BIT POSITION
  4077					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4078					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4079					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4080					;IS ZERO AFTER ROTATING.
  4081					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4082
  4083			003335		SN=SN+1
  4084		777777	775777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4085						IFE	<ZZ-1>,<ZZ=-2>
  4086			773777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4087	032754	525 11 0 00 775777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4088						IFN	<<ZZ-377777>&777777>,<
  4089	032755	525 10 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4090						IFE	<<ZZ-377777>&777777>,<
  4091						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4092	032756	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4093	032757	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4094	032760	003 11 0 00 003335 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4095	032761	321 13 0 00 032754 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4096
  4097					;TEST ROT LEFT ONE BIT POSITION
  4098					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4099					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4100					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4101					;IS ZERO AFTER ROTATING.
  4102					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4103
  4104			003336		SN=SN+1
  4105		777777	773777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4106						IFE	<ZZ-1>,<ZZ=-2>
  4107			767777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4108	032762	525 11 0 00 773777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4109						IFN	<<ZZ-377777>&777777>,<
  4110	032763	525 10 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4111						IFE	<<ZZ-377777>&777777>,<
  4112						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4113	032764	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4114	032765	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4115	032766	003 11 0 00 003336 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4116	032767	321 13 0 00 032762 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4117
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0099

  4118					;TEST ROT LEFT ONE BIT POSITION
  4119					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4120					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4121					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4122					;IS ZERO AFTER ROTATING.
  4123					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4124
  4125			003337		SN=SN+1
  4126		777777	767777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4127						IFE	<ZZ-1>,<ZZ=-2>
  4128			757777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4129	032770	525 11 0 00 767777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4130						IFN	<<ZZ-377777>&777777>,<
  4131	032771	525 10 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4132						IFE	<<ZZ-377777>&777777>,<
  4133						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4134	032772	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4135	032773	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4136	032774	003 11 0 00 003337 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4137	032775	321 13 0 00 032770 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4138
  4139					;TEST ROT LEFT ONE BIT POSITION
  4140					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4141					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4142					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4143					;IS ZERO AFTER ROTATING.
  4144					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4145
  4146			003340		SN=SN+1
  4147		777777	757777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4148						IFE	<ZZ-1>,<ZZ=-2>
  4149			737777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4150	032776	525 11 0 00 757777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4151						IFN	<<ZZ-377777>&777777>,<
  4152	032777	525 10 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4153						IFE	<<ZZ-377777>&777777>,<
  4154						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4155	033000	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4156	033001	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4157	033002	003 11 0 00 003340 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4158	033003	321 13 0 00 032776 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4159
  4160					;TEST ROT LEFT ONE BIT POSITION
  4161					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4162					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4163					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4164					;IS ZERO AFTER ROTATING.
  4165					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4166
  4167			003341		SN=SN+1
  4168		777777	737777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4169						IFE	<ZZ-1>,<ZZ=-2>
  4170			677777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4171	033004	525 11 0 00 737777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4172						IFN	<<ZZ-377777>&777777>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0100

  4173	033005	525 10 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4174						IFE	<<ZZ-377777>&777777>,<
  4175						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4176	033006	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4177	033007	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4178	033010	003 11 0 00 003341 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4179	033011	321 13 0 00 033004 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4180
  4181					;TEST ROT LEFT ONE BIT POSITION
  4182					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4183					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4184					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4185					;IS ZERO AFTER ROTATING.
  4186					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4187
  4188			003342		SN=SN+1
  4189		777777	677777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4190						IFE	<ZZ-1>,<ZZ=-2>
  4191			577777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4192	033012	525 11 0 00 677777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4193						IFN	<<ZZ-377777>&777777>,<
  4194	033013	525 10 0 00 577777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4195						IFE	<<ZZ-377777>&777777>,<
  4196						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4197	033014	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4198	033015	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4199	033016	003 11 0 00 003342 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4200	033017	321 13 0 00 033012 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4201
  4202					;TEST ROT LEFT ONE BIT POSITION
  4203					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4204					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4205					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4206					;IS ZERO AFTER ROTATING.
  4207					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4208
  4209			003343		SN=SN+1
  4210		777777	577777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4211						IFE	<ZZ-1>,<ZZ=-2>
  4212			377777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4213	033020	525 11 0 00 577777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4214						IFN	<<ZZ-377777>&777777>,<
  4215	033021	525 10 0 00 377777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4216						IFE	<<ZZ-377777>&777777>,<
  4217						HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4218	033022	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4219	033023	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4220	033024	003 11 0 00 003343 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4221	033025	321 13 0 00 033020 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4222
  4223					;TEST ROT LEFT ONE BIT POSITION
  4224					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  4225					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4226					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  4227					;IS ZERO AFTER ROTATING.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 12-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0101

  4228					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  4229
  4230			003344		SN=SN+1
  4231		777777	377777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  4232						IFE	<ZZ-1>,<ZZ=-2>
  4233			777777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  4234	033026	525 11 0 00 377777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  4235						IFN	<<ZZ-377777>&777777>,<
  4236						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  4237						IFE	<<ZZ-377777>&777777>,<
  4238	033027	561 10 0 00 777776 		HRROI	AC-1,-2		;SETUP FOR COMPARISON>
  4239	033030	241 11 0 00 000001 		ROT	AC,1		;*ROTATE LEFT ONE
  4240	033031	312 11 0 00 000010 		CAME	AC,AC-1		;TEST FOR BIT (N-1) OR ZERO
  4241	033032	003 11 0 00 003344 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4242	033033	321 13 0 00 033026 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4243
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0102

  4244
  4245					;TEST ROT RIGHT ONE BIT POSITION
  4246					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD.
  4247					;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
  4248
  4249			000010			AC=10
  4250						SAVEAC	(1,1)^
  4251	033034	201 12 0 00 033034 		MOVEI	AC+2,.		;SAVE TEST PC
  4252	033035	202 12 0 00 030051 		MOVEM	AC+2,TESTPC
  4253	033036	201 12 0 00 000012 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  4254	033037	202 12 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  4255
  4256	033040	403 10 0 00 000007 	E3400:	SETZB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ZERO
  4257	033041	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4258	033042	312 10 0 00 000007 		CAME	AC,AC-1		;TEST AC FOR ALL ZEROS
  4259	033043	003 10 0 00 003401 		ER3	AC,3401		;AD-AR GATING FAILED
  4260	033044	321 12 0 00 033040 		JUMPL	AC+2,E3400	;LOOP ON ERROR SWITCH
  4261
  4262					;TEST ROT RIGHT ONE BIT POSITION
  4263					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4264					;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
  4265
  4266	033045	477 10 0 00 000007 	E3500:	SETOB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
  4267	033046	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4268	033047	312 10 0 00 000007 		CAME	AC,AC-1		;TEST AC FOR ALL ONES.
  4269	033050	003 10 0 00 003501 		ER3	AC,3501		;AD-AR GATING FAILED
  4270	033051	321 12 0 00 033045 		JUMPL	AC+2,E3500	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0103

  4271			003600		SN=3600
  4272			000000			ZZ=0
  4273
  4274							;TEST AC LEFT HALF<
  4275					E3600:	REPEAT	^D18,<;TEST ROT RIGHT ONE BIT POSITION
  4276					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4277					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4278					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4279					;BIT IS ONE AFTER ROTATING
  4280					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4281
  4282					SN=SN+1
  4283						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4284						IFE	ZZ,<ZZ=400000>
  4285						YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4286						MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4287						IFN	<ZZ-1>,<
  4288						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4289						IFE	<ZZ-1>,<
  4290						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4291						ROT	AC,-1		;*ROTATE RIGHT ONE
  4292						CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4293						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4294						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4295					>
  4296					;TEST ROT RIGHT ONE BIT POSITION
  4297					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4298					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4299					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4300					;BIT IS ONE AFTER ROTATING
  4301					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4302
  4303			003601		SN=SN+1
  4304			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4305			400000			IFE	ZZ,<ZZ=400000>
  4306			200000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4307	033052	205 10 0 00 400000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4308						IFN	<ZZ-1>,<
  4309	033053	205 07 0 00 200000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4310						IFE	<ZZ-1>,<
  4311						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4312	033054	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4313	033055	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4314	033056	003 10 0 00 003601 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4315	033057	321 12 0 00 033052 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4316
  4317					;TEST ROT RIGHT ONE BIT POSITION
  4318					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4319					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4320					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4321					;BIT IS ONE AFTER ROTATING
  4322					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4323
  4324			003602		SN=SN+1
  4325			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0104

  4326						IFE	ZZ,<ZZ=400000>
  4327			100000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4328	033060	205 10 0 00 200000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4329						IFN	<ZZ-1>,<
  4330	033061	205 07 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4331						IFE	<ZZ-1>,<
  4332						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4333	033062	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4334	033063	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4335	033064	003 10 0 00 003602 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4336	033065	321 12 0 00 033060 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4337
  4338					;TEST ROT RIGHT ONE BIT POSITION
  4339					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4340					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4341					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4342					;BIT IS ONE AFTER ROTATING
  4343					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4344
  4345			003603		SN=SN+1
  4346			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4347						IFE	ZZ,<ZZ=400000>
  4348			040000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4349	033066	205 10 0 00 100000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4350						IFN	<ZZ-1>,<
  4351	033067	205 07 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4352						IFE	<ZZ-1>,<
  4353						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4354	033070	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4355	033071	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4356	033072	003 10 0 00 003603 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4357	033073	321 12 0 00 033066 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4358
  4359					;TEST ROT RIGHT ONE BIT POSITION
  4360					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4361					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4362					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4363					;BIT IS ONE AFTER ROTATING
  4364					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4365
  4366			003604		SN=SN+1
  4367			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4368						IFE	ZZ,<ZZ=400000>
  4369			020000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4370	033074	205 10 0 00 040000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4371						IFN	<ZZ-1>,<
  4372	033075	205 07 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4373						IFE	<ZZ-1>,<
  4374						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4375	033076	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4376	033077	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4377	033100	003 10 0 00 003604 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4378	033101	321 12 0 00 033074 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4379
  4380					;TEST ROT RIGHT ONE BIT POSITION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0105

  4381					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4382					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4383					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4384					;BIT IS ONE AFTER ROTATING
  4385					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4386
  4387			003605		SN=SN+1
  4388			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4389						IFE	ZZ,<ZZ=400000>
  4390			010000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4391	033102	205 10 0 00 020000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4392						IFN	<ZZ-1>,<
  4393	033103	205 07 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4394						IFE	<ZZ-1>,<
  4395						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4396	033104	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4397	033105	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4398	033106	003 10 0 00 003605 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4399	033107	321 12 0 00 033102 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4400
  4401					;TEST ROT RIGHT ONE BIT POSITION
  4402					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4403					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4404					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4405					;BIT IS ONE AFTER ROTATING
  4406					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4407
  4408			003606		SN=SN+1
  4409			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4410						IFE	ZZ,<ZZ=400000>
  4411			004000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4412	033110	205 10 0 00 010000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4413						IFN	<ZZ-1>,<
  4414	033111	205 07 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4415						IFE	<ZZ-1>,<
  4416						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4417	033112	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4418	033113	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4419	033114	003 10 0 00 003606 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4420	033115	321 12 0 00 033110 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4421
  4422					;TEST ROT RIGHT ONE BIT POSITION
  4423					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4424					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4425					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4426					;BIT IS ONE AFTER ROTATING
  4427					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4428
  4429			003607		SN=SN+1
  4430			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4431						IFE	ZZ,<ZZ=400000>
  4432			002000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4433	033116	205 10 0 00 004000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4434						IFN	<ZZ-1>,<
  4435	033117	205 07 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0106

  4436						IFE	<ZZ-1>,<
  4437						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4438	033120	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4439	033121	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4440	033122	003 10 0 00 003607 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4441	033123	321 12 0 00 033116 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4442
  4443					;TEST ROT RIGHT ONE BIT POSITION
  4444					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4445					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4446					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4447					;BIT IS ONE AFTER ROTATING
  4448					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4449
  4450			003610		SN=SN+1
  4451			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4452						IFE	ZZ,<ZZ=400000>
  4453			001000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4454	033124	205 10 0 00 002000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4455						IFN	<ZZ-1>,<
  4456	033125	205 07 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4457						IFE	<ZZ-1>,<
  4458						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4459	033126	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4460	033127	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4461	033130	003 10 0 00 003610 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4462	033131	321 12 0 00 033124 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4463
  4464					;TEST ROT RIGHT ONE BIT POSITION
  4465					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4466					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4467					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4468					;BIT IS ONE AFTER ROTATING
  4469					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4470
  4471			003611		SN=SN+1
  4472			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4473						IFE	ZZ,<ZZ=400000>
  4474			000400			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4475	033132	205 10 0 00 001000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4476						IFN	<ZZ-1>,<
  4477	033133	205 07 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4478						IFE	<ZZ-1>,<
  4479						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4480	033134	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4481	033135	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4482	033136	003 10 0 00 003611 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4483	033137	321 12 0 00 033132 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4484
  4485					;TEST ROT RIGHT ONE BIT POSITION
  4486					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4487					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4488					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4489					;BIT IS ONE AFTER ROTATING
  4490					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0107

  4491
  4492			003612		SN=SN+1
  4493			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4494						IFE	ZZ,<ZZ=400000>
  4495			000200			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4496	033140	205 10 0 00 000400 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4497						IFN	<ZZ-1>,<
  4498	033141	205 07 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4499						IFE	<ZZ-1>,<
  4500						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4501	033142	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4502	033143	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4503	033144	003 10 0 00 003612 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4504	033145	321 12 0 00 033140 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4505
  4506					;TEST ROT RIGHT ONE BIT POSITION
  4507					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4508					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4509					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4510					;BIT IS ONE AFTER ROTATING
  4511					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4512
  4513			003613		SN=SN+1
  4514			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4515						IFE	ZZ,<ZZ=400000>
  4516			000100			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4517	033146	205 10 0 00 000200 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4518						IFN	<ZZ-1>,<
  4519	033147	205 07 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4520						IFE	<ZZ-1>,<
  4521						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4522	033150	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4523	033151	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4524	033152	003 10 0 00 003613 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4525	033153	321 12 0 00 033146 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4526
  4527					;TEST ROT RIGHT ONE BIT POSITION
  4528					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4529					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4530					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4531					;BIT IS ONE AFTER ROTATING
  4532					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4533
  4534			003614		SN=SN+1
  4535			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4536						IFE	ZZ,<ZZ=400000>
  4537			000040			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4538	033154	205 10 0 00 000100 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4539						IFN	<ZZ-1>,<
  4540	033155	205 07 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4541						IFE	<ZZ-1>,<
  4542						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4543	033156	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4544	033157	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4545	033160	003 10 0 00 003614 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0108

  4546	033161	321 12 0 00 033154 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4547
  4548					;TEST ROT RIGHT ONE BIT POSITION
  4549					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4550					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4551					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4552					;BIT IS ONE AFTER ROTATING
  4553					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4554
  4555			003615		SN=SN+1
  4556			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4557						IFE	ZZ,<ZZ=400000>
  4558			000020			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4559	033162	205 10 0 00 000040 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4560						IFN	<ZZ-1>,<
  4561	033163	205 07 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4562						IFE	<ZZ-1>,<
  4563						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4564	033164	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4565	033165	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4566	033166	003 10 0 00 003615 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4567	033167	321 12 0 00 033162 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4568
  4569					;TEST ROT RIGHT ONE BIT POSITION
  4570					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4571					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4572					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4573					;BIT IS ONE AFTER ROTATING
  4574					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4575
  4576			003616		SN=SN+1
  4577			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4578						IFE	ZZ,<ZZ=400000>
  4579			000010			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4580	033170	205 10 0 00 000020 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4581						IFN	<ZZ-1>,<
  4582	033171	205 07 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4583						IFE	<ZZ-1>,<
  4584						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4585	033172	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4586	033173	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4587	033174	003 10 0 00 003616 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4588	033175	321 12 0 00 033170 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4589
  4590					;TEST ROT RIGHT ONE BIT POSITION
  4591					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4592					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4593					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4594					;BIT IS ONE AFTER ROTATING
  4595					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4596
  4597			003617		SN=SN+1
  4598			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4599						IFE	ZZ,<ZZ=400000>
  4600			000004			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0109

  4601	033176	205 10 0 00 000010 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4602						IFN	<ZZ-1>,<
  4603	033177	205 07 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4604						IFE	<ZZ-1>,<
  4605						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4606	033200	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4607	033201	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4608	033202	003 10 0 00 003617 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4609	033203	321 12 0 00 033176 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4610
  4611					;TEST ROT RIGHT ONE BIT POSITION
  4612					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4613					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4614					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4615					;BIT IS ONE AFTER ROTATING
  4616					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4617
  4618			003620		SN=SN+1
  4619			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4620						IFE	ZZ,<ZZ=400000>
  4621			000002			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4622	033204	205 10 0 00 000004 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4623						IFN	<ZZ-1>,<
  4624	033205	205 07 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4625						IFE	<ZZ-1>,<
  4626						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4627	033206	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4628	033207	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4629	033210	003 10 0 00 003620 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4630	033211	321 12 0 00 033204 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4631
  4632					;TEST ROT RIGHT ONE BIT POSITION
  4633					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4634					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4635					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4636					;BIT IS ONE AFTER ROTATING
  4637					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4638
  4639			003621		SN=SN+1
  4640			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4641						IFE	ZZ,<ZZ=400000>
  4642			000001			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4643	033212	205 10 0 00 000002 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4644						IFN	<ZZ-1>,<
  4645	033213	205 07 0 00 000001 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4646						IFE	<ZZ-1>,<
  4647						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4648	033214	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4649	033215	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4650	033216	003 10 0 00 003621 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4651	033217	321 12 0 00 033212 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4652
  4653					;TEST ROT RIGHT ONE BIT POSITION
  4654					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4655					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0110

  4656					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  4657					;BIT IS ONE AFTER ROTATING
  4658					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4659
  4660			003622		SN=SN+1
  4661			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4662						IFE	ZZ,<ZZ=400000>
  4663			000000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4664	033220	205 10 0 00 000001 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  4665						IFN	<ZZ-1>,<
  4666						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  4667						IFE	<ZZ-1>,<
  4668	033221	201 07 0 00 400000 		MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  4669	033222	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4670	033223	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ONE
  4671	033224	003 10 0 00 003622 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4672	033225	321 12 0 00 033220 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4673
  4674					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0111

  4675			000000			ZZ=0
  4676
  4677							;TEST AC RIGHT HALF<
  4678						REPEAT	^D18,<;TEST ROT RIGHT ONE BIT POSITION
  4679					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4680					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4681					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4682					;ONE AFTER ROTATING
  4683					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4684
  4685					SN=SN+1
  4686						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4687						IFE	ZZ,<ZZ=400000>
  4688						YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4689						MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4690						IFN	<ZZ-1>,<
  4691						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4692						IFE	<ZZ-1>,<
  4693						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4694						ROT	AC,-1		;*ROTATE RIGHT ONE
  4695						CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4696						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4697						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4698					>
  4699					;TEST ROT RIGHT ONE BIT POSITION
  4700					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4701					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4702					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4703					;ONE AFTER ROTATING
  4704					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4705
  4706			003623		SN=SN+1
  4707			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4708			400000			IFE	ZZ,<ZZ=400000>
  4709			200000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4710	033226	201 10 0 00 400000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4711						IFN	<ZZ-1>,<
  4712	033227	201 07 0 00 200000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4713						IFE	<ZZ-1>,<
  4714						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4715	033230	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4716	033231	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4717	033232	003 10 0 00 003623 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4718	033233	321 12 0 00 033226 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4719
  4720					;TEST ROT RIGHT ONE BIT POSITION
  4721					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4722					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4723					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4724					;ONE AFTER ROTATING
  4725					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4726
  4727			003624		SN=SN+1
  4728			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4729						IFE	ZZ,<ZZ=400000>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0112

  4730			100000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4731	033234	201 10 0 00 200000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4732						IFN	<ZZ-1>,<
  4733	033235	201 07 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4734						IFE	<ZZ-1>,<
  4735						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4736	033236	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4737	033237	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4738	033240	003 10 0 00 003624 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4739	033241	321 12 0 00 033234 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4740
  4741					;TEST ROT RIGHT ONE BIT POSITION
  4742					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4743					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4744					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4745					;ONE AFTER ROTATING
  4746					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4747
  4748			003625		SN=SN+1
  4749			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4750						IFE	ZZ,<ZZ=400000>
  4751			040000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4752	033242	201 10 0 00 100000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4753						IFN	<ZZ-1>,<
  4754	033243	201 07 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4755						IFE	<ZZ-1>,<
  4756						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4757	033244	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4758	033245	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4759	033246	003 10 0 00 003625 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4760	033247	321 12 0 00 033242 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4761
  4762					;TEST ROT RIGHT ONE BIT POSITION
  4763					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4764					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4765					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4766					;ONE AFTER ROTATING
  4767					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4768
  4769			003626		SN=SN+1
  4770			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4771						IFE	ZZ,<ZZ=400000>
  4772			020000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4773	033250	201 10 0 00 040000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4774						IFN	<ZZ-1>,<
  4775	033251	201 07 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4776						IFE	<ZZ-1>,<
  4777						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4778	033252	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4779	033253	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4780	033254	003 10 0 00 003626 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4781	033255	321 12 0 00 033250 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4782
  4783					;TEST ROT RIGHT ONE BIT POSITION
  4784					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0113

  4785					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4786					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4787					;ONE AFTER ROTATING
  4788					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4789
  4790			003627		SN=SN+1
  4791			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4792						IFE	ZZ,<ZZ=400000>
  4793			010000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4794	033256	201 10 0 00 020000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4795						IFN	<ZZ-1>,<
  4796	033257	201 07 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4797						IFE	<ZZ-1>,<
  4798						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4799	033260	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4800	033261	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4801	033262	003 10 0 00 003627 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4802	033263	321 12 0 00 033256 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4803
  4804					;TEST ROT RIGHT ONE BIT POSITION
  4805					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4806					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4807					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4808					;ONE AFTER ROTATING
  4809					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4810
  4811			003630		SN=SN+1
  4812			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4813						IFE	ZZ,<ZZ=400000>
  4814			004000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4815	033264	201 10 0 00 010000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4816						IFN	<ZZ-1>,<
  4817	033265	201 07 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4818						IFE	<ZZ-1>,<
  4819						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4820	033266	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4821	033267	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4822	033270	003 10 0 00 003630 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4823	033271	321 12 0 00 033264 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4824
  4825					;TEST ROT RIGHT ONE BIT POSITION
  4826					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4827					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4828					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4829					;ONE AFTER ROTATING
  4830					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4831
  4832			003631		SN=SN+1
  4833			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4834						IFE	ZZ,<ZZ=400000>
  4835			002000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4836	033272	201 10 0 00 004000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4837						IFN	<ZZ-1>,<
  4838	033273	201 07 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4839						IFE	<ZZ-1>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0114

  4840						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4841	033274	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4842	033275	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4843	033276	003 10 0 00 003631 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4844	033277	321 12 0 00 033272 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4845
  4846					;TEST ROT RIGHT ONE BIT POSITION
  4847					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4848					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4849					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4850					;ONE AFTER ROTATING
  4851					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4852
  4853			003632		SN=SN+1
  4854			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4855						IFE	ZZ,<ZZ=400000>
  4856			001000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4857	033300	201 10 0 00 002000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4858						IFN	<ZZ-1>,<
  4859	033301	201 07 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4860						IFE	<ZZ-1>,<
  4861						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4862	033302	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4863	033303	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4864	033304	003 10 0 00 003632 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4865	033305	321 12 0 00 033300 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4866
  4867					;TEST ROT RIGHT ONE BIT POSITION
  4868					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4869					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4870					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4871					;ONE AFTER ROTATING
  4872					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4873
  4874			003633		SN=SN+1
  4875			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4876						IFE	ZZ,<ZZ=400000>
  4877			000400			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4878	033306	201 10 0 00 001000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4879						IFN	<ZZ-1>,<
  4880	033307	201 07 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4881						IFE	<ZZ-1>,<
  4882						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4883	033310	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4884	033311	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4885	033312	003 10 0 00 003633 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4886	033313	321 12 0 00 033306 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4887
  4888					;TEST ROT RIGHT ONE BIT POSITION
  4889					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4890					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4891					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4892					;ONE AFTER ROTATING
  4893					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4894
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0115

  4895			003634		SN=SN+1
  4896			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4897						IFE	ZZ,<ZZ=400000>
  4898			000200			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4899	033314	201 10 0 00 000400 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4900						IFN	<ZZ-1>,<
  4901	033315	201 07 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4902						IFE	<ZZ-1>,<
  4903						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4904	033316	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4905	033317	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4906	033320	003 10 0 00 003634 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4907	033321	321 12 0 00 033314 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4908
  4909					;TEST ROT RIGHT ONE BIT POSITION
  4910					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4911					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4912					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4913					;ONE AFTER ROTATING
  4914					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4915
  4916			003635		SN=SN+1
  4917			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4918						IFE	ZZ,<ZZ=400000>
  4919			000100			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4920	033322	201 10 0 00 000200 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4921						IFN	<ZZ-1>,<
  4922	033323	201 07 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4923						IFE	<ZZ-1>,<
  4924						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4925	033324	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4926	033325	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4927	033326	003 10 0 00 003635 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4928	033327	321 12 0 00 033322 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4929
  4930					;TEST ROT RIGHT ONE BIT POSITION
  4931					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4932					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4933					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4934					;ONE AFTER ROTATING
  4935					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4936
  4937			003636		SN=SN+1
  4938			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4939						IFE	ZZ,<ZZ=400000>
  4940			000040			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4941	033330	201 10 0 00 000100 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4942						IFN	<ZZ-1>,<
  4943	033331	201 07 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4944						IFE	<ZZ-1>,<
  4945						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4946	033332	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4947	033333	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4948	033334	003 10 0 00 003636 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4949	033335	321 12 0 00 033330 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0116

  4950
  4951					;TEST ROT RIGHT ONE BIT POSITION
  4952					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4953					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4954					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4955					;ONE AFTER ROTATING
  4956					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4957
  4958			003637		SN=SN+1
  4959			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4960						IFE	ZZ,<ZZ=400000>
  4961			000020			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4962	033336	201 10 0 00 000040 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4963						IFN	<ZZ-1>,<
  4964	033337	201 07 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4965						IFE	<ZZ-1>,<
  4966						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4967	033340	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4968	033341	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4969	033342	003 10 0 00 003637 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4970	033343	321 12 0 00 033336 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4971
  4972					;TEST ROT RIGHT ONE BIT POSITION
  4973					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4974					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4975					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4976					;ONE AFTER ROTATING
  4977					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4978
  4979			003640		SN=SN+1
  4980			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  4981						IFE	ZZ,<ZZ=400000>
  4982			000010			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  4983	033344	201 10 0 00 000020 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  4984						IFN	<ZZ-1>,<
  4985	033345	201 07 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  4986						IFE	<ZZ-1>,<
  4987						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  4988	033346	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  4989	033347	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  4990	033350	003 10 0 00 003640 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  4991	033351	321 12 0 00 033344 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  4992
  4993					;TEST ROT RIGHT ONE BIT POSITION
  4994					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  4995					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  4996					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  4997					;ONE AFTER ROTATING
  4998					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  4999
  5000			003641		SN=SN+1
  5001			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5002						IFE	ZZ,<ZZ=400000>
  5003			000004			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  5004	033352	201 10 0 00 000010 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0117

  5005						IFN	<ZZ-1>,<
  5006	033353	201 07 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  5007						IFE	<ZZ-1>,<
  5008						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  5009	033354	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5010	033355	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  5011	033356	003 10 0 00 003641 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5012	033357	321 12 0 00 033352 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5013
  5014					;TEST ROT RIGHT ONE BIT POSITION
  5015					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  5016					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5017					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  5018					;ONE AFTER ROTATING
  5019					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5020
  5021			003642		SN=SN+1
  5022			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5023						IFE	ZZ,<ZZ=400000>
  5024			000002			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  5025	033360	201 10 0 00 000004 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  5026						IFN	<ZZ-1>,<
  5027	033361	201 07 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  5028						IFE	<ZZ-1>,<
  5029						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  5030	033362	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5031	033363	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  5032	033364	003 10 0 00 003642 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5033	033365	321 12 0 00 033360 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5034
  5035					;TEST ROT RIGHT ONE BIT POSITION
  5036					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  5037					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5038					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  5039					;ONE AFTER ROTATING
  5040					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5041
  5042			003643		SN=SN+1
  5043			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5044						IFE	ZZ,<ZZ=400000>
  5045			000001			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  5046	033366	201 10 0 00 000002 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  5047						IFN	<ZZ-1>,<
  5048	033367	201 07 0 00 000001 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  5049						IFE	<ZZ-1>,<
  5050						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  5051	033370	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5052	033371	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  5053	033372	003 10 0 00 003643 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5054	033373	321 12 0 00 033366 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5055
  5056					;TEST ROT RIGHT ONE BIT POSITION
  5057					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  5058					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5059					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 14-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0118

  5060					;ONE AFTER ROTATING
  5061					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5062
  5063			003644		SN=SN+1
  5064			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5065						IFE	ZZ,<ZZ=400000>
  5066			000000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  5067	033374	201 10 0 00 000001 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  5068						IFN	<ZZ-1>,<
  5069						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  5070						IFE	<ZZ-1>,<
  5071	033375	205 07 0 00 400000 		MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  5072	033376	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5073	033377	312 10 0 00 000007 		CAME	AC,AC-1			;TEST FOR BIT (N+1) A ONE
  5074	033400	003 10 0 00 003644 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5075	033401	321 12 0 00 033374 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5076
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0119

  5077			003700		SN=3700
  5078			000001			ZZ=1
  5079
  5080						;TEST AC LEFT HALF<
  5081					E3700:	REPEAT	^D18,<;TEST ROT RIGHT ONE BIT POSITION
  5082					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5083					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5084					;IS ZERO AFTER ROTATING.
  5085					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5086
  5087					SN=SN+1
  5088						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5089						IFE	<ZZ>,<ZZ=777777377777>
  5090						YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5091						HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5092						IFN	<ZZ&777777-777776>,<
  5093						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5094						IFE	<ZZ&777777-777776>,<
  5095						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5096						ROT	AC,-1		;*ROTATE RIGHT ONE
  5097						CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5098						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5099						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5100					>
  5101					;TEST ROT RIGHT ONE BIT POSITION
  5102					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5103					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5104					;IS ZERO AFTER ROTATING.
  5105					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5106
  5107			003701		SN=SN+1
  5108			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5109		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
  5110			577777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5111	033402	525 10 0 00 377777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5112						IFN	<ZZ&777777-777776>,<
  5113	033403	525 07 0 00 577777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5114						IFE	<ZZ&777777-777776>,<
  5115						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5116	033404	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5117	033405	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5118	033406	003 10 0 00 003701 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5119	033407	321 12 0 00 033402 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5120
  5121					;TEST ROT RIGHT ONE BIT POSITION
  5122					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5123					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5124					;IS ZERO AFTER ROTATING.
  5125					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5126
  5127			003702		SN=SN+1
  5128		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5129						IFE	<ZZ>,<ZZ=777777377777>
  5130			677777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5131	033410	525 10 0 00 577777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0120

  5132						IFN	<ZZ&777777-777776>,<
  5133	033411	525 07 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5134						IFE	<ZZ&777777-777776>,<
  5135						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5136	033412	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5137	033413	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5138	033414	003 10 0 00 003702 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5139	033415	321 12 0 00 033410 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5140
  5141					;TEST ROT RIGHT ONE BIT POSITION
  5142					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5143					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5144					;IS ZERO AFTER ROTATING.
  5145					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5146
  5147			003703		SN=SN+1
  5148		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5149						IFE	<ZZ>,<ZZ=777777377777>
  5150			737777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5151	033416	525 10 0 00 677777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5152						IFN	<ZZ&777777-777776>,<
  5153	033417	525 07 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5154						IFE	<ZZ&777777-777776>,<
  5155						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5156	033420	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5157	033421	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5158	033422	003 10 0 00 003703 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5159	033423	321 12 0 00 033416 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5160
  5161					;TEST ROT RIGHT ONE BIT POSITION
  5162					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5163					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5164					;IS ZERO AFTER ROTATING.
  5165					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5166
  5167			003704		SN=SN+1
  5168		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5169						IFE	<ZZ>,<ZZ=777777377777>
  5170			757777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5171	033424	525 10 0 00 737777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5172						IFN	<ZZ&777777-777776>,<
  5173	033425	525 07 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5174						IFE	<ZZ&777777-777776>,<
  5175						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5176	033426	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5177	033427	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5178	033430	003 10 0 00 003704 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5179	033431	321 12 0 00 033424 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5180
  5181					;TEST ROT RIGHT ONE BIT POSITION
  5182					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5183					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5184					;IS ZERO AFTER ROTATING.
  5185					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5186
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0121

  5187			003705		SN=SN+1
  5188		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5189						IFE	<ZZ>,<ZZ=777777377777>
  5190			767777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5191	033432	525 10 0 00 757777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5192						IFN	<ZZ&777777-777776>,<
  5193	033433	525 07 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5194						IFE	<ZZ&777777-777776>,<
  5195						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5196	033434	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5197	033435	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5198	033436	003 10 0 00 003705 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5199	033437	321 12 0 00 033432 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5200
  5201					;TEST ROT RIGHT ONE BIT POSITION
  5202					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5203					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5204					;IS ZERO AFTER ROTATING.
  5205					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5206
  5207			003706		SN=SN+1
  5208		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5209						IFE	<ZZ>,<ZZ=777777377777>
  5210			773777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5211	033440	525 10 0 00 767777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5212						IFN	<ZZ&777777-777776>,<
  5213	033441	525 07 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5214						IFE	<ZZ&777777-777776>,<
  5215						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5216	033442	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5217	033443	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5218	033444	003 10 0 00 003706 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5219	033445	321 12 0 00 033440 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5220
  5221					;TEST ROT RIGHT ONE BIT POSITION
  5222					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5223					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5224					;IS ZERO AFTER ROTATING.
  5225					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5226
  5227			003707		SN=SN+1
  5228		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5229						IFE	<ZZ>,<ZZ=777777377777>
  5230			775777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5231	033446	525 10 0 00 773777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5232						IFN	<ZZ&777777-777776>,<
  5233	033447	525 07 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5234						IFE	<ZZ&777777-777776>,<
  5235						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5236	033450	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5237	033451	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5238	033452	003 10 0 00 003707 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5239	033453	321 12 0 00 033446 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5240
  5241					;TEST ROT RIGHT ONE BIT POSITION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0122

  5242					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5243					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5244					;IS ZERO AFTER ROTATING.
  5245					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5246
  5247			003710		SN=SN+1
  5248		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5249						IFE	<ZZ>,<ZZ=777777377777>
  5250			776777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5251	033454	525 10 0 00 775777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5252						IFN	<ZZ&777777-777776>,<
  5253	033455	525 07 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5254						IFE	<ZZ&777777-777776>,<
  5255						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5256	033456	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5257	033457	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5258	033460	003 10 0 00 003710 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5259	033461	321 12 0 00 033454 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5260
  5261					;TEST ROT RIGHT ONE BIT POSITION
  5262					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5263					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5264					;IS ZERO AFTER ROTATING.
  5265					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5266
  5267			003711		SN=SN+1
  5268		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5269						IFE	<ZZ>,<ZZ=777777377777>
  5270			777377			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5271	033462	525 10 0 00 776777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5272						IFN	<ZZ&777777-777776>,<
  5273	033463	525 07 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5274						IFE	<ZZ&777777-777776>,<
  5275						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5276	033464	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5277	033465	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5278	033466	003 10 0 00 003711 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5279	033467	321 12 0 00 033462 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5280
  5281					;TEST ROT RIGHT ONE BIT POSITION
  5282					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5283					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5284					;IS ZERO AFTER ROTATING.
  5285					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5286
  5287			003712		SN=SN+1
  5288		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5289						IFE	<ZZ>,<ZZ=777777377777>
  5290			777577			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5291	033470	525 10 0 00 777377 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5292						IFN	<ZZ&777777-777776>,<
  5293	033471	525 07 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5294						IFE	<ZZ&777777-777776>,<
  5295						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5296	033472	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0123

  5297	033473	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5298	033474	003 10 0 00 003712 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5299	033475	321 12 0 00 033470 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5300
  5301					;TEST ROT RIGHT ONE BIT POSITION
  5302					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5303					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5304					;IS ZERO AFTER ROTATING.
  5305					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5306
  5307			003713		SN=SN+1
  5308		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5309						IFE	<ZZ>,<ZZ=777777377777>
  5310			777677			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5311	033476	525 10 0 00 777577 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5312						IFN	<ZZ&777777-777776>,<
  5313	033477	525 07 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5314						IFE	<ZZ&777777-777776>,<
  5315						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5316	033500	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5317	033501	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5318	033502	003 10 0 00 003713 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5319	033503	321 12 0 00 033476 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5320
  5321					;TEST ROT RIGHT ONE BIT POSITION
  5322					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5323					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5324					;IS ZERO AFTER ROTATING.
  5325					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5326
  5327			003714		SN=SN+1
  5328		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5329						IFE	<ZZ>,<ZZ=777777377777>
  5330			777737			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5331	033504	525 10 0 00 777677 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5332						IFN	<ZZ&777777-777776>,<
  5333	033505	525 07 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5334						IFE	<ZZ&777777-777776>,<
  5335						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5336	033506	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5337	033507	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5338	033510	003 10 0 00 003714 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5339	033511	321 12 0 00 033504 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5340
  5341					;TEST ROT RIGHT ONE BIT POSITION
  5342					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5343					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5344					;IS ZERO AFTER ROTATING.
  5345					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5346
  5347			003715		SN=SN+1
  5348		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5349						IFE	<ZZ>,<ZZ=777777377777>
  5350			777757			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5351	033512	525 10 0 00 777737 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0124

  5352						IFN	<ZZ&777777-777776>,<
  5353	033513	525 07 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5354						IFE	<ZZ&777777-777776>,<
  5355						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5356	033514	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5357	033515	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5358	033516	003 10 0 00 003715 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5359	033517	321 12 0 00 033512 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5360
  5361					;TEST ROT RIGHT ONE BIT POSITION
  5362					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5363					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5364					;IS ZERO AFTER ROTATING.
  5365					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5366
  5367			003716		SN=SN+1
  5368		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5369						IFE	<ZZ>,<ZZ=777777377777>
  5370			777767			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5371	033520	525 10 0 00 777757 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5372						IFN	<ZZ&777777-777776>,<
  5373	033521	525 07 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5374						IFE	<ZZ&777777-777776>,<
  5375						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5376	033522	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5377	033523	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5378	033524	003 10 0 00 003716 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5379	033525	321 12 0 00 033520 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5380
  5381					;TEST ROT RIGHT ONE BIT POSITION
  5382					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5383					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5384					;IS ZERO AFTER ROTATING.
  5385					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5386
  5387			003717		SN=SN+1
  5388		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5389						IFE	<ZZ>,<ZZ=777777377777>
  5390			777773			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5391	033526	525 10 0 00 777767 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5392						IFN	<ZZ&777777-777776>,<
  5393	033527	525 07 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5394						IFE	<ZZ&777777-777776>,<
  5395						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5396	033530	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5397	033531	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5398	033532	003 10 0 00 003717 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5399	033533	321 12 0 00 033526 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5400
  5401					;TEST ROT RIGHT ONE BIT POSITION
  5402					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5403					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5404					;IS ZERO AFTER ROTATING.
  5405					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5406
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0125

  5407			003720		SN=SN+1
  5408		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5409						IFE	<ZZ>,<ZZ=777777377777>
  5410			777775			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5411	033534	525 10 0 00 777773 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5412						IFN	<ZZ&777777-777776>,<
  5413	033535	525 07 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5414						IFE	<ZZ&777777-777776>,<
  5415						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5416	033536	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5417	033537	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5418	033540	003 10 0 00 003720 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5419	033541	321 12 0 00 033534 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5420
  5421					;TEST ROT RIGHT ONE BIT POSITION
  5422					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5423					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5424					;IS ZERO AFTER ROTATING.
  5425					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5426
  5427			003721		SN=SN+1
  5428		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5429						IFE	<ZZ>,<ZZ=777777377777>
  5430			777776			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5431	033542	525 10 0 00 777775 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5432						IFN	<ZZ&777777-777776>,<
  5433	033543	525 07 0 00 777776 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5434						IFE	<ZZ&777777-777776>,<
  5435						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5436	033544	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5437	033545	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5438	033546	003 10 0 00 003721 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5439	033547	321 12 0 00 033542 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5440
  5441					;TEST ROT RIGHT ONE BIT POSITION
  5442					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5443					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5444					;IS ZERO AFTER ROTATING.
  5445					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5446
  5447			003722		SN=SN+1
  5448		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5449						IFE	<ZZ>,<ZZ=777777377777>
  5450			777777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5451	033550	525 10 0 00 777776 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  5452						IFN	<ZZ&777777-777776>,<
  5453						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  5454						IFE	<ZZ&777777-777776>,<
  5455	033551	561 07 0 00 377777 		HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  5456	033552	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5457	033553	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5458	033554	003 10 0 00 003722 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5459	033555	321 12 0 00 033550 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5460
  5461					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0126

  5462			000001			ZZ=1
  5463
  5464						;TEST AC RIGHT HALF<
  5465						REPEAT	^D18,<;TEST ROT RIGHT ONE BIT POSITION
  5466					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5467					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5468					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5469					;IS ZERO AFTER ROTATING.
  5470					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5471
  5472					SN=SN+1
  5473						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5474						IFE	<ZZ>,<ZZ=777777377777>
  5475						YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5476						HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5477						IFN	<ZZ&777777-777776>,<
  5478						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5479						IFE	<ZZ&777777-777776>,<
  5480						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5481						ROT	AC,-1		;*ROTATE RIGHT ONE
  5482						CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5483						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5484						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5485					>
  5486					;TEST ROT RIGHT ONE BIT POSITION
  5487					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5488					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5489					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5490					;IS ZERO AFTER ROTATING.
  5491					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5492
  5493			003723		SN=SN+1
  5494			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5495		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
  5496			577777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5497	033556	561 10 0 00 377777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5498						IFN	<ZZ&777777-777776>,<
  5499	033557	561 07 0 00 577777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5500						IFE	<ZZ&777777-777776>,<
  5501						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5502	033560	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5503	033561	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5504	033562	003 10 0 00 003723 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5505	033563	321 12 0 00 033556 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5506
  5507					;TEST ROT RIGHT ONE BIT POSITION
  5508					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5509					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5510					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5511					;IS ZERO AFTER ROTATING.
  5512					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5513
  5514			003724		SN=SN+1
  5515		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5516						IFE	<ZZ>,<ZZ=777777377777>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0127

  5517			677777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5518	033564	561 10 0 00 577777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5519						IFN	<ZZ&777777-777776>,<
  5520	033565	561 07 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5521						IFE	<ZZ&777777-777776>,<
  5522						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5523	033566	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5524	033567	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5525	033570	003 10 0 00 003724 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5526	033571	321 12 0 00 033564 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5527
  5528					;TEST ROT RIGHT ONE BIT POSITION
  5529					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5530					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5531					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5532					;IS ZERO AFTER ROTATING.
  5533					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5534
  5535			003725		SN=SN+1
  5536		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5537						IFE	<ZZ>,<ZZ=777777377777>
  5538			737777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5539	033572	561 10 0 00 677777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5540						IFN	<ZZ&777777-777776>,<
  5541	033573	561 07 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5542						IFE	<ZZ&777777-777776>,<
  5543						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5544	033574	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5545	033575	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5546	033576	003 10 0 00 003725 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5547	033577	321 12 0 00 033572 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5548
  5549					;TEST ROT RIGHT ONE BIT POSITION
  5550					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5551					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5552					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5553					;IS ZERO AFTER ROTATING.
  5554					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5555
  5556			003726		SN=SN+1
  5557		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5558						IFE	<ZZ>,<ZZ=777777377777>
  5559			757777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5560	033600	561 10 0 00 737777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5561						IFN	<ZZ&777777-777776>,<
  5562	033601	561 07 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5563						IFE	<ZZ&777777-777776>,<
  5564						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5565	033602	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5566	033603	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5567	033604	003 10 0 00 003726 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5568	033605	321 12 0 00 033600 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5569
  5570					;TEST ROT RIGHT ONE BIT POSITION
  5571					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0128

  5572					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5573					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5574					;IS ZERO AFTER ROTATING.
  5575					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5576
  5577			003727		SN=SN+1
  5578		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5579						IFE	<ZZ>,<ZZ=777777377777>
  5580			767777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5581	033606	561 10 0 00 757777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5582						IFN	<ZZ&777777-777776>,<
  5583	033607	561 07 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5584						IFE	<ZZ&777777-777776>,<
  5585						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5586	033610	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5587	033611	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5588	033612	003 10 0 00 003727 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5589	033613	321 12 0 00 033606 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5590
  5591					;TEST ROT RIGHT ONE BIT POSITION
  5592					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5593					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5594					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5595					;IS ZERO AFTER ROTATING.
  5596					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5597
  5598			003730		SN=SN+1
  5599		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5600						IFE	<ZZ>,<ZZ=777777377777>
  5601			773777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5602	033614	561 10 0 00 767777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5603						IFN	<ZZ&777777-777776>,<
  5604	033615	561 07 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5605						IFE	<ZZ&777777-777776>,<
  5606						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5607	033616	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5608	033617	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5609	033620	003 10 0 00 003730 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5610	033621	321 12 0 00 033614 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5611
  5612					;TEST ROT RIGHT ONE BIT POSITION
  5613					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5614					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5615					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5616					;IS ZERO AFTER ROTATING.
  5617					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5618
  5619			003731		SN=SN+1
  5620		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5621						IFE	<ZZ>,<ZZ=777777377777>
  5622			775777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5623	033622	561 10 0 00 773777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5624						IFN	<ZZ&777777-777776>,<
  5625	033623	561 07 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5626						IFE	<ZZ&777777-777776>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0129

  5627						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5628	033624	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5629	033625	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5630	033626	003 10 0 00 003731 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5631	033627	321 12 0 00 033622 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5632
  5633					;TEST ROT RIGHT ONE BIT POSITION
  5634					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5635					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5636					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5637					;IS ZERO AFTER ROTATING.
  5638					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5639
  5640			003732		SN=SN+1
  5641		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5642						IFE	<ZZ>,<ZZ=777777377777>
  5643			776777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5644	033630	561 10 0 00 775777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5645						IFN	<ZZ&777777-777776>,<
  5646	033631	561 07 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5647						IFE	<ZZ&777777-777776>,<
  5648						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5649	033632	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5650	033633	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5651	033634	003 10 0 00 003732 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5652	033635	321 12 0 00 033630 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5653
  5654					;TEST ROT RIGHT ONE BIT POSITION
  5655					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5656					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5657					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5658					;IS ZERO AFTER ROTATING.
  5659					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5660
  5661			003733		SN=SN+1
  5662		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5663						IFE	<ZZ>,<ZZ=777777377777>
  5664			777377			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5665	033636	561 10 0 00 776777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5666						IFN	<ZZ&777777-777776>,<
  5667	033637	561 07 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5668						IFE	<ZZ&777777-777776>,<
  5669						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5670	033640	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5671	033641	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5672	033642	003 10 0 00 003733 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5673	033643	321 12 0 00 033636 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5674
  5675					;TEST ROT RIGHT ONE BIT POSITION
  5676					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5677					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5678					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5679					;IS ZERO AFTER ROTATING.
  5680					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5681
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0130

  5682			003734		SN=SN+1
  5683		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5684						IFE	<ZZ>,<ZZ=777777377777>
  5685			777577			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5686	033644	561 10 0 00 777377 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5687						IFN	<ZZ&777777-777776>,<
  5688	033645	561 07 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5689						IFE	<ZZ&777777-777776>,<
  5690						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5691	033646	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5692	033647	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5693	033650	003 10 0 00 003734 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5694	033651	321 12 0 00 033644 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5695
  5696					;TEST ROT RIGHT ONE BIT POSITION
  5697					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5698					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5699					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5700					;IS ZERO AFTER ROTATING.
  5701					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5702
  5703			003735		SN=SN+1
  5704		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5705						IFE	<ZZ>,<ZZ=777777377777>
  5706			777677			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5707	033652	561 10 0 00 777577 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5708						IFN	<ZZ&777777-777776>,<
  5709	033653	561 07 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5710						IFE	<ZZ&777777-777776>,<
  5711						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5712	033654	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5713	033655	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5714	033656	003 10 0 00 003735 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5715	033657	321 12 0 00 033652 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5716
  5717					;TEST ROT RIGHT ONE BIT POSITION
  5718					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5719					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5720					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5721					;IS ZERO AFTER ROTATING.
  5722					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5723
  5724			003736		SN=SN+1
  5725		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5726						IFE	<ZZ>,<ZZ=777777377777>
  5727			777737			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5728	033660	561 10 0 00 777677 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5729						IFN	<ZZ&777777-777776>,<
  5730	033661	561 07 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5731						IFE	<ZZ&777777-777776>,<
  5732						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5733	033662	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5734	033663	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5735	033664	003 10 0 00 003736 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5736	033665	321 12 0 00 033660 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0131

  5737
  5738					;TEST ROT RIGHT ONE BIT POSITION
  5739					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5740					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5741					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5742					;IS ZERO AFTER ROTATING.
  5743					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5744
  5745			003737		SN=SN+1
  5746		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5747						IFE	<ZZ>,<ZZ=777777377777>
  5748			777757			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5749	033666	561 10 0 00 777737 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5750						IFN	<ZZ&777777-777776>,<
  5751	033667	561 07 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5752						IFE	<ZZ&777777-777776>,<
  5753						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5754	033670	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5755	033671	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5756	033672	003 10 0 00 003737 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5757	033673	321 12 0 00 033666 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5758
  5759					;TEST ROT RIGHT ONE BIT POSITION
  5760					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5761					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5762					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5763					;IS ZERO AFTER ROTATING.
  5764					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5765
  5766			003740		SN=SN+1
  5767		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5768						IFE	<ZZ>,<ZZ=777777377777>
  5769			777767			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5770	033674	561 10 0 00 777757 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5771						IFN	<ZZ&777777-777776>,<
  5772	033675	561 07 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5773						IFE	<ZZ&777777-777776>,<
  5774						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5775	033676	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5776	033677	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5777	033700	003 10 0 00 003740 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5778	033701	321 12 0 00 033674 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5779
  5780					;TEST ROT RIGHT ONE BIT POSITION
  5781					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5782					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5783					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5784					;IS ZERO AFTER ROTATING.
  5785					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5786
  5787			003741		SN=SN+1
  5788		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5789						IFE	<ZZ>,<ZZ=777777377777>
  5790			777773			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5791	033702	561 10 0 00 777767 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0132

  5792						IFN	<ZZ&777777-777776>,<
  5793	033703	561 07 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5794						IFE	<ZZ&777777-777776>,<
  5795						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5796	033704	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5797	033705	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5798	033706	003 10 0 00 003741 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5799	033707	321 12 0 00 033702 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5800
  5801					;TEST ROT RIGHT ONE BIT POSITION
  5802					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5803					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5804					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5805					;IS ZERO AFTER ROTATING.
  5806					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5807
  5808			003742		SN=SN+1
  5809		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5810						IFE	<ZZ>,<ZZ=777777377777>
  5811			777775			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5812	033710	561 10 0 00 777773 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5813						IFN	<ZZ&777777-777776>,<
  5814	033711	561 07 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5815						IFE	<ZZ&777777-777776>,<
  5816						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5817	033712	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5818	033713	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5819	033714	003 10 0 00 003742 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5820	033715	321 12 0 00 033710 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5821
  5822					;TEST ROT RIGHT ONE BIT POSITION
  5823					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5824					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5825					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  5826					;IS ZERO AFTER ROTATING.
  5827					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5828
  5829			003743		SN=SN+1
  5830		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5831						IFE	<ZZ>,<ZZ=777777377777>
  5832			777776			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5833	033716	561 10 0 00 777775 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5834						IFN	<ZZ&777777-777776>,<
  5835	033717	561 07 0 00 777776 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5836						IFE	<ZZ&777777-777776>,<
  5837						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5838	033720	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5839	033721	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5840	033722	003 10 0 00 003743 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5841	033723	321 12 0 00 033716 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5842
  5843					;TEST ROT RIGHT ONE BIT POSITION
  5844					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  5845					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5846					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 15-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0133

  5847					;IS ZERO AFTER ROTATING.
  5848					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  5849
  5850			003744		SN=SN+1
  5851		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  5852						IFE	<ZZ>,<ZZ=777777377777>
  5853			777777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
  5854	033724	561 10 0 00 777776 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  5855						IFN	<ZZ&777777-777776>,<
  5856						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  5857						IFE	<ZZ&777777-777776>,<
  5858	033725	525 07 0 00 377777 		HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  5859	033726	241 10 0 00 777777 		ROT	AC,-1		;*ROTATE RIGHT ONE
  5860	033727	312 10 0 00 000007 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  5861	033730	003 10 0 00 003744 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5862	033731	321 12 0 00 033724 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5863
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0134

  5864					;TEST ROT RIGHT TWO BIT POSITIONS
  5865					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5866					;AN ERROR OCCURS IF C(AC) IS NON-ZERO AFTER ROTATING
  5867
  5868			000007			AC=7
  5869						SAVEAC	(1,1)^
  5870	033732	201 11 0 00 033732 		MOVEI	AC+2,.		;SAVE TEST PC
  5871	033733	202 11 0 00 030051 		MOVEM	AC+2,TESTPC
  5872	033734	201 11 0 00 000011 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  5873	033735	202 11 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  5874
  5875	033736	403 07 0 00 000006 	E4000:	SETZB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ZERO
  5876	033737	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  5877	033740	312 07 0 00 000006 		CAME	AC,AC-1		;TEST AC FOR ALL ZEROS
  5878	033741	003 07 0 00 004001 		ER3	AC,4001		;AD-AR GATING FAILED
  5879	033742	321 11 0 00 033736 		JUMPL	AC+2,E4000	;LOOP ON ERROR SWITCH
  5880
  5881					;TEST ROT RIGHT TWO BIT POSITIONS
  5882					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5883					;AN ERROR OCCURS IF C(AC) IS NOT ALL ONES AFTER ROTATING
  5884
  5885	033743	477 07 0 00 000006 	E4100:	SETOB	AC,AC-1		;INITIALIZE AC AND EXPECTED RESULT TO ALL ONES
  5886	033744	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  5887	033745	312 07 0 00 000006 		CAME	AC,AC-1		;TEST AC FOR ALL ONES.
  5888	033746	003 07 0 00 004101 		ER3	AC,4101		;AD-AR GATING FAILED
  5889	033747	321 11 0 00 033743 		JUMPL	AC+2,E4100	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0135

  5890
  5891			004200		SN=4200
  5892			000000			ZZ=0
  5893
  5894							;TEST AC LEFT HALF<
  5895					E4200:	REPEAT	^D18,<;TEST ROT RIGHT TWO BIT POSITIONS
  5896					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  5897					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5898					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  5899					;BIT IS ONE AFTER ROTATING
  5900					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5901
  5902					SN=SN+1
  5903						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5904						IFE	ZZ,<ZZ=400000>
  5905						YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  5906						MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  5907						IFG	<ZZ-2>,<
  5908						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  5909						IFE	<ZZ-2>,<
  5910						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  5911						IFE	<ZZ-1>,<
  5912						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  5913						ROT	AC,-2		;*ROTATE RIGHT TWO
  5914						CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  5915						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5916						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5917					>
  5918					;TEST ROT RIGHT TWO BIT POSITIONS
  5919					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  5920					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5921					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  5922					;BIT IS ONE AFTER ROTATING
  5923					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5924
  5925			004201		SN=SN+1
  5926			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5927			400000			IFE	ZZ,<ZZ=400000>
  5928			100000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  5929	033750	205 07 0 00 400000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  5930						IFG	<ZZ-2>,<
  5931	033751	205 06 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  5932						IFE	<ZZ-2>,<
  5933						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  5934						IFE	<ZZ-1>,<
  5935						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  5936	033752	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  5937	033753	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  5938	033754	003 07 0 00 004201 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5939	033755	321 11 0 00 033750 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5940
  5941					;TEST ROT RIGHT TWO BIT POSITIONS
  5942					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  5943					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5944					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0136

  5945					;BIT IS ONE AFTER ROTATING
  5946					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5947
  5948			004202		SN=SN+1
  5949			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5950						IFE	ZZ,<ZZ=400000>
  5951			040000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  5952	033756	205 07 0 00 200000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  5953						IFG	<ZZ-2>,<
  5954	033757	205 06 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  5955						IFE	<ZZ-2>,<
  5956						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  5957						IFE	<ZZ-1>,<
  5958						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  5959	033760	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  5960	033761	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  5961	033762	003 07 0 00 004202 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5962	033763	321 11 0 00 033756 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5963
  5964					;TEST ROT RIGHT TWO BIT POSITIONS
  5965					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  5966					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5967					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  5968					;BIT IS ONE AFTER ROTATING
  5969					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5970
  5971			004203		SN=SN+1
  5972			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5973						IFE	ZZ,<ZZ=400000>
  5974			020000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  5975	033764	205 07 0 00 100000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  5976						IFG	<ZZ-2>,<
  5977	033765	205 06 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  5978						IFE	<ZZ-2>,<
  5979						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  5980						IFE	<ZZ-1>,<
  5981						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  5982	033766	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  5983	033767	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  5984	033770	003 07 0 00 004203 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  5985	033771	321 11 0 00 033764 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  5986
  5987					;TEST ROT RIGHT TWO BIT POSITIONS
  5988					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  5989					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  5990					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  5991					;BIT IS ONE AFTER ROTATING
  5992					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  5993
  5994			004204		SN=SN+1
  5995			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  5996						IFE	ZZ,<ZZ=400000>
  5997			010000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  5998	033772	205 07 0 00 040000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  5999						IFG	<ZZ-2>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0137

  6000	033773	205 06 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6001						IFE	<ZZ-2>,<
  6002						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6003						IFE	<ZZ-1>,<
  6004						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6005	033774	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6006	033775	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6007	033776	003 07 0 00 004204 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6008	033777	321 11 0 00 033772 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6009
  6010					;TEST ROT RIGHT TWO BIT POSITIONS
  6011					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6012					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6013					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6014					;BIT IS ONE AFTER ROTATING
  6015					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6016
  6017			004205		SN=SN+1
  6018			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6019						IFE	ZZ,<ZZ=400000>
  6020			004000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6021	034000	205 07 0 00 020000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6022						IFG	<ZZ-2>,<
  6023	034001	205 06 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6024						IFE	<ZZ-2>,<
  6025						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6026						IFE	<ZZ-1>,<
  6027						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6028	034002	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6029	034003	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6030	034004	003 07 0 00 004205 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6031	034005	321 11 0 00 034000 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6032
  6033					;TEST ROT RIGHT TWO BIT POSITIONS
  6034					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6035					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6036					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6037					;BIT IS ONE AFTER ROTATING
  6038					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6039
  6040			004206		SN=SN+1
  6041			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6042						IFE	ZZ,<ZZ=400000>
  6043			002000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6044	034006	205 07 0 00 010000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6045						IFG	<ZZ-2>,<
  6046	034007	205 06 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6047						IFE	<ZZ-2>,<
  6048						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6049						IFE	<ZZ-1>,<
  6050						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6051	034010	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6052	034011	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6053	034012	003 07 0 00 004206 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6054	034013	321 11 0 00 034006 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0138

  6055
  6056					;TEST ROT RIGHT TWO BIT POSITIONS
  6057					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6058					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6059					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6060					;BIT IS ONE AFTER ROTATING
  6061					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6062
  6063			004207		SN=SN+1
  6064			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6065						IFE	ZZ,<ZZ=400000>
  6066			001000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6067	034014	205 07 0 00 004000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6068						IFG	<ZZ-2>,<
  6069	034015	205 06 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6070						IFE	<ZZ-2>,<
  6071						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6072						IFE	<ZZ-1>,<
  6073						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6074	034016	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6075	034017	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6076	034020	003 07 0 00 004207 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6077	034021	321 11 0 00 034014 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6078
  6079					;TEST ROT RIGHT TWO BIT POSITIONS
  6080					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6081					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6082					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6083					;BIT IS ONE AFTER ROTATING
  6084					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6085
  6086			004210		SN=SN+1
  6087			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6088						IFE	ZZ,<ZZ=400000>
  6089			000400			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6090	034022	205 07 0 00 002000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6091						IFG	<ZZ-2>,<
  6092	034023	205 06 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6093						IFE	<ZZ-2>,<
  6094						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6095						IFE	<ZZ-1>,<
  6096						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6097	034024	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6098	034025	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6099	034026	003 07 0 00 004210 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6100	034027	321 11 0 00 034022 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6101
  6102					;TEST ROT RIGHT TWO BIT POSITIONS
  6103					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6104					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6105					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6106					;BIT IS ONE AFTER ROTATING
  6107					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6108
  6109			004211		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0139

  6110			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6111						IFE	ZZ,<ZZ=400000>
  6112			000200			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6113	034030	205 07 0 00 001000 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6114						IFG	<ZZ-2>,<
  6115	034031	205 06 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6116						IFE	<ZZ-2>,<
  6117						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6118						IFE	<ZZ-1>,<
  6119						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6120	034032	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6121	034033	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6122	034034	003 07 0 00 004211 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6123	034035	321 11 0 00 034030 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6124
  6125					;TEST ROT RIGHT TWO BIT POSITIONS
  6126					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6127					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6128					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6129					;BIT IS ONE AFTER ROTATING
  6130					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6131
  6132			004212		SN=SN+1
  6133			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6134						IFE	ZZ,<ZZ=400000>
  6135			000100			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6136	034036	205 07 0 00 000400 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6137						IFG	<ZZ-2>,<
  6138	034037	205 06 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6139						IFE	<ZZ-2>,<
  6140						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6141						IFE	<ZZ-1>,<
  6142						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6143	034040	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6144	034041	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6145	034042	003 07 0 00 004212 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6146	034043	321 11 0 00 034036 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6147
  6148					;TEST ROT RIGHT TWO BIT POSITIONS
  6149					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6150					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6151					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6152					;BIT IS ONE AFTER ROTATING
  6153					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6154
  6155			004213		SN=SN+1
  6156			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6157						IFE	ZZ,<ZZ=400000>
  6158			000040			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6159	034044	205 07 0 00 000200 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6160						IFG	<ZZ-2>,<
  6161	034045	205 06 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6162						IFE	<ZZ-2>,<
  6163						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6164						IFE	<ZZ-1>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0140

  6165						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6166	034046	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6167	034047	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6168	034050	003 07 0 00 004213 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6169	034051	321 11 0 00 034044 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6170
  6171					;TEST ROT RIGHT TWO BIT POSITIONS
  6172					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6173					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6174					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6175					;BIT IS ONE AFTER ROTATING
  6176					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6177
  6178			004214		SN=SN+1
  6179			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6180						IFE	ZZ,<ZZ=400000>
  6181			000020			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6182	034052	205 07 0 00 000100 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6183						IFG	<ZZ-2>,<
  6184	034053	205 06 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6185						IFE	<ZZ-2>,<
  6186						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6187						IFE	<ZZ-1>,<
  6188						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6189	034054	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6190	034055	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6191	034056	003 07 0 00 004214 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6192	034057	321 11 0 00 034052 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6193
  6194					;TEST ROT RIGHT TWO BIT POSITIONS
  6195					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6196					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6197					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6198					;BIT IS ONE AFTER ROTATING
  6199					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6200
  6201			004215		SN=SN+1
  6202			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6203						IFE	ZZ,<ZZ=400000>
  6204			000010			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6205	034060	205 07 0 00 000040 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6206						IFG	<ZZ-2>,<
  6207	034061	205 06 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6208						IFE	<ZZ-2>,<
  6209						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6210						IFE	<ZZ-1>,<
  6211						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6212	034062	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6213	034063	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6214	034064	003 07 0 00 004215 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6215	034065	321 11 0 00 034060 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6216
  6217					;TEST ROT RIGHT TWO BIT POSITIONS
  6218					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6219					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0141

  6220					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6221					;BIT IS ONE AFTER ROTATING
  6222					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6223
  6224			004216		SN=SN+1
  6225			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6226						IFE	ZZ,<ZZ=400000>
  6227			000004			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6228	034066	205 07 0 00 000020 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6229						IFG	<ZZ-2>,<
  6230	034067	205 06 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6231						IFE	<ZZ-2>,<
  6232						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6233						IFE	<ZZ-1>,<
  6234						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6235	034070	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6236	034071	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6237	034072	003 07 0 00 004216 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6238	034073	321 11 0 00 034066 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6239
  6240					;TEST ROT RIGHT TWO BIT POSITIONS
  6241					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6242					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6243					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6244					;BIT IS ONE AFTER ROTATING
  6245					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6246
  6247			004217		SN=SN+1
  6248			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6249						IFE	ZZ,<ZZ=400000>
  6250			000002			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6251	034074	205 07 0 00 000010 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6252						IFG	<ZZ-2>,<
  6253	034075	205 06 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6254						IFE	<ZZ-2>,<
  6255						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6256						IFE	<ZZ-1>,<
  6257						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6258	034076	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6259	034077	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6260	034100	003 07 0 00 004217 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6261	034101	321 11 0 00 034074 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6262
  6263					;TEST ROT RIGHT TWO BIT POSITIONS
  6264					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6265					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6266					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6267					;BIT IS ONE AFTER ROTATING
  6268					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6269
  6270			004220		SN=SN+1
  6271			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6272						IFE	ZZ,<ZZ=400000>
  6273			000001			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6274	034102	205 07 0 00 000004 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0142

  6275						IFG	<ZZ-2>,<
  6276	034103	205 06 0 00 000001 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6277						IFE	<ZZ-2>,<
  6278						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6279						IFE	<ZZ-1>,<
  6280						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6281	034104	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6282	034105	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6283	034106	003 07 0 00 004220 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6284	034107	321 11 0 00 034102 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6285
  6286					;TEST ROT RIGHT TWO BIT POSITIONS
  6287					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6288					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6289					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6290					;BIT IS ONE AFTER ROTATING
  6291					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6292
  6293			004221		SN=SN+1
  6294			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6295						IFE	ZZ,<ZZ=400000>
  6296			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6297	034110	205 07 0 00 000002 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6298						IFG	<ZZ-2>,<
  6299						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6300						IFE	<ZZ-2>,<
  6301	034111	201 06 0 00 400000 		MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6302						IFE	<ZZ-1>,<
  6303						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6304	034112	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6305	034113	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6306	034114	003 07 0 00 004221 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6307	034115	321 11 0 00 034110 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6308
  6309					;TEST ROT RIGHT TWO BIT POSITIONS
  6310					;TEST ABILITY TO ROTATE A ONE GHROUGH THE 36 BITS OF THE AR
  6311					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6312					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER
  6313					;BIT IS ONE AFTER ROTATING
  6314					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6315
  6316			004222		SN=SN+1
  6317			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6318						IFE	ZZ,<ZZ=400000>
  6319			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6320	034116	205 07 0 00 000001 		MOVSI	AC,ZZ		;SET BIT (N) OF AC LEFT
  6321						IFG	<ZZ-2>,<
  6322						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  6323						IFE	<ZZ-2>,<
  6324						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
  6325						IFE	<ZZ-1>,<
  6326	034117	201 06 0 00 200000 		MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
  6327	034120	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6328	034121	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6329	034122	003 07 0 00 004222 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0143

  6330	034123	321 11 0 00 034116 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6331
  6332					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0144

  6333			000000			ZZ=0
  6334
  6335							;TEST AC RIGHT HALF <
  6336						REPEAT	^D18,<;TEST ROT RIGHT TWO BIT POSITIONS
  6337					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6338					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6339					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6340					;ONE AFTER ROTATING
  6341					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6342
  6343					SN=SN+1
  6344						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6345						IFE	ZZ,<ZZ=400000>
  6346						YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6347						MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6348						IFG	<ZZ-2>,<
  6349						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6350						IFE	<ZZ-2>,<
  6351						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6352						IFE	<ZZ-1>,<
  6353						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6354						ROT	AC,-2		;*ROTATE RIGHT TWO
  6355						CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6356						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6357						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6358					>
  6359					;TEST ROT RIGHT TWO BIT POSITIONS
  6360					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6361					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6362					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6363					;ONE AFTER ROTATING
  6364					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6365
  6366			004223		SN=SN+1
  6367			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6368			400000			IFE	ZZ,<ZZ=400000>
  6369			100000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6370	034124	201 07 0 00 400000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6371						IFG	<ZZ-2>,<
  6372	034125	201 06 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6373						IFE	<ZZ-2>,<
  6374						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6375						IFE	<ZZ-1>,<
  6376						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6377	034126	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6378	034127	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6379	034130	003 07 0 00 004223 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6380	034131	321 11 0 00 034124 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6381
  6382					;TEST ROT RIGHT TWO BIT POSITIONS
  6383					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6384					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6385					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6386					;ONE AFTER ROTATING
  6387					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0145

  6388
  6389			004224		SN=SN+1
  6390			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6391						IFE	ZZ,<ZZ=400000>
  6392			040000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6393	034132	201 07 0 00 200000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6394						IFG	<ZZ-2>,<
  6395	034133	201 06 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6396						IFE	<ZZ-2>,<
  6397						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6398						IFE	<ZZ-1>,<
  6399						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6400	034134	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6401	034135	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6402	034136	003 07 0 00 004224 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6403	034137	321 11 0 00 034132 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6404
  6405					;TEST ROT RIGHT TWO BIT POSITIONS
  6406					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6407					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6408					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6409					;ONE AFTER ROTATING
  6410					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6411
  6412			004225		SN=SN+1
  6413			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6414						IFE	ZZ,<ZZ=400000>
  6415			020000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6416	034140	201 07 0 00 100000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6417						IFG	<ZZ-2>,<
  6418	034141	201 06 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6419						IFE	<ZZ-2>,<
  6420						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6421						IFE	<ZZ-1>,<
  6422						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6423	034142	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6424	034143	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6425	034144	003 07 0 00 004225 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6426	034145	321 11 0 00 034140 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6427
  6428					;TEST ROT RIGHT TWO BIT POSITIONS
  6429					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6430					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6431					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6432					;ONE AFTER ROTATING
  6433					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6434
  6435			004226		SN=SN+1
  6436			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6437						IFE	ZZ,<ZZ=400000>
  6438			010000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6439	034146	201 07 0 00 040000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6440						IFG	<ZZ-2>,<
  6441	034147	201 06 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6442						IFE	<ZZ-2>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0146

  6443						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6444						IFE	<ZZ-1>,<
  6445						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6446	034150	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6447	034151	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6448	034152	003 07 0 00 004226 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6449	034153	321 11 0 00 034146 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6450
  6451					;TEST ROT RIGHT TWO BIT POSITIONS
  6452					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6453					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6454					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6455					;ONE AFTER ROTATING
  6456					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6457
  6458			004227		SN=SN+1
  6459			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6460						IFE	ZZ,<ZZ=400000>
  6461			004000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6462	034154	201 07 0 00 020000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6463						IFG	<ZZ-2>,<
  6464	034155	201 06 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6465						IFE	<ZZ-2>,<
  6466						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6467						IFE	<ZZ-1>,<
  6468						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6469	034156	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6470	034157	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6471	034160	003 07 0 00 004227 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6472	034161	321 11 0 00 034154 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6473
  6474					;TEST ROT RIGHT TWO BIT POSITIONS
  6475					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6476					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6477					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6478					;ONE AFTER ROTATING
  6479					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6480
  6481			004230		SN=SN+1
  6482			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6483						IFE	ZZ,<ZZ=400000>
  6484			002000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6485	034162	201 07 0 00 010000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6486						IFG	<ZZ-2>,<
  6487	034163	201 06 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6488						IFE	<ZZ-2>,<
  6489						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6490						IFE	<ZZ-1>,<
  6491						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6492	034164	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6493	034165	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6494	034166	003 07 0 00 004230 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6495	034167	321 11 0 00 034162 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6496
  6497					;TEST ROT RIGHT TWO BIT POSITIONS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0147

  6498					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6499					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6500					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6501					;ONE AFTER ROTATING
  6502					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6503
  6504			004231		SN=SN+1
  6505			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6506						IFE	ZZ,<ZZ=400000>
  6507			001000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6508	034170	201 07 0 00 004000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6509						IFG	<ZZ-2>,<
  6510	034171	201 06 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6511						IFE	<ZZ-2>,<
  6512						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6513						IFE	<ZZ-1>,<
  6514						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6515	034172	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6516	034173	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6517	034174	003 07 0 00 004231 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6518	034175	321 11 0 00 034170 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6519
  6520					;TEST ROT RIGHT TWO BIT POSITIONS
  6521					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6522					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6523					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6524					;ONE AFTER ROTATING
  6525					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6526
  6527			004232		SN=SN+1
  6528			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6529						IFE	ZZ,<ZZ=400000>
  6530			000400			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6531	034176	201 07 0 00 002000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6532						IFG	<ZZ-2>,<
  6533	034177	201 06 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6534						IFE	<ZZ-2>,<
  6535						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6536						IFE	<ZZ-1>,<
  6537						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6538	034200	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6539	034201	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6540	034202	003 07 0 00 004232 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6541	034203	321 11 0 00 034176 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6542
  6543					;TEST ROT RIGHT TWO BIT POSITIONS
  6544					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6545					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6546					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6547					;ONE AFTER ROTATING
  6548					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6549
  6550			004233		SN=SN+1
  6551			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6552						IFE	ZZ,<ZZ=400000>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0148

  6553			000200			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6554	034204	201 07 0 00 001000 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6555						IFG	<ZZ-2>,<
  6556	034205	201 06 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6557						IFE	<ZZ-2>,<
  6558						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6559						IFE	<ZZ-1>,<
  6560						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6561	034206	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6562	034207	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6563	034210	003 07 0 00 004233 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6564	034211	321 11 0 00 034204 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6565
  6566					;TEST ROT RIGHT TWO BIT POSITIONS
  6567					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6568					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6569					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6570					;ONE AFTER ROTATING
  6571					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6572
  6573			004234		SN=SN+1
  6574			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6575						IFE	ZZ,<ZZ=400000>
  6576			000100			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6577	034212	201 07 0 00 000400 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6578						IFG	<ZZ-2>,<
  6579	034213	201 06 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6580						IFE	<ZZ-2>,<
  6581						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6582						IFE	<ZZ-1>,<
  6583						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6584	034214	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6585	034215	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6586	034216	003 07 0 00 004234 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6587	034217	321 11 0 00 034212 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6588
  6589					;TEST ROT RIGHT TWO BIT POSITIONS
  6590					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6591					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6592					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6593					;ONE AFTER ROTATING
  6594					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6595
  6596			004235		SN=SN+1
  6597			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6598						IFE	ZZ,<ZZ=400000>
  6599			000040			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6600	034220	201 07 0 00 000200 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6601						IFG	<ZZ-2>,<
  6602	034221	201 06 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6603						IFE	<ZZ-2>,<
  6604						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6605						IFE	<ZZ-1>,<
  6606						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6607	034222	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0149

  6608	034223	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6609	034224	003 07 0 00 004235 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6610	034225	321 11 0 00 034220 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6611
  6612					;TEST ROT RIGHT TWO BIT POSITIONS
  6613					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6614					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6615					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6616					;ONE AFTER ROTATING
  6617					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6618
  6619			004236		SN=SN+1
  6620			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6621						IFE	ZZ,<ZZ=400000>
  6622			000020			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6623	034226	201 07 0 00 000100 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6624						IFG	<ZZ-2>,<
  6625	034227	201 06 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6626						IFE	<ZZ-2>,<
  6627						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6628						IFE	<ZZ-1>,<
  6629						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6630	034230	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6631	034231	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6632	034232	003 07 0 00 004236 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6633	034233	321 11 0 00 034226 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6634
  6635					;TEST ROT RIGHT TWO BIT POSITIONS
  6636					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6637					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6638					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6639					;ONE AFTER ROTATING
  6640					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6641
  6642			004237		SN=SN+1
  6643			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6644						IFE	ZZ,<ZZ=400000>
  6645			000010			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6646	034234	201 07 0 00 000040 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6647						IFG	<ZZ-2>,<
  6648	034235	201 06 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6649						IFE	<ZZ-2>,<
  6650						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6651						IFE	<ZZ-1>,<
  6652						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6653	034236	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6654	034237	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6655	034240	003 07 0 00 004237 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6656	034241	321 11 0 00 034234 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6657
  6658					;TEST ROT RIGHT TWO BIT POSITIONS
  6659					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6660					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6661					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6662					;ONE AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0150

  6663					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6664
  6665			004240		SN=SN+1
  6666			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6667						IFE	ZZ,<ZZ=400000>
  6668			000004			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6669	034242	201 07 0 00 000020 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6670						IFG	<ZZ-2>,<
  6671	034243	201 06 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6672						IFE	<ZZ-2>,<
  6673						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6674						IFE	<ZZ-1>,<
  6675						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6676	034244	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6677	034245	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6678	034246	003 07 0 00 004240 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6679	034247	321 11 0 00 034242 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6680
  6681					;TEST ROT RIGHT TWO BIT POSITIONS
  6682					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6683					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6684					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6685					;ONE AFTER ROTATING
  6686					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6687
  6688			004241		SN=SN+1
  6689			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6690						IFE	ZZ,<ZZ=400000>
  6691			000002			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6692	034250	201 07 0 00 000010 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6693						IFG	<ZZ-2>,<
  6694	034251	201 06 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6695						IFE	<ZZ-2>,<
  6696						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6697						IFE	<ZZ-1>,<
  6698						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6699	034252	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6700	034253	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6701	034254	003 07 0 00 004241 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6702	034255	321 11 0 00 034250 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6703
  6704					;TEST ROT RIGHT TWO BIT POSITIONS
  6705					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6706					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6707					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6708					;ONE AFTER ROTATING
  6709					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6710
  6711			004242		SN=SN+1
  6712			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6713						IFE	ZZ,<ZZ=400000>
  6714			000001			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6715	034256	201 07 0 00 000004 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6716						IFG	<ZZ-2>,<
  6717	034257	201 06 0 00 000001 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 17-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0151

  6718						IFE	<ZZ-2>,<
  6719						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6720						IFE	<ZZ-1>,<
  6721						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6722	034260	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6723	034261	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6724	034262	003 07 0 00 004242 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6725	034263	321 11 0 00 034256 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6726
  6727					;TEST ROT RIGHT TWO BIT POSITIONS
  6728					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6729					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6730					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6731					;ONE AFTER ROTATING
  6732					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6733
  6734			004243		SN=SN+1
  6735			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6736						IFE	ZZ,<ZZ=400000>
  6737			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6738	034264	201 07 0 00 000002 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6739						IFG	<ZZ-2>,<
  6740						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6741						IFE	<ZZ-2>,<
  6742	034265	205 06 0 00 400000 		MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6743						IFE	<ZZ-1>,<
  6744						MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6745	034266	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6746	034267	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6747	034270	003 07 0 00 004243 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6748	034271	321 11 0 00 034264 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6749
  6750					;TEST ROT RIGHT TWO BIT POSITIONS
  6751					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE AR
  6752					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6753					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY OTHER BIT IS
  6754					;ONE AFTER ROTATING
  6755					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS
  6756
  6757			004244		SN=SN+1
  6758			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  6759						IFE	ZZ,<ZZ=400000>
  6760			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
  6761	034272	201 07 0 00 000001 		MOVEI	AC,ZZ		;SET BIT (N) OF AC RIGHT
  6762						IFG	<ZZ-2>,<
  6763						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  6764						IFE	<ZZ-2>,<
  6765						MOVSI	AC-1,400000	;SETUP FOR COMPARISON>
  6766						IFE	<ZZ-1>,<
  6767	034273	205 06 0 00 200000 		MOVSI	AC-1,200000	;SETUP FOR COMPARISON>
  6768	034274	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6769	034275	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ONE
  6770	034276	003 07 0 00 004244 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6771	034277	321 11 0 00 034272 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6772
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0152

  6773			004300		SN=4300
  6774			000001			ZZ=1
  6775
  6776							;TEST AC LEFT HALF<
  6777					E4300:	REPEAT	^D18,<;TEST ROT RIGHT TWO BIT POSITIONS
  6778					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6779					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6780					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6781					;IS ZERO AFTER ROTATING.
  6782					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6783
  6784					SN=SN+1
  6785						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6786						IFE	<ZZ>,<ZZ=777777377777>
  6787						YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6788						HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6789						IFL	<ZZ&777777-777775>,<
  6790						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6791						IFE	<ZZ&777777-777775>,<
  6792						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6793						IFE	<ZZ&777777-777776>,<
  6794						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6795						ROT	AC,-2		;*ROTATE RIGHT TWO
  6796						CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6797						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6798						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6799					>
  6800					;TEST ROT RIGHT TWO BIT POSITIONS
  6801					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6802					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6803					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6804					;IS ZERO AFTER ROTATING.
  6805					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6806
  6807			004301		SN=SN+1
  6808			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6809		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
  6810			677777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6811	034300	525 07 0 00 377777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6812						IFL	<ZZ&777777-777775>,<
  6813	034301	525 06 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6814						IFE	<ZZ&777777-777775>,<
  6815						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6816						IFE	<ZZ&777777-777776>,<
  6817						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6818	034302	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6819	034303	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6820	034304	003 07 0 00 004301 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6821	034305	321 11 0 00 034300 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6822
  6823					;TEST ROT RIGHT TWO BIT POSITIONS
  6824					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6825					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6826					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6827					;IS ZERO AFTER ROTATING.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0153

  6828					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6829
  6830			004302		SN=SN+1
  6831		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6832						IFE	<ZZ>,<ZZ=777777377777>
  6833			737777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6834	034306	525 07 0 00 577777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6835						IFL	<ZZ&777777-777775>,<
  6836	034307	525 06 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6837						IFE	<ZZ&777777-777775>,<
  6838						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6839						IFE	<ZZ&777777-777776>,<
  6840						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6841	034310	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6842	034311	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6843	034312	003 07 0 00 004302 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6844	034313	321 11 0 00 034306 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6845
  6846					;TEST ROT RIGHT TWO BIT POSITIONS
  6847					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6848					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6849					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6850					;IS ZERO AFTER ROTATING.
  6851					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6852
  6853			004303		SN=SN+1
  6854		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6855						IFE	<ZZ>,<ZZ=777777377777>
  6856			757777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6857	034314	525 07 0 00 677777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6858						IFL	<ZZ&777777-777775>,<
  6859	034315	525 06 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6860						IFE	<ZZ&777777-777775>,<
  6861						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6862						IFE	<ZZ&777777-777776>,<
  6863						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6864	034316	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6865	034317	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6866	034320	003 07 0 00 004303 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6867	034321	321 11 0 00 034314 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6868
  6869					;TEST ROT RIGHT TWO BIT POSITIONS
  6870					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6871					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6872					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6873					;IS ZERO AFTER ROTATING.
  6874					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6875
  6876			004304		SN=SN+1
  6877		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6878						IFE	<ZZ>,<ZZ=777777377777>
  6879			767777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6880	034322	525 07 0 00 737777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6881						IFL	<ZZ&777777-777775>,<
  6882	034323	525 06 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0154

  6883						IFE	<ZZ&777777-777775>,<
  6884						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6885						IFE	<ZZ&777777-777776>,<
  6886						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6887	034324	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6888	034325	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6889	034326	003 07 0 00 004304 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6890	034327	321 11 0 00 034322 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6891
  6892					;TEST ROT RIGHT TWO BIT POSITIONS
  6893					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6894					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6895					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6896					;IS ZERO AFTER ROTATING.
  6897					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6898
  6899			004305		SN=SN+1
  6900		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6901						IFE	<ZZ>,<ZZ=777777377777>
  6902			773777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6903	034330	525 07 0 00 757777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6904						IFL	<ZZ&777777-777775>,<
  6905	034331	525 06 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6906						IFE	<ZZ&777777-777775>,<
  6907						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6908						IFE	<ZZ&777777-777776>,<
  6909						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6910	034332	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6911	034333	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6912	034334	003 07 0 00 004305 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6913	034335	321 11 0 00 034330 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6914
  6915					;TEST ROT RIGHT TWO BIT POSITIONS
  6916					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6917					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6918					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6919					;IS ZERO AFTER ROTATING.
  6920					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6921
  6922			004306		SN=SN+1
  6923		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6924						IFE	<ZZ>,<ZZ=777777377777>
  6925			775777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6926	034336	525 07 0 00 767777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6927						IFL	<ZZ&777777-777775>,<
  6928	034337	525 06 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6929						IFE	<ZZ&777777-777775>,<
  6930						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6931						IFE	<ZZ&777777-777776>,<
  6932						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6933	034340	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6934	034341	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6935	034342	003 07 0 00 004306 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6936	034343	321 11 0 00 034336 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6937
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0155

  6938					;TEST ROT RIGHT TWO BIT POSITIONS
  6939					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6940					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6941					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6942					;IS ZERO AFTER ROTATING.
  6943					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6944
  6945			004307		SN=SN+1
  6946		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6947						IFE	<ZZ>,<ZZ=777777377777>
  6948			776777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6949	034344	525 07 0 00 773777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6950						IFL	<ZZ&777777-777775>,<
  6951	034345	525 06 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6952						IFE	<ZZ&777777-777775>,<
  6953						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6954						IFE	<ZZ&777777-777776>,<
  6955						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6956	034346	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6957	034347	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6958	034350	003 07 0 00 004307 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6959	034351	321 11 0 00 034344 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6960
  6961					;TEST ROT RIGHT TWO BIT POSITIONS
  6962					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6963					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6964					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6965					;IS ZERO AFTER ROTATING.
  6966					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6967
  6968			004310		SN=SN+1
  6969		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  6970						IFE	<ZZ>,<ZZ=777777377777>
  6971			777377			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6972	034352	525 07 0 00 775777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6973						IFL	<ZZ&777777-777775>,<
  6974	034353	525 06 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6975						IFE	<ZZ&777777-777775>,<
  6976						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  6977						IFE	<ZZ&777777-777776>,<
  6978						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  6979	034354	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  6980	034355	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  6981	034356	003 07 0 00 004310 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  6982	034357	321 11 0 00 034352 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  6983
  6984					;TEST ROT RIGHT TWO BIT POSITIONS
  6985					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  6986					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  6987					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  6988					;IS ZERO AFTER ROTATING.
  6989					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  6990
  6991			004311		SN=SN+1
  6992		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0156

  6993						IFE	<ZZ>,<ZZ=777777377777>
  6994			777577			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  6995	034360	525 07 0 00 776777 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  6996						IFL	<ZZ&777777-777775>,<
  6997	034361	525 06 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  6998						IFE	<ZZ&777777-777775>,<
  6999						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7000						IFE	<ZZ&777777-777776>,<
  7001						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7002	034362	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7003	034363	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7004	034364	003 07 0 00 004311 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7005	034365	321 11 0 00 034360 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7006
  7007					;TEST ROT RIGHT TWO BIT POSITIONS
  7008					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7009					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7010					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7011					;IS ZERO AFTER ROTATING.
  7012					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7013
  7014			004312		SN=SN+1
  7015		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7016						IFE	<ZZ>,<ZZ=777777377777>
  7017			777677			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7018	034366	525 07 0 00 777377 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7019						IFL	<ZZ&777777-777775>,<
  7020	034367	525 06 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7021						IFE	<ZZ&777777-777775>,<
  7022						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7023						IFE	<ZZ&777777-777776>,<
  7024						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7025	034370	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7026	034371	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7027	034372	003 07 0 00 004312 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7028	034373	321 11 0 00 034366 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7029
  7030					;TEST ROT RIGHT TWO BIT POSITIONS
  7031					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7032					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7033					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7034					;IS ZERO AFTER ROTATING.
  7035					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7036
  7037			004313		SN=SN+1
  7038		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7039						IFE	<ZZ>,<ZZ=777777377777>
  7040			777737			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7041	034374	525 07 0 00 777577 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7042						IFL	<ZZ&777777-777775>,<
  7043	034375	525 06 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7044						IFE	<ZZ&777777-777775>,<
  7045						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7046						IFE	<ZZ&777777-777776>,<
  7047						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0157

  7048	034376	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7049	034377	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7050	034400	003 07 0 00 004313 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7051	034401	321 11 0 00 034374 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7052
  7053					;TEST ROT RIGHT TWO BIT POSITIONS
  7054					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7055					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7056					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7057					;IS ZERO AFTER ROTATING.
  7058					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7059
  7060			004314		SN=SN+1
  7061		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7062						IFE	<ZZ>,<ZZ=777777377777>
  7063			777757			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7064	034402	525 07 0 00 777677 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7065						IFL	<ZZ&777777-777775>,<
  7066	034403	525 06 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7067						IFE	<ZZ&777777-777775>,<
  7068						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7069						IFE	<ZZ&777777-777776>,<
  7070						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7071	034404	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7072	034405	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7073	034406	003 07 0 00 004314 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7074	034407	321 11 0 00 034402 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7075
  7076					;TEST ROT RIGHT TWO BIT POSITIONS
  7077					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7078					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7079					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7080					;IS ZERO AFTER ROTATING.
  7081					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7082
  7083			004315		SN=SN+1
  7084		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7085						IFE	<ZZ>,<ZZ=777777377777>
  7086			777767			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7087	034410	525 07 0 00 777737 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7088						IFL	<ZZ&777777-777775>,<
  7089	034411	525 06 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7090						IFE	<ZZ&777777-777775>,<
  7091						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7092						IFE	<ZZ&777777-777776>,<
  7093						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7094	034412	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7095	034413	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7096	034414	003 07 0 00 004315 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7097	034415	321 11 0 00 034410 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7098
  7099					;TEST ROT RIGHT TWO BIT POSITIONS
  7100					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7101					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7102					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0158

  7103					;IS ZERO AFTER ROTATING.
  7104					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7105
  7106			004316		SN=SN+1
  7107		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7108						IFE	<ZZ>,<ZZ=777777377777>
  7109			777773			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7110	034416	525 07 0 00 777757 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7111						IFL	<ZZ&777777-777775>,<
  7112	034417	525 06 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7113						IFE	<ZZ&777777-777775>,<
  7114						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7115						IFE	<ZZ&777777-777776>,<
  7116						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7117	034420	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7118	034421	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7119	034422	003 07 0 00 004316 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7120	034423	321 11 0 00 034416 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7121
  7122					;TEST ROT RIGHT TWO BIT POSITIONS
  7123					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7124					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7125					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7126					;IS ZERO AFTER ROTATING.
  7127					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7128
  7129			004317		SN=SN+1
  7130		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7131						IFE	<ZZ>,<ZZ=777777377777>
  7132			777775			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7133	034424	525 07 0 00 777767 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7134						IFL	<ZZ&777777-777775>,<
  7135	034425	525 06 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7136						IFE	<ZZ&777777-777775>,<
  7137						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7138						IFE	<ZZ&777777-777776>,<
  7139						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7140	034426	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7141	034427	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7142	034430	003 07 0 00 004317 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7143	034431	321 11 0 00 034424 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7144
  7145					;TEST ROT RIGHT TWO BIT POSITIONS
  7146					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7147					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7148					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7149					;IS ZERO AFTER ROTATING.
  7150					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7151
  7152			004320		SN=SN+1
  7153		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7154						IFE	<ZZ>,<ZZ=777777377777>
  7155			777776			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7156	034432	525 07 0 00 777773 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7157						IFL	<ZZ&777777-777775>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0159

  7158	034433	525 06 0 00 777776 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7159						IFE	<ZZ&777777-777775>,<
  7160						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7161						IFE	<ZZ&777777-777776>,<
  7162						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7163	034434	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7164	034435	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7165	034436	003 07 0 00 004320 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7166	034437	321 11 0 00 034432 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7167
  7168					;TEST ROT RIGHT TWO BIT POSITIONS
  7169					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7170					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7171					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7172					;IS ZERO AFTER ROTATING.
  7173					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7174
  7175			004321		SN=SN+1
  7176		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7177						IFE	<ZZ>,<ZZ=777777377777>
  7178			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7179	034440	525 07 0 00 777775 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7180						IFL	<ZZ&777777-777775>,<
  7181						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7182						IFE	<ZZ&777777-777775>,<
  7183	034441	561 06 0 00 377777 		HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7184						IFE	<ZZ&777777-777776>,<
  7185						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7186	034442	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7187	034443	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7188	034444	003 07 0 00 004321 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7189	034445	321 11 0 00 034440 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7190
  7191					;TEST ROT RIGHT TWO BIT POSITIONS
  7192					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7193					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7194					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7195					;IS ZERO AFTER ROTATING.
  7196					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7197
  7198			004322		SN=SN+1
  7199		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7200						IFE	<ZZ>,<ZZ=777777377777>
  7201			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7202	034446	525 07 0 00 777776 		HRLOI	AC,ZZ&777777	;CLEAR BIT (N) OF AC LEFT
  7203						IFL	<ZZ&777777-777775>,<
  7204						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
  7205						IFE	<ZZ&777777-777775>,<
  7206						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
  7207						IFE	<ZZ&777777-777776>,<
  7208	034447	561 06 0 00 577777 		HRROI	AC-1,577777	;SETUP FOR COMPARISON>
  7209	034450	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7210	034451	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+2) A ZERO
  7211	034452	003 07 0 00 004322 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7212	034453	321 11 0 00 034446 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0160

  7213
  7214					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0161

  7215			000001			ZZ=1
  7216
  7217							;TEST AC RIGHT HALF<
  7218						REPEAT	^D18,<;TEST ROT RIGHT TWO BIT POSITIONS
  7219					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7220					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7221					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7222					;IS ZERO AFTER ROTATING.
  7223					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7224
  7225					SN=SN+1
  7226						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7227						IFE	<ZZ>,<ZZ=777777377777>
  7228						YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7229						HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7230						IFL	<ZZ&777777-777775>,<
  7231						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7232						IFE	<ZZ&777777-777775>,<
  7233						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7234						IFE	<ZZ&777777-777776>,<
  7235						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7236						ROT	AC,-2		;*ROTATE RIGHT TWO
  7237						CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7238						ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7239						JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7240					>
  7241					;TEST ROT RIGHT TWO BIT POSITIONS
  7242					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7243					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7244					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7245					;IS ZERO AFTER ROTATING.
  7246					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7247
  7248			004323		SN=SN+1
  7249			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7250		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
  7251			677777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7252	034454	561 07 0 00 377777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7253						IFL	<ZZ&777777-777775>,<
  7254	034455	561 06 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7255						IFE	<ZZ&777777-777775>,<
  7256						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7257						IFE	<ZZ&777777-777776>,<
  7258						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7259	034456	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7260	034457	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7261	034460	003 07 0 00 004323 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7262	034461	321 11 0 00 034454 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7263
  7264					;TEST ROT RIGHT TWO BIT POSITIONS
  7265					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7266					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7267					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7268					;IS ZERO AFTER ROTATING.
  7269					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0162

  7270
  7271			004324		SN=SN+1
  7272		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7273						IFE	<ZZ>,<ZZ=777777377777>
  7274			737777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7275	034462	561 07 0 00 577777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7276						IFL	<ZZ&777777-777775>,<
  7277	034463	561 06 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7278						IFE	<ZZ&777777-777775>,<
  7279						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7280						IFE	<ZZ&777777-777776>,<
  7281						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7282	034464	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7283	034465	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7284	034466	003 07 0 00 004324 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7285	034467	321 11 0 00 034462 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7286
  7287					;TEST ROT RIGHT TWO BIT POSITIONS
  7288					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7289					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7290					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7291					;IS ZERO AFTER ROTATING.
  7292					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7293
  7294			004325		SN=SN+1
  7295		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7296						IFE	<ZZ>,<ZZ=777777377777>
  7297			757777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7298	034470	561 07 0 00 677777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7299						IFL	<ZZ&777777-777775>,<
  7300	034471	561 06 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7301						IFE	<ZZ&777777-777775>,<
  7302						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7303						IFE	<ZZ&777777-777776>,<
  7304						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7305	034472	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7306	034473	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7307	034474	003 07 0 00 004325 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7308	034475	321 11 0 00 034470 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7309
  7310					;TEST ROT RIGHT TWO BIT POSITIONS
  7311					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7312					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7313					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7314					;IS ZERO AFTER ROTATING.
  7315					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7316
  7317			004326		SN=SN+1
  7318		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7319						IFE	<ZZ>,<ZZ=777777377777>
  7320			767777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7321	034476	561 07 0 00 737777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7322						IFL	<ZZ&777777-777775>,<
  7323	034477	561 06 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7324						IFE	<ZZ&777777-777775>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0163

  7325						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7326						IFE	<ZZ&777777-777776>,<
  7327						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7328	034500	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7329	034501	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7330	034502	003 07 0 00 004326 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7331	034503	321 11 0 00 034476 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7332
  7333					;TEST ROT RIGHT TWO BIT POSITIONS
  7334					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7335					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7336					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7337					;IS ZERO AFTER ROTATING.
  7338					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7339
  7340			004327		SN=SN+1
  7341		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7342						IFE	<ZZ>,<ZZ=777777377777>
  7343			773777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7344	034504	561 07 0 00 757777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7345						IFL	<ZZ&777777-777775>,<
  7346	034505	561 06 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7347						IFE	<ZZ&777777-777775>,<
  7348						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7349						IFE	<ZZ&777777-777776>,<
  7350						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7351	034506	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7352	034507	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7353	034510	003 07 0 00 004327 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7354	034511	321 11 0 00 034504 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7355
  7356					;TEST ROT RIGHT TWO BIT POSITIONS
  7357					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7358					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7359					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7360					;IS ZERO AFTER ROTATING.
  7361					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7362
  7363			004330		SN=SN+1
  7364		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7365						IFE	<ZZ>,<ZZ=777777377777>
  7366			775777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7367	034512	561 07 0 00 767777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7368						IFL	<ZZ&777777-777775>,<
  7369	034513	561 06 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7370						IFE	<ZZ&777777-777775>,<
  7371						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7372						IFE	<ZZ&777777-777776>,<
  7373						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7374	034514	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7375	034515	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7376	034516	003 07 0 00 004330 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7377	034517	321 11 0 00 034512 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7378
  7379					;TEST ROT RIGHT TWO BIT POSITIONS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0164

  7380					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7381					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7382					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7383					;IS ZERO AFTER ROTATING.
  7384					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7385
  7386			004331		SN=SN+1
  7387		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7388						IFE	<ZZ>,<ZZ=777777377777>
  7389			776777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7390	034520	561 07 0 00 773777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7391						IFL	<ZZ&777777-777775>,<
  7392	034521	561 06 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7393						IFE	<ZZ&777777-777775>,<
  7394						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7395						IFE	<ZZ&777777-777776>,<
  7396						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7397	034522	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7398	034523	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7399	034524	003 07 0 00 004331 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7400	034525	321 11 0 00 034520 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7401
  7402					;TEST ROT RIGHT TWO BIT POSITIONS
  7403					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7404					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7405					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7406					;IS ZERO AFTER ROTATING.
  7407					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7408
  7409			004332		SN=SN+1
  7410		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7411						IFE	<ZZ>,<ZZ=777777377777>
  7412			777377			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7413	034526	561 07 0 00 775777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7414						IFL	<ZZ&777777-777775>,<
  7415	034527	561 06 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7416						IFE	<ZZ&777777-777775>,<
  7417						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7418						IFE	<ZZ&777777-777776>,<
  7419						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7420	034530	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7421	034531	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7422	034532	003 07 0 00 004332 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7423	034533	321 11 0 00 034526 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7424
  7425					;TEST ROT RIGHT TWO BIT POSITIONS
  7426					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7427					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7428					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7429					;IS ZERO AFTER ROTATING.
  7430					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7431
  7432			004333		SN=SN+1
  7433		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7434						IFE	<ZZ>,<ZZ=777777377777>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0165

  7435			777577			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7436	034534	561 07 0 00 776777 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7437						IFL	<ZZ&777777-777775>,<
  7438	034535	561 06 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7439						IFE	<ZZ&777777-777775>,<
  7440						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7441						IFE	<ZZ&777777-777776>,<
  7442						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7443	034536	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7444	034537	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7445	034540	003 07 0 00 004333 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7446	034541	321 11 0 00 034534 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7447
  7448					;TEST ROT RIGHT TWO BIT POSITIONS
  7449					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7450					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7451					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7452					;IS ZERO AFTER ROTATING.
  7453					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7454
  7455			004334		SN=SN+1
  7456		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7457						IFE	<ZZ>,<ZZ=777777377777>
  7458			777677			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7459	034542	561 07 0 00 777377 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7460						IFL	<ZZ&777777-777775>,<
  7461	034543	561 06 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7462						IFE	<ZZ&777777-777775>,<
  7463						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7464						IFE	<ZZ&777777-777776>,<
  7465						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7466	034544	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7467	034545	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7468	034546	003 07 0 00 004334 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7469	034547	321 11 0 00 034542 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7470
  7471					;TEST ROT RIGHT TWO BIT POSITIONS
  7472					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7473					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7474					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7475					;IS ZERO AFTER ROTATING.
  7476					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7477
  7478			004335		SN=SN+1
  7479		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7480						IFE	<ZZ>,<ZZ=777777377777>
  7481			777737			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7482	034550	561 07 0 00 777577 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7483						IFL	<ZZ&777777-777775>,<
  7484	034551	561 06 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7485						IFE	<ZZ&777777-777775>,<
  7486						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7487						IFE	<ZZ&777777-777776>,<
  7488						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7489	034552	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0166

  7490	034553	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7491	034554	003 07 0 00 004335 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7492	034555	321 11 0 00 034550 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7493
  7494					;TEST ROT RIGHT TWO BIT POSITIONS
  7495					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7496					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7497					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7498					;IS ZERO AFTER ROTATING.
  7499					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7500
  7501			004336		SN=SN+1
  7502		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7503						IFE	<ZZ>,<ZZ=777777377777>
  7504			777757			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7505	034556	561 07 0 00 777677 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7506						IFL	<ZZ&777777-777775>,<
  7507	034557	561 06 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7508						IFE	<ZZ&777777-777775>,<
  7509						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7510						IFE	<ZZ&777777-777776>,<
  7511						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7512	034560	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7513	034561	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7514	034562	003 07 0 00 004336 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7515	034563	321 11 0 00 034556 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7516
  7517					;TEST ROT RIGHT TWO BIT POSITIONS
  7518					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7519					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7520					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7521					;IS ZERO AFTER ROTATING.
  7522					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7523
  7524			004337		SN=SN+1
  7525		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7526						IFE	<ZZ>,<ZZ=777777377777>
  7527			777767			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7528	034564	561 07 0 00 777737 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7529						IFL	<ZZ&777777-777775>,<
  7530	034565	561 06 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7531						IFE	<ZZ&777777-777775>,<
  7532						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7533						IFE	<ZZ&777777-777776>,<
  7534						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7535	034566	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7536	034567	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7537	034570	003 07 0 00 004337 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7538	034571	321 11 0 00 034564 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7539
  7540					;TEST ROT RIGHT TWO BIT POSITIONS
  7541					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7542					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7543					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7544					;IS ZERO AFTER ROTATING.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0167

  7545					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7546
  7547			004340		SN=SN+1
  7548		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7549						IFE	<ZZ>,<ZZ=777777377777>
  7550			777773			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7551	034572	561 07 0 00 777757 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7552						IFL	<ZZ&777777-777775>,<
  7553	034573	561 06 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7554						IFE	<ZZ&777777-777775>,<
  7555						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7556						IFE	<ZZ&777777-777776>,<
  7557						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7558	034574	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7559	034575	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7560	034576	003 07 0 00 004340 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7561	034577	321 11 0 00 034572 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7562
  7563					;TEST ROT RIGHT TWO BIT POSITIONS
  7564					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7565					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7566					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7567					;IS ZERO AFTER ROTATING.
  7568					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7569
  7570			004341		SN=SN+1
  7571		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7572						IFE	<ZZ>,<ZZ=777777377777>
  7573			777775			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7574	034600	561 07 0 00 777767 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7575						IFL	<ZZ&777777-777775>,<
  7576	034601	561 06 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7577						IFE	<ZZ&777777-777775>,<
  7578						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7579						IFE	<ZZ&777777-777776>,<
  7580						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7581	034602	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7582	034603	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7583	034604	003 07 0 00 004341 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7584	034605	321 11 0 00 034600 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7585
  7586					;TEST ROT RIGHT TWO BIT POSITIONS
  7587					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7588					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7589					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7590					;IS ZERO AFTER ROTATING.
  7591					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7592
  7593			004342		SN=SN+1
  7594		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7595						IFE	<ZZ>,<ZZ=777777377777>
  7596			777776			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7597	034606	561 07 0 00 777773 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7598						IFL	<ZZ&777777-777775>,<
  7599	034607	561 06 0 00 777776 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 18-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST SHIFT LOGIC GATES BETWEEN AD AND AR                      SEQ 0168

  7600						IFE	<ZZ&777777-777775>,<
  7601						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7602						IFE	<ZZ&777777-777776>,<
  7603						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7604	034610	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7605	034611	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7606	034612	003 07 0 00 004342 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7607	034613	321 11 0 00 034606 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7608
  7609					;TEST ROT RIGHT TWO BIT POSITIONS
  7610					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7611					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7612					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7613					;IS ZERO AFTER ROTATING.
  7614					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7615
  7616			004343		SN=SN+1
  7617		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7618						IFE	<ZZ>,<ZZ=777777377777>
  7619			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7620	034614	561 07 0 00 777775 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7621						IFL	<ZZ&777777-777775>,<
  7622						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7623						IFE	<ZZ&777777-777775>,<
  7624	034615	525 06 0 00 377777 		HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7625						IFE	<ZZ&777777-777776>,<
  7626						HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7627	034616	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7628	034617	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7629	034620	003 07 0 00 004343 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7630	034621	321 11 0 00 034614 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7631
  7632					;TEST ROT RIGHT TWO BIT POSITIONS
  7633					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE AR
  7634					;TEST SHIFT LOGIC GATES BETWEEN AR AND AD
  7635					;AN ERROR OCCURS IF THE TESTED BIT IS ONE AND/OR ANY OTHER BIT
  7636					;IS ZERO AFTER ROTATING.
  7637					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  7638
  7639			004344		SN=SN+1
  7640		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
  7641						IFE	<ZZ>,<ZZ=777777377777>
  7642			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
  7643	034622	561 07 0 00 777776 		HRROI	AC,ZZ&777777	;CLEAR BIT (N) OF AC RIGHT
  7644						IFL	<ZZ&777777-777775>,<
  7645						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  7646						IFE	<ZZ&777777-777775>,<
  7647						HRLOI	AC-1,377777	;SETUP FOR COMPARISON>
  7648						IFE	<ZZ&777777-777776>,<
  7649	034623	525 06 0 00 577777 		HRLOI	AC-1,577777	;SETUP FOR COMPARISON>
  7650	034624	241 07 0 00 777776 		ROT	AC,-2		;*ROTATE RIGHT TWO
  7651	034625	312 07 0 00 000006 		CAME	AC,AC-1		;TEST FOR BIT (N+1) A ZERO
  7652	034626	003 07 0 00 004344 		ER3	AC,SN		;AD-AR GATE UNDER TEST FAILED
  7653	034627	321 11 0 00 034622 		JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
  7654
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 19
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0169

  7655					SUBTTL	DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES
  7656
  7657					;TEST ROTC LEFT ONE BIT POSITION USING ALL ZEROS
  7658					;TEST MQ SHIFT LOGIC GATES
  7659					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND
  7660					;AC+1 IS TESTED
  7661					;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
  7662
  7663			000010			AC=10
  7664						SAVEAC	(1,1)^
  7665	034630	201 12 0 00 034630 		MOVEI	AC+2,.		;SAVE TEST PC
  7666	034631	202 12 0 00 030051 		MOVEM	AC+2,TESTPC
  7667	034632	201 12 0 00 000012 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  7668	034633	202 12 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  7669
  7670	034634	403 10 0 00 000011 	E4400:	SETZB	AC,AC+1		;INITIALIZE AC,AC+1 TO ALL ZEROS
  7671	034635	402 00 0 00 000007 		SETZM	AC-1		;INITIALIZE RESULT TO ZERO
  7672	034636	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7673	034637	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ZEROS
  7674	034640	004 11 0 00 004401 		ER4	AC+1,4401	;MQ GATING FAILED
  7675	034641	321 12 0 00 034634 		JUMPL	AC+2,E4400	;LOOP ON ERROR SWITCH
  7676
  7677					;TEST ROTC LEFT ONE BIT POSITION USING ALL ONES
  7678					;TEST MQ SHIFT LOGIC GATES
  7679					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND
  7680					;AC+1 IS TESTED
  7681					;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
  7682
  7683	034642	477 10 0 00 000011 	E4500:	SETOB	AC,AC+1		;INITIALIZE AC,AC+1 TO ALL ONES
  7684	034643	476 00 0 00 000007 		SETOM	AC-1		;INITIALIZE RESULT TO ALL ONES
  7685	034644	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7686	034645	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ONES
  7687	034646	004 11 0 00 004501 		ER4	AC+1,4501	;MQ GATING FAILED
  7688	034647	321 12 0 00 034642 		JUMPL	AC+2,E4500	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0170

  7689			004600		SN=4600
  7690			000000			ZZ=0
  7691
  7692							;TEST AC+1 RIGHT HALF <
  7693					E4600:	REPEAT	^D18,<;TEST ROTC LEFT ONE BIT POSITION
  7694					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7695					;TEST MQ SHIFT LOGIC GATES
  7696					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7697					;IS TESTED.
  7698					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7699					;OTHER BIT IS A ONE AFTER ROTATING
  7700					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7701
  7702					SN=SN+1
  7703						ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7704						IFE	ZZ,<ZZ=1>
  7705						YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7706						SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7707						MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7708						IFN	<ZZ-400000>,<
  7709						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7710						IFE	<ZZ-400000>,<
  7711						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7712						ROTC	AC,1		;*ROTATE LEFT ONE
  7713						CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7714						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7715						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7716					>
  7717					;TEST ROTC LEFT ONE BIT POSITION
  7718					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7719					;TEST MQ SHIFT LOGIC GATES
  7720					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7721					;IS TESTED.
  7722					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7723					;OTHER BIT IS A ONE AFTER ROTATING
  7724					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7725
  7726			004601		SN=SN+1
  7727			000000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7728			000001			IFE	ZZ,<ZZ=1>
  7729			000002			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7730	034650	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7731	034651	201 11 0 00 000001 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7732						IFN	<ZZ-400000>,<
  7733	034652	201 07 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7734						IFE	<ZZ-400000>,<
  7735						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7736	034653	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7737	034654	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7738	034655	004 11 0 00 004601 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7739	034656	321 12 0 00 034650 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7740
  7741					;TEST ROTC LEFT ONE BIT POSITION
  7742					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7743					;TEST MQ SHIFT LOGIC GATES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0171

  7744					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7745					;IS TESTED.
  7746					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7747					;OTHER BIT IS A ONE AFTER ROTATING
  7748					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7749
  7750			004602		SN=SN+1
  7751			000002			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7752						IFE	ZZ,<ZZ=1>
  7753			000004			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7754	034657	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7755	034660	201 11 0 00 000002 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7756						IFN	<ZZ-400000>,<
  7757	034661	201 07 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7758						IFE	<ZZ-400000>,<
  7759						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7760	034662	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7761	034663	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7762	034664	004 11 0 00 004602 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7763	034665	321 12 0 00 034657 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7764
  7765					;TEST ROTC LEFT ONE BIT POSITION
  7766					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7767					;TEST MQ SHIFT LOGIC GATES
  7768					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7769					;IS TESTED.
  7770					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7771					;OTHER BIT IS A ONE AFTER ROTATING
  7772					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7773
  7774			004603		SN=SN+1
  7775			000004			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7776						IFE	ZZ,<ZZ=1>
  7777			000010			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7778	034666	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7779	034667	201 11 0 00 000004 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7780						IFN	<ZZ-400000>,<
  7781	034670	201 07 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7782						IFE	<ZZ-400000>,<
  7783						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7784	034671	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7785	034672	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7786	034673	004 11 0 00 004603 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7787	034674	321 12 0 00 034666 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7788
  7789					;TEST ROTC LEFT ONE BIT POSITION
  7790					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7791					;TEST MQ SHIFT LOGIC GATES
  7792					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7793					;IS TESTED.
  7794					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7795					;OTHER BIT IS A ONE AFTER ROTATING
  7796					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7797
  7798			004604		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0172

  7799			000010			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7800						IFE	ZZ,<ZZ=1>
  7801			000020			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7802	034675	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7803	034676	201 11 0 00 000010 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7804						IFN	<ZZ-400000>,<
  7805	034677	201 07 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7806						IFE	<ZZ-400000>,<
  7807						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7808	034700	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7809	034701	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7810	034702	004 11 0 00 004604 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7811	034703	321 12 0 00 034675 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7812
  7813					;TEST ROTC LEFT ONE BIT POSITION
  7814					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7815					;TEST MQ SHIFT LOGIC GATES
  7816					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7817					;IS TESTED.
  7818					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7819					;OTHER BIT IS A ONE AFTER ROTATING
  7820					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7821
  7822			004605		SN=SN+1
  7823			000020			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7824						IFE	ZZ,<ZZ=1>
  7825			000040			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7826	034704	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7827	034705	201 11 0 00 000020 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7828						IFN	<ZZ-400000>,<
  7829	034706	201 07 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7830						IFE	<ZZ-400000>,<
  7831						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7832	034707	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7833	034710	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7834	034711	004 11 0 00 004605 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7835	034712	321 12 0 00 034704 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7836
  7837					;TEST ROTC LEFT ONE BIT POSITION
  7838					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7839					;TEST MQ SHIFT LOGIC GATES
  7840					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7841					;IS TESTED.
  7842					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7843					;OTHER BIT IS A ONE AFTER ROTATING
  7844					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7845
  7846			004606		SN=SN+1
  7847			000040			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7848						IFE	ZZ,<ZZ=1>
  7849			000100			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7850	034713	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7851	034714	201 11 0 00 000040 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7852						IFN	<ZZ-400000>,<
  7853	034715	201 07 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0173

  7854						IFE	<ZZ-400000>,<
  7855						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7856	034716	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7857	034717	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7858	034720	004 11 0 00 004606 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7859	034721	321 12 0 00 034713 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7860
  7861					;TEST ROTC LEFT ONE BIT POSITION
  7862					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7863					;TEST MQ SHIFT LOGIC GATES
  7864					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7865					;IS TESTED.
  7866					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7867					;OTHER BIT IS A ONE AFTER ROTATING
  7868					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7869
  7870			004607		SN=SN+1
  7871			000100			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7872						IFE	ZZ,<ZZ=1>
  7873			000200			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7874	034722	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7875	034723	201 11 0 00 000100 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7876						IFN	<ZZ-400000>,<
  7877	034724	201 07 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7878						IFE	<ZZ-400000>,<
  7879						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7880	034725	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7881	034726	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7882	034727	004 11 0 00 004607 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7883	034730	321 12 0 00 034722 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7884
  7885					;TEST ROTC LEFT ONE BIT POSITION
  7886					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7887					;TEST MQ SHIFT LOGIC GATES
  7888					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7889					;IS TESTED.
  7890					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7891					;OTHER BIT IS A ONE AFTER ROTATING
  7892					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7893
  7894			004610		SN=SN+1
  7895			000200			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7896						IFE	ZZ,<ZZ=1>
  7897			000400			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7898	034731	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7899	034732	201 11 0 00 000200 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7900						IFN	<ZZ-400000>,<
  7901	034733	201 07 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7902						IFE	<ZZ-400000>,<
  7903						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7904	034734	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7905	034735	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7906	034736	004 11 0 00 004610 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7907	034737	321 12 0 00 034731 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7908
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0174

  7909					;TEST ROTC LEFT ONE BIT POSITION
  7910					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7911					;TEST MQ SHIFT LOGIC GATES
  7912					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7913					;IS TESTED.
  7914					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7915					;OTHER BIT IS A ONE AFTER ROTATING
  7916					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7917
  7918			004611		SN=SN+1
  7919			000400			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7920						IFE	ZZ,<ZZ=1>
  7921			001000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7922	034740	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7923	034741	201 11 0 00 000400 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7924						IFN	<ZZ-400000>,<
  7925	034742	201 07 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7926						IFE	<ZZ-400000>,<
  7927						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7928	034743	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7929	034744	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7930	034745	004 11 0 00 004611 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7931	034746	321 12 0 00 034740 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7932
  7933					;TEST ROTC LEFT ONE BIT POSITION
  7934					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7935					;TEST MQ SHIFT LOGIC GATES
  7936					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7937					;IS TESTED.
  7938					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7939					;OTHER BIT IS A ONE AFTER ROTATING
  7940					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7941
  7942			004612		SN=SN+1
  7943			001000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7944						IFE	ZZ,<ZZ=1>
  7945			002000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7946	034747	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7947	034750	201 11 0 00 001000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7948						IFN	<ZZ-400000>,<
  7949	034751	201 07 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7950						IFE	<ZZ-400000>,<
  7951						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7952	034752	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7953	034753	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7954	034754	004 11 0 00 004612 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7955	034755	321 12 0 00 034747 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7956
  7957					;TEST ROTC LEFT ONE BIT POSITION
  7958					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7959					;TEST MQ SHIFT LOGIC GATES
  7960					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7961					;IS TESTED.
  7962					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7963					;OTHER BIT IS A ONE AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0175

  7964					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7965
  7966			004613		SN=SN+1
  7967			002000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7968						IFE	ZZ,<ZZ=1>
  7969			004000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7970	034756	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7971	034757	201 11 0 00 002000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7972						IFN	<ZZ-400000>,<
  7973	034760	201 07 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7974						IFE	<ZZ-400000>,<
  7975						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  7976	034761	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  7977	034762	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  7978	034763	004 11 0 00 004613 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  7979	034764	321 12 0 00 034756 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  7980
  7981					;TEST ROTC LEFT ONE BIT POSITION
  7982					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  7983					;TEST MQ SHIFT LOGIC GATES
  7984					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  7985					;IS TESTED.
  7986					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  7987					;OTHER BIT IS A ONE AFTER ROTATING
  7988					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  7989
  7990			004614		SN=SN+1
  7991			004000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  7992						IFE	ZZ,<ZZ=1>
  7993			010000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  7994	034765	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  7995	034766	201 11 0 00 004000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  7996						IFN	<ZZ-400000>,<
  7997	034767	201 07 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  7998						IFE	<ZZ-400000>,<
  7999						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8000	034770	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8001	034771	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8002	034772	004 11 0 00 004614 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8003	034773	321 12 0 00 034765 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8004
  8005					;TEST ROTC LEFT ONE BIT POSITION
  8006					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8007					;TEST MQ SHIFT LOGIC GATES
  8008					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8009					;IS TESTED.
  8010					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8011					;OTHER BIT IS A ONE AFTER ROTATING
  8012					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8013
  8014			004615		SN=SN+1
  8015			010000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8016						IFE	ZZ,<ZZ=1>
  8017			020000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8018	034774	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0176

  8019	034775	201 11 0 00 010000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8020						IFN	<ZZ-400000>,<
  8021	034776	201 07 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8022						IFE	<ZZ-400000>,<
  8023						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8024	034777	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8025	035000	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8026	035001	004 11 0 00 004615 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8027	035002	321 12 0 00 034774 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8028
  8029					;TEST ROTC LEFT ONE BIT POSITION
  8030					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8031					;TEST MQ SHIFT LOGIC GATES
  8032					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8033					;IS TESTED.
  8034					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8035					;OTHER BIT IS A ONE AFTER ROTATING
  8036					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8037
  8038			004616		SN=SN+1
  8039			020000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8040						IFE	ZZ,<ZZ=1>
  8041			040000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8042	035003	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  8043	035004	201 11 0 00 020000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8044						IFN	<ZZ-400000>,<
  8045	035005	201 07 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8046						IFE	<ZZ-400000>,<
  8047						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8048	035006	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8049	035007	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8050	035010	004 11 0 00 004616 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8051	035011	321 12 0 00 035003 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8052
  8053					;TEST ROTC LEFT ONE BIT POSITION
  8054					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8055					;TEST MQ SHIFT LOGIC GATES
  8056					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8057					;IS TESTED.
  8058					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8059					;OTHER BIT IS A ONE AFTER ROTATING
  8060					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8061
  8062			004617		SN=SN+1
  8063			040000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8064						IFE	ZZ,<ZZ=1>
  8065			100000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8066	035012	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  8067	035013	201 11 0 00 040000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8068						IFN	<ZZ-400000>,<
  8069	035014	201 07 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8070						IFE	<ZZ-400000>,<
  8071						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8072	035015	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8073	035016	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0177

  8074	035017	004 11 0 00 004617 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8075	035020	321 12 0 00 035012 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8076
  8077					;TEST ROTC LEFT ONE BIT POSITION
  8078					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8079					;TEST MQ SHIFT LOGIC GATES
  8080					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8081					;IS TESTED.
  8082					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8083					;OTHER BIT IS A ONE AFTER ROTATING
  8084					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8085
  8086			004620		SN=SN+1
  8087			100000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8088						IFE	ZZ,<ZZ=1>
  8089			200000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8090	035021	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  8091	035022	201 11 0 00 100000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8092						IFN	<ZZ-400000>,<
  8093	035023	201 07 0 00 200000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8094						IFE	<ZZ-400000>,<
  8095						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8096	035024	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8097	035025	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8098	035026	004 11 0 00 004620 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8099	035027	321 12 0 00 035021 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8100
  8101					;TEST ROTC LEFT ONE BIT POSITION
  8102					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8103					;TEST MQ SHIFT LOGIC GATES
  8104					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8105					;IS TESTED.
  8106					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8107					;OTHER BIT IS A ONE AFTER ROTATING
  8108					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8109
  8110			004621		SN=SN+1
  8111			200000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8112						IFE	ZZ,<ZZ=1>
  8113			400000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8114	035030	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  8115	035031	201 11 0 00 200000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8116						IFN	<ZZ-400000>,<
  8117	035032	201 07 0 00 400000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8118						IFE	<ZZ-400000>,<
  8119						MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8120	035033	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8121	035034	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8122	035035	004 11 0 00 004621 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8123	035036	321 12 0 00 035030 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8124
  8125					;TEST ROTC LEFT ONE BIT POSITION
  8126					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8127					;TEST MQ SHIFT LOGIC GATES
  8128					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0178

  8129					;IS TESTED.
  8130					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8131					;OTHER BIT IS A ONE AFTER ROTATING
  8132					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8133
  8134			004622		SN=SN+1
  8135			400000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8136						IFE	ZZ,<ZZ=1>
  8137		000001	000000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8138	035037	400 10 0 00 000000 		SETZ	AC,		;INITILAIZE AC TO ALL ZEROS
  8139	035040	201 11 0 00 400000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  8140						IFN	<ZZ-400000>,<
  8141						MOVEI	AC-1,YY		;SETUP FOR COMPARISON>
  8142						IFE	<ZZ-400000>,<
  8143	035041	205 07 0 00 000001 		MOVSI	AC-1,1		;SETUP FOR COMPARISON>
  8144	035042	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8145	035043	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8146	035044	004 11 0 00 004622 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8147	035045	321 12 0 00 035037 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8148
  8149
  8150			000000			ZZ=0
  8151
  8152							;TEST AC+1 LEFT HALF <
  8153						REPEAT	^D17,<;TEST ROTC LEFT ONE BIT POSITION
  8154					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8155					;TEST MQ SHIFT LOGIC GATES
  8156					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8157					;IS TESTED.
  8158					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8159					;OTHER BIT IS A ONE AFTER ROTATING
  8160					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8161
  8162					SN=SN+1
  8163						ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8164						IFE	ZZ,<ZZ=1>
  8165						YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8166						SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8167						MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8168						MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8169						ROTC	AC,1		;*ROTATE LEFT ONE
  8170						CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8171						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8172						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8173					>
  8174					;TEST ROTC LEFT ONE BIT POSITION
  8175					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8176					;TEST MQ SHIFT LOGIC GATES
  8177					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8178					;IS TESTED.
  8179					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8180					;OTHER BIT IS A ONE AFTER ROTATING
  8181					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8182
  8183			004623		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0179

  8184			000000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8185			000001			IFE	ZZ,<ZZ=1>
  8186			000002			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8187	035046	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8188	035047	205 11 0 00 000001 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8189	035050	205 07 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8190	035051	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8191	035052	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8192	035053	004 11 0 00 004623 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8193	035054	321 12 0 00 035046 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8194
  8195					;TEST ROTC LEFT ONE BIT POSITION
  8196					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8197					;TEST MQ SHIFT LOGIC GATES
  8198					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8199					;IS TESTED.
  8200					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8201					;OTHER BIT IS A ONE AFTER ROTATING
  8202					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8203
  8204			004624		SN=SN+1
  8205			000002			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8206						IFE	ZZ,<ZZ=1>
  8207			000004			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8208	035055	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8209	035056	205 11 0 00 000002 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8210	035057	205 07 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8211	035060	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8212	035061	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8213	035062	004 11 0 00 004624 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8214	035063	321 12 0 00 035055 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8215
  8216					;TEST ROTC LEFT ONE BIT POSITION
  8217					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8218					;TEST MQ SHIFT LOGIC GATES
  8219					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8220					;IS TESTED.
  8221					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8222					;OTHER BIT IS A ONE AFTER ROTATING
  8223					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8224
  8225			004625		SN=SN+1
  8226			000004			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8227						IFE	ZZ,<ZZ=1>
  8228			000010			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8229	035064	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8230	035065	205 11 0 00 000004 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8231	035066	205 07 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8232	035067	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8233	035070	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8234	035071	004 11 0 00 004625 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8235	035072	321 12 0 00 035064 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8236
  8237					;TEST ROTC LEFT ONE BIT POSITION
  8238					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0180

  8239					;TEST MQ SHIFT LOGIC GATES
  8240					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8241					;IS TESTED.
  8242					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8243					;OTHER BIT IS A ONE AFTER ROTATING
  8244					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8245
  8246			004626		SN=SN+1
  8247			000010			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8248						IFE	ZZ,<ZZ=1>
  8249			000020			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8250	035073	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8251	035074	205 11 0 00 000010 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8252	035075	205 07 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8253	035076	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8254	035077	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8255	035100	004 11 0 00 004626 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8256	035101	321 12 0 00 035073 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8257
  8258					;TEST ROTC LEFT ONE BIT POSITION
  8259					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8260					;TEST MQ SHIFT LOGIC GATES
  8261					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8262					;IS TESTED.
  8263					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8264					;OTHER BIT IS A ONE AFTER ROTATING
  8265					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8266
  8267			004627		SN=SN+1
  8268			000020			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8269						IFE	ZZ,<ZZ=1>
  8270			000040			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8271	035102	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8272	035103	205 11 0 00 000020 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8273	035104	205 07 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8274	035105	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8275	035106	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8276	035107	004 11 0 00 004627 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8277	035110	321 12 0 00 035102 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8278
  8279					;TEST ROTC LEFT ONE BIT POSITION
  8280					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8281					;TEST MQ SHIFT LOGIC GATES
  8282					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8283					;IS TESTED.
  8284					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8285					;OTHER BIT IS A ONE AFTER ROTATING
  8286					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8287
  8288			004630		SN=SN+1
  8289			000040			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8290						IFE	ZZ,<ZZ=1>
  8291			000100			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8292	035111	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8293	035112	205 11 0 00 000040 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0181

  8294	035113	205 07 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8295	035114	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8296	035115	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8297	035116	004 11 0 00 004630 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8298	035117	321 12 0 00 035111 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8299
  8300					;TEST ROTC LEFT ONE BIT POSITION
  8301					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8302					;TEST MQ SHIFT LOGIC GATES
  8303					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8304					;IS TESTED.
  8305					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8306					;OTHER BIT IS A ONE AFTER ROTATING
  8307					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8308
  8309			004631		SN=SN+1
  8310			000100			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8311						IFE	ZZ,<ZZ=1>
  8312			000200			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8313	035120	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8314	035121	205 11 0 00 000100 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8315	035122	205 07 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8316	035123	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8317	035124	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8318	035125	004 11 0 00 004631 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8319	035126	321 12 0 00 035120 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8320
  8321					;TEST ROTC LEFT ONE BIT POSITION
  8322					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8323					;TEST MQ SHIFT LOGIC GATES
  8324					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8325					;IS TESTED.
  8326					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8327					;OTHER BIT IS A ONE AFTER ROTATING
  8328					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8329
  8330			004632		SN=SN+1
  8331			000200			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8332						IFE	ZZ,<ZZ=1>
  8333			000400			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8334	035127	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8335	035130	205 11 0 00 000200 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8336	035131	205 07 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8337	035132	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8338	035133	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8339	035134	004 11 0 00 004632 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8340	035135	321 12 0 00 035127 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8341
  8342					;TEST ROTC LEFT ONE BIT POSITION
  8343					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8344					;TEST MQ SHIFT LOGIC GATES
  8345					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8346					;IS TESTED.
  8347					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8348					;OTHER BIT IS A ONE AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0182

  8349					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8350
  8351			004633		SN=SN+1
  8352			000400			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8353						IFE	ZZ,<ZZ=1>
  8354			001000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8355	035136	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8356	035137	205 11 0 00 000400 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8357	035140	205 07 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8358	035141	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8359	035142	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8360	035143	004 11 0 00 004633 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8361	035144	321 12 0 00 035136 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8362
  8363					;TEST ROTC LEFT ONE BIT POSITION
  8364					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8365					;TEST MQ SHIFT LOGIC GATES
  8366					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8367					;IS TESTED.
  8368					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8369					;OTHER BIT IS A ONE AFTER ROTATING
  8370					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8371
  8372			004634		SN=SN+1
  8373			001000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8374						IFE	ZZ,<ZZ=1>
  8375			002000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8376	035145	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8377	035146	205 11 0 00 001000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8378	035147	205 07 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8379	035150	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8380	035151	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8381	035152	004 11 0 00 004634 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8382	035153	321 12 0 00 035145 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8383
  8384					;TEST ROTC LEFT ONE BIT POSITION
  8385					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8386					;TEST MQ SHIFT LOGIC GATES
  8387					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8388					;IS TESTED.
  8389					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8390					;OTHER BIT IS A ONE AFTER ROTATING
  8391					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8392
  8393			004635		SN=SN+1
  8394			002000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8395						IFE	ZZ,<ZZ=1>
  8396			004000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8397	035154	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8398	035155	205 11 0 00 002000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8399	035156	205 07 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8400	035157	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8401	035160	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8402	035161	004 11 0 00 004635 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8403	035162	321 12 0 00 035154 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0183

  8404
  8405					;TEST ROTC LEFT ONE BIT POSITION
  8406					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8407					;TEST MQ SHIFT LOGIC GATES
  8408					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8409					;IS TESTED.
  8410					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8411					;OTHER BIT IS A ONE AFTER ROTATING
  8412					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8413
  8414			004636		SN=SN+1
  8415			004000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8416						IFE	ZZ,<ZZ=1>
  8417			010000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8418	035163	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8419	035164	205 11 0 00 004000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8420	035165	205 07 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8421	035166	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8422	035167	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8423	035170	004 11 0 00 004636 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8424	035171	321 12 0 00 035163 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8425
  8426					;TEST ROTC LEFT ONE BIT POSITION
  8427					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8428					;TEST MQ SHIFT LOGIC GATES
  8429					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8430					;IS TESTED.
  8431					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8432					;OTHER BIT IS A ONE AFTER ROTATING
  8433					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8434
  8435			004637		SN=SN+1
  8436			010000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8437						IFE	ZZ,<ZZ=1>
  8438			020000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8439	035172	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8440	035173	205 11 0 00 010000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8441	035174	205 07 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8442	035175	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8443	035176	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8444	035177	004 11 0 00 004637 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8445	035200	321 12 0 00 035172 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8446
  8447					;TEST ROTC LEFT ONE BIT POSITION
  8448					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8449					;TEST MQ SHIFT LOGIC GATES
  8450					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8451					;IS TESTED.
  8452					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8453					;OTHER BIT IS A ONE AFTER ROTATING
  8454					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8455
  8456			004640		SN=SN+1
  8457			020000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8458						IFE	ZZ,<ZZ=1>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0184

  8459			040000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8460	035201	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8461	035202	205 11 0 00 020000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8462	035203	205 07 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8463	035204	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8464	035205	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8465	035206	004 11 0 00 004640 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8466	035207	321 12 0 00 035201 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8467
  8468					;TEST ROTC LEFT ONE BIT POSITION
  8469					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8470					;TEST MQ SHIFT LOGIC GATES
  8471					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8472					;IS TESTED.
  8473					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8474					;OTHER BIT IS A ONE AFTER ROTATING
  8475					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8476
  8477			004641		SN=SN+1
  8478			040000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8479						IFE	ZZ,<ZZ=1>
  8480			100000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8481	035210	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8482	035211	205 11 0 00 040000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8483	035212	205 07 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8484	035213	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8485	035214	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8486	035215	004 11 0 00 004641 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8487	035216	321 12 0 00 035210 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8488
  8489					;TEST ROTC LEFT ONE BIT POSITION
  8490					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8491					;TEST MQ SHIFT LOGIC GATES
  8492					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8493					;IS TESTED.
  8494					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8495					;OTHER BIT IS A ONE AFTER ROTATING
  8496					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8497
  8498			004642		SN=SN+1
  8499			100000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8500						IFE	ZZ,<ZZ=1>
  8501			200000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8502	035217	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8503	035220	205 11 0 00 100000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8504	035221	205 07 0 00 200000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8505	035222	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8506	035223	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8507	035224	004 11 0 00 004642 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8508	035225	321 12 0 00 035217 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8509
  8510					;TEST ROTC LEFT ONE BIT POSITION
  8511					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  8512					;TEST MQ SHIFT LOGIC GATES
  8513					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 20-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0185

  8514					;IS TESTED.
  8515					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  8516					;OTHER BIT IS A ONE AFTER ROTATING
  8517					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  8518
  8519			004643		SN=SN+1
  8520			200000			ZZ=ZZ+ZZ		;SELECTED BIT BEFORE ROTATION
  8521						IFE	ZZ,<ZZ=1>
  8522			400000			YY=ZZ+ZZ		;SELECTED BIT AFTER ROTATION
  8523	035226	400 10 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  8524	035227	205 11 0 00 200000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  8525	035230	205 07 0 00 400000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON
  8526	035231	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8527	035232	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ONE
  8528	035233	004 11 0 00 004643 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8529	035234	321 12 0 00 035226 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8530
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0186

  8531			004700		SN=4700
  8532			000000			ZZ=0
  8533							;TEST AC+1 RIGHT HALF <
  8534					E4700:	REPEAT	^D18,<;TEST ROTC LEFT ONE BIT POSITION
  8535					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8536					;TEST MQ SHIFT LOGIC GATES
  8537					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8538					;IS TESTED.
  8539					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8540					;OTHER BIT IA A ZERO AFTER ROTATING
  8541					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8542
  8543					SN=SN+1
  8544						ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8545						IFE	<ZZ-1>,<ZZ=-2>
  8546						YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8547						SETOM	AC		;INITIALIZE AC TO ALL ONES
  8548						HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8549						IFN	<ZZ-377777>&777777,<
  8550						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8551						IFE	<ZZ-377777>&777777,<
  8552						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8553						ROTC	AC,1		;*ROTATE LEFT ONE
  8554						CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8555						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8556						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8557					>
  8558					;TEST ROTC LEFT ONE BIT POSITION
  8559					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8560					;TEST MQ SHIFT LOGIC GATES
  8561					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8562					;IS TESTED.
  8563					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8564					;OTHER BIT IA A ZERO AFTER ROTATING
  8565					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8566
  8567			004701		SN=SN+1
  8568			000001			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8569		777777	777776			IFE	<ZZ-1>,<ZZ=-2>
  8570			777775			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8571	035235	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8572	035236	561 11 0 00 777776 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8573						IFN	<ZZ-377777>&777777,<
  8574	035237	561 07 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8575						IFE	<ZZ-377777>&777777,<
  8576						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8577	035240	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8578	035241	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8579	035242	004 11 0 00 004701 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8580	035243	321 12 0 00 035235 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8581
  8582					;TEST ROTC LEFT ONE BIT POSITION
  8583					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8584					;TEST MQ SHIFT LOGIC GATES
  8585					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0187

  8586					;IS TESTED.
  8587					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8588					;OTHER BIT IA A ZERO AFTER ROTATING
  8589					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8590
  8591			004702		SN=SN+1
  8592		777777	777775			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8593						IFE	<ZZ-1>,<ZZ=-2>
  8594			777773			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8595	035244	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8596	035245	561 11 0 00 777775 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8597						IFN	<ZZ-377777>&777777,<
  8598	035246	561 07 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8599						IFE	<ZZ-377777>&777777,<
  8600						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8601	035247	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8602	035250	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8603	035251	004 11 0 00 004702 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8604	035252	321 12 0 00 035244 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8605
  8606					;TEST ROTC LEFT ONE BIT POSITION
  8607					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8608					;TEST MQ SHIFT LOGIC GATES
  8609					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8610					;IS TESTED.
  8611					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8612					;OTHER BIT IA A ZERO AFTER ROTATING
  8613					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8614
  8615			004703		SN=SN+1
  8616		777777	777773			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8617						IFE	<ZZ-1>,<ZZ=-2>
  8618			777767			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8619	035253	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8620	035254	561 11 0 00 777773 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8621						IFN	<ZZ-377777>&777777,<
  8622	035255	561 07 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8623						IFE	<ZZ-377777>&777777,<
  8624						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8625	035256	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8626	035257	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8627	035260	004 11 0 00 004703 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8628	035261	321 12 0 00 035253 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8629
  8630					;TEST ROTC LEFT ONE BIT POSITION
  8631					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8632					;TEST MQ SHIFT LOGIC GATES
  8633					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8634					;IS TESTED.
  8635					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8636					;OTHER BIT IA A ZERO AFTER ROTATING
  8637					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8638
  8639			004704		SN=SN+1
  8640		777777	777767			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0188

  8641						IFE	<ZZ-1>,<ZZ=-2>
  8642			777757			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8643	035262	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8644	035263	561 11 0 00 777767 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8645						IFN	<ZZ-377777>&777777,<
  8646	035264	561 07 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8647						IFE	<ZZ-377777>&777777,<
  8648						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8649	035265	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8650	035266	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8651	035267	004 11 0 00 004704 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8652	035270	321 12 0 00 035262 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8653
  8654					;TEST ROTC LEFT ONE BIT POSITION
  8655					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8656					;TEST MQ SHIFT LOGIC GATES
  8657					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8658					;IS TESTED.
  8659					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8660					;OTHER BIT IA A ZERO AFTER ROTATING
  8661					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8662
  8663			004705		SN=SN+1
  8664		777777	777757			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8665						IFE	<ZZ-1>,<ZZ=-2>
  8666			777737			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8667	035271	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8668	035272	561 11 0 00 777757 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8669						IFN	<ZZ-377777>&777777,<
  8670	035273	561 07 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8671						IFE	<ZZ-377777>&777777,<
  8672						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8673	035274	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8674	035275	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8675	035276	004 11 0 00 004705 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8676	035277	321 12 0 00 035271 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8677
  8678					;TEST ROTC LEFT ONE BIT POSITION
  8679					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8680					;TEST MQ SHIFT LOGIC GATES
  8681					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8682					;IS TESTED.
  8683					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8684					;OTHER BIT IA A ZERO AFTER ROTATING
  8685					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8686
  8687			004706		SN=SN+1
  8688		777777	777737			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8689						IFE	<ZZ-1>,<ZZ=-2>
  8690			777677			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8691	035300	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8692	035301	561 11 0 00 777737 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8693						IFN	<ZZ-377777>&777777,<
  8694	035302	561 07 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8695						IFE	<ZZ-377777>&777777,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0189

  8696						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8697	035303	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8698	035304	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8699	035305	004 11 0 00 004706 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8700	035306	321 12 0 00 035300 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8701
  8702					;TEST ROTC LEFT ONE BIT POSITION
  8703					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8704					;TEST MQ SHIFT LOGIC GATES
  8705					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8706					;IS TESTED.
  8707					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8708					;OTHER BIT IA A ZERO AFTER ROTATING
  8709					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8710
  8711			004707		SN=SN+1
  8712		777777	777677			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8713						IFE	<ZZ-1>,<ZZ=-2>
  8714			777577			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8715	035307	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8716	035310	561 11 0 00 777677 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8717						IFN	<ZZ-377777>&777777,<
  8718	035311	561 07 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8719						IFE	<ZZ-377777>&777777,<
  8720						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8721	035312	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8722	035313	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8723	035314	004 11 0 00 004707 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8724	035315	321 12 0 00 035307 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8725
  8726					;TEST ROTC LEFT ONE BIT POSITION
  8727					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8728					;TEST MQ SHIFT LOGIC GATES
  8729					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8730					;IS TESTED.
  8731					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8732					;OTHER BIT IA A ZERO AFTER ROTATING
  8733					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8734
  8735			004710		SN=SN+1
  8736		777777	777577			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8737						IFE	<ZZ-1>,<ZZ=-2>
  8738			777377			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8739	035316	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8740	035317	561 11 0 00 777577 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8741						IFN	<ZZ-377777>&777777,<
  8742	035320	561 07 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8743						IFE	<ZZ-377777>&777777,<
  8744						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8745	035321	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8746	035322	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8747	035323	004 11 0 00 004710 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8748	035324	321 12 0 00 035316 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8749
  8750					;TEST ROTC LEFT ONE BIT POSITION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0190

  8751					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8752					;TEST MQ SHIFT LOGIC GATES
  8753					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8754					;IS TESTED.
  8755					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8756					;OTHER BIT IA A ZERO AFTER ROTATING
  8757					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8758
  8759			004711		SN=SN+1
  8760		777777	777377			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8761						IFE	<ZZ-1>,<ZZ=-2>
  8762			776777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8763	035325	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8764	035326	561 11 0 00 777377 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8765						IFN	<ZZ-377777>&777777,<
  8766	035327	561 07 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8767						IFE	<ZZ-377777>&777777,<
  8768						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8769	035330	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8770	035331	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8771	035332	004 11 0 00 004711 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8772	035333	321 12 0 00 035325 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8773
  8774					;TEST ROTC LEFT ONE BIT POSITION
  8775					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8776					;TEST MQ SHIFT LOGIC GATES
  8777					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8778					;IS TESTED.
  8779					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8780					;OTHER BIT IA A ZERO AFTER ROTATING
  8781					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8782
  8783			004712		SN=SN+1
  8784		777777	776777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8785						IFE	<ZZ-1>,<ZZ=-2>
  8786			775777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8787	035334	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8788	035335	561 11 0 00 776777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8789						IFN	<ZZ-377777>&777777,<
  8790	035336	561 07 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8791						IFE	<ZZ-377777>&777777,<
  8792						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8793	035337	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8794	035340	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8795	035341	004 11 0 00 004712 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8796	035342	321 12 0 00 035334 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8797
  8798					;TEST ROTC LEFT ONE BIT POSITION
  8799					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8800					;TEST MQ SHIFT LOGIC GATES
  8801					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8802					;IS TESTED.
  8803					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8804					;OTHER BIT IA A ZERO AFTER ROTATING
  8805					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0191

  8806
  8807			004713		SN=SN+1
  8808		777777	775777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8809						IFE	<ZZ-1>,<ZZ=-2>
  8810			773777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8811	035343	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8812	035344	561 11 0 00 775777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8813						IFN	<ZZ-377777>&777777,<
  8814	035345	561 07 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8815						IFE	<ZZ-377777>&777777,<
  8816						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8817	035346	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8818	035347	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8819	035350	004 11 0 00 004713 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8820	035351	321 12 0 00 035343 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8821
  8822					;TEST ROTC LEFT ONE BIT POSITION
  8823					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8824					;TEST MQ SHIFT LOGIC GATES
  8825					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8826					;IS TESTED.
  8827					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8828					;OTHER BIT IA A ZERO AFTER ROTATING
  8829					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8830
  8831			004714		SN=SN+1
  8832		777777	773777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8833						IFE	<ZZ-1>,<ZZ=-2>
  8834			767777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8835	035352	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8836	035353	561 11 0 00 773777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8837						IFN	<ZZ-377777>&777777,<
  8838	035354	561 07 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8839						IFE	<ZZ-377777>&777777,<
  8840						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8841	035355	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8842	035356	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8843	035357	004 11 0 00 004714 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8844	035360	321 12 0 00 035352 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8845
  8846					;TEST ROTC LEFT ONE BIT POSITION
  8847					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8848					;TEST MQ SHIFT LOGIC GATES
  8849					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8850					;IS TESTED.
  8851					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8852					;OTHER BIT IA A ZERO AFTER ROTATING
  8853					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8854
  8855			004715		SN=SN+1
  8856		777777	767777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8857						IFE	<ZZ-1>,<ZZ=-2>
  8858			757777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8859	035361	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8860	035362	561 11 0 00 767777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0192

  8861						IFN	<ZZ-377777>&777777,<
  8862	035363	561 07 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8863						IFE	<ZZ-377777>&777777,<
  8864						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8865	035364	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8866	035365	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8867	035366	004 11 0 00 004715 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8868	035367	321 12 0 00 035361 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8869
  8870					;TEST ROTC LEFT ONE BIT POSITION
  8871					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8872					;TEST MQ SHIFT LOGIC GATES
  8873					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8874					;IS TESTED.
  8875					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8876					;OTHER BIT IA A ZERO AFTER ROTATING
  8877					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8878
  8879			004716		SN=SN+1
  8880		777777	757777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8881						IFE	<ZZ-1>,<ZZ=-2>
  8882			737777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8883	035370	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8884	035371	561 11 0 00 757777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8885						IFN	<ZZ-377777>&777777,<
  8886	035372	561 07 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8887						IFE	<ZZ-377777>&777777,<
  8888						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8889	035373	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8890	035374	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8891	035375	004 11 0 00 004716 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8892	035376	321 12 0 00 035370 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8893
  8894					;TEST ROTC LEFT ONE BIT POSITION
  8895					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8896					;TEST MQ SHIFT LOGIC GATES
  8897					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8898					;IS TESTED.
  8899					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8900					;OTHER BIT IA A ZERO AFTER ROTATING
  8901					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8902
  8903			004717		SN=SN+1
  8904		777777	737777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8905						IFE	<ZZ-1>,<ZZ=-2>
  8906			677777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8907	035377	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8908	035400	561 11 0 00 737777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8909						IFN	<ZZ-377777>&777777,<
  8910	035401	561 07 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8911						IFE	<ZZ-377777>&777777,<
  8912						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8913	035402	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8914	035403	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8915	035404	004 11 0 00 004717 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0193

  8916	035405	321 12 0 00 035377 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8917
  8918					;TEST ROTC LEFT ONE BIT POSITION
  8919					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8920					;TEST MQ SHIFT LOGIC GATES
  8921					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8922					;IS TESTED.
  8923					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8924					;OTHER BIT IA A ZERO AFTER ROTATING
  8925					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8926
  8927			004720		SN=SN+1
  8928		777777	677777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8929						IFE	<ZZ-1>,<ZZ=-2>
  8930			577777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8931	035406	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8932	035407	561 11 0 00 677777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8933						IFN	<ZZ-377777>&777777,<
  8934	035410	561 07 0 00 577777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8935						IFE	<ZZ-377777>&777777,<
  8936						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8937	035411	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8938	035412	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8939	035413	004 11 0 00 004720 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8940	035414	321 12 0 00 035406 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8941
  8942					;TEST ROTC LEFT ONE BIT POSITION
  8943					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8944					;TEST MQ SHIFT LOGIC GATES
  8945					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8946					;IS TESTED.
  8947					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8948					;OTHER BIT IA A ZERO AFTER ROTATING
  8949					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8950
  8951			004721		SN=SN+1
  8952		777777	577777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8953						IFE	<ZZ-1>,<ZZ=-2>
  8954			377777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8955	035415	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8956	035416	561 11 0 00 577777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8957						IFN	<ZZ-377777>&777777,<
  8958	035417	561 07 0 00 377777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8959						IFE	<ZZ-377777>&777777,<
  8960						HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8961	035420	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8962	035421	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8963	035422	004 11 0 00 004721 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8964	035423	321 12 0 00 035415 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8965
  8966					;TEST ROTC LEFT ONE BIT POSITION
  8967					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8968					;TEST MQ SHIFT LOGIC GATES
  8969					;AC,AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8970					;IS TESTED.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0194

  8971					;AN ERROR OCCURS IF THE TESTED BIT IA A ONE AND/OR ANY
  8972					;OTHER BIT IA A ZERO AFTER ROTATING
  8973					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
  8974
  8975			004722		SN=SN+1
  8976		777777	377777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  8977						IFE	<ZZ-1>,<ZZ=-2>
  8978			777777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  8979	035424	476 00 0 00 000010 		SETOM	AC		;INITIALIZE AC TO ALL ONES
  8980	035425	561 11 0 00 377777 		HRROI	AC+1,ZZ		;CLEAR BIT (N) OF AC+1 RIGHT
  8981						IFN	<ZZ-377777>&777777,<
  8982						HRROI	AC-1,YY		;SETUP FOR COMPARISON>
  8983						IFE	<ZZ-377777>&777777,<
  8984	035426	525 07 0 00 777776 		HRLOI	AC-1,-2		;SETUP FOR COMPARISON>
  8985	035427	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  8986	035430	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  8987	035431	004 11 0 00 004722 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  8988	035432	321 12 0 00 035424 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  8989
  8990					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0195

  8991			000000			ZZ=0
  8992
  8993							;TEST AC+1 LEFT HALF <
  8994						REPEAT	^D17,<;TEST ROTC LEFT ONE BIT POSITION
  8995					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  8996					;TEST MQ SHIFT LOGIC GATES
  8997					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  8998					;IS TESTED.
  8999					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9000					;OTHER BIT IS A ZERO AFTER ROTATING
  9001					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9002					;OF THE MQ
  9003
  9004					SN=SN+1
  9005						ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9006						IFE	<ZZ-1>,<ZZ=-2>
  9007						YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9008						SETOM	AC		;INITAILIZE AC TO ALL ONES
  9009						HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9010						HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9011						ROTC	AC,1		;*ROTATE LEFT ONE
  9012						CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9013						ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9014						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9015					>
  9016					;TEST ROTC LEFT ONE BIT POSITION
  9017					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9018					;TEST MQ SHIFT LOGIC GATES
  9019					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9020					;IS TESTED.
  9021					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9022					;OTHER BIT IS A ZERO AFTER ROTATING
  9023					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9024					;OF THE MQ
  9025
  9026			004723		SN=SN+1
  9027			000001			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9028		777777	777776			IFE	<ZZ-1>,<ZZ=-2>
  9029			777775			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9030	035433	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9031	035434	525 11 0 00 777776 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9032	035435	525 07 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9033	035436	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9034	035437	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9035	035440	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9036	035441	321 12 0 00 035433 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9037
  9038					;TEST ROTC LEFT ONE BIT POSITION
  9039					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9040					;TEST MQ SHIFT LOGIC GATES
  9041					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9042					;IS TESTED.
  9043					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9044					;OTHER BIT IS A ZERO AFTER ROTATING
  9045					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0196

  9046					;OF THE MQ
  9047
  9048			004724		SN=SN+1
  9049		777777	777775			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9050						IFE	<ZZ-1>,<ZZ=-2>
  9051			777773			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9052	035442	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9053	035443	525 11 0 00 777775 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9054	035444	525 07 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9055	035445	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9056	035446	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9057	035447	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9058	035450	321 12 0 00 035442 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9059
  9060					;TEST ROTC LEFT ONE BIT POSITION
  9061					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9062					;TEST MQ SHIFT LOGIC GATES
  9063					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9064					;IS TESTED.
  9065					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9066					;OTHER BIT IS A ZERO AFTER ROTATING
  9067					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9068					;OF THE MQ
  9069
  9070			004725		SN=SN+1
  9071		777777	777773			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9072						IFE	<ZZ-1>,<ZZ=-2>
  9073			777767			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9074	035451	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9075	035452	525 11 0 00 777773 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9076	035453	525 07 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9077	035454	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9078	035455	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9079	035456	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9080	035457	321 12 0 00 035451 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9081
  9082					;TEST ROTC LEFT ONE BIT POSITION
  9083					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9084					;TEST MQ SHIFT LOGIC GATES
  9085					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9086					;IS TESTED.
  9087					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9088					;OTHER BIT IS A ZERO AFTER ROTATING
  9089					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9090					;OF THE MQ
  9091
  9092			004726		SN=SN+1
  9093		777777	777767			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9094						IFE	<ZZ-1>,<ZZ=-2>
  9095			777757			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9096	035460	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9097	035461	525 11 0 00 777767 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9098	035462	525 07 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9099	035463	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9100	035464	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0197

  9101	035465	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9102	035466	321 12 0 00 035460 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9103
  9104					;TEST ROTC LEFT ONE BIT POSITION
  9105					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9106					;TEST MQ SHIFT LOGIC GATES
  9107					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9108					;IS TESTED.
  9109					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9110					;OTHER BIT IS A ZERO AFTER ROTATING
  9111					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9112					;OF THE MQ
  9113
  9114			004727		SN=SN+1
  9115		777777	777757			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9116						IFE	<ZZ-1>,<ZZ=-2>
  9117			777737			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9118	035467	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9119	035470	525 11 0 00 777757 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9120	035471	525 07 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9121	035472	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9122	035473	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9123	035474	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9124	035475	321 12 0 00 035467 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9125
  9126					;TEST ROTC LEFT ONE BIT POSITION
  9127					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9128					;TEST MQ SHIFT LOGIC GATES
  9129					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9130					;IS TESTED.
  9131					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9132					;OTHER BIT IS A ZERO AFTER ROTATING
  9133					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9134					;OF THE MQ
  9135
  9136			004730		SN=SN+1
  9137		777777	777737			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9138						IFE	<ZZ-1>,<ZZ=-2>
  9139			777677			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9140	035476	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9141	035477	525 11 0 00 777737 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9142	035500	525 07 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9143	035501	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9144	035502	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9145	035503	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9146	035504	321 12 0 00 035476 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9147
  9148					;TEST ROTC LEFT ONE BIT POSITION
  9149					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9150					;TEST MQ SHIFT LOGIC GATES
  9151					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9152					;IS TESTED.
  9153					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9154					;OTHER BIT IS A ZERO AFTER ROTATING
  9155					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0198

  9156					;OF THE MQ
  9157
  9158			004731		SN=SN+1
  9159		777777	777677			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9160						IFE	<ZZ-1>,<ZZ=-2>
  9161			777577			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9162	035505	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9163	035506	525 11 0 00 777677 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9164	035507	525 07 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9165	035510	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9166	035511	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9167	035512	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9168	035513	321 12 0 00 035505 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9169
  9170					;TEST ROTC LEFT ONE BIT POSITION
  9171					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9172					;TEST MQ SHIFT LOGIC GATES
  9173					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9174					;IS TESTED.
  9175					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9176					;OTHER BIT IS A ZERO AFTER ROTATING
  9177					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9178					;OF THE MQ
  9179
  9180			004732		SN=SN+1
  9181		777777	777577			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9182						IFE	<ZZ-1>,<ZZ=-2>
  9183			777377			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9184	035514	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9185	035515	525 11 0 00 777577 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9186	035516	525 07 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9187	035517	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9188	035520	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9189	035521	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9190	035522	321 12 0 00 035514 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9191
  9192					;TEST ROTC LEFT ONE BIT POSITION
  9193					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9194					;TEST MQ SHIFT LOGIC GATES
  9195					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9196					;IS TESTED.
  9197					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9198					;OTHER BIT IS A ZERO AFTER ROTATING
  9199					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9200					;OF THE MQ
  9201
  9202			004733		SN=SN+1
  9203		777777	777377			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9204						IFE	<ZZ-1>,<ZZ=-2>
  9205			776777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9206	035523	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9207	035524	525 11 0 00 777377 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9208	035525	525 07 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9209	035526	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9210	035527	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0199

  9211	035530	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9212	035531	321 12 0 00 035523 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9213
  9214					;TEST ROTC LEFT ONE BIT POSITION
  9215					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9216					;TEST MQ SHIFT LOGIC GATES
  9217					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9218					;IS TESTED.
  9219					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9220					;OTHER BIT IS A ZERO AFTER ROTATING
  9221					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9222					;OF THE MQ
  9223
  9224			004734		SN=SN+1
  9225		777777	776777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9226						IFE	<ZZ-1>,<ZZ=-2>
  9227			775777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9228	035532	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9229	035533	525 11 0 00 776777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9230	035534	525 07 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9231	035535	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9232	035536	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9233	035537	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9234	035540	321 12 0 00 035532 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9235
  9236					;TEST ROTC LEFT ONE BIT POSITION
  9237					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9238					;TEST MQ SHIFT LOGIC GATES
  9239					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9240					;IS TESTED.
  9241					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9242					;OTHER BIT IS A ZERO AFTER ROTATING
  9243					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9244					;OF THE MQ
  9245
  9246			004735		SN=SN+1
  9247		777777	775777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9248						IFE	<ZZ-1>,<ZZ=-2>
  9249			773777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9250	035541	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9251	035542	525 11 0 00 775777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9252	035543	525 07 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9253	035544	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9254	035545	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9255	035546	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9256	035547	321 12 0 00 035541 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9257
  9258					;TEST ROTC LEFT ONE BIT POSITION
  9259					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9260					;TEST MQ SHIFT LOGIC GATES
  9261					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9262					;IS TESTED.
  9263					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9264					;OTHER BIT IS A ZERO AFTER ROTATING
  9265					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0200

  9266					;OF THE MQ
  9267
  9268			004736		SN=SN+1
  9269		777777	773777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9270						IFE	<ZZ-1>,<ZZ=-2>
  9271			767777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9272	035550	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9273	035551	525 11 0 00 773777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9274	035552	525 07 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9275	035553	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9276	035554	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9277	035555	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9278	035556	321 12 0 00 035550 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9279
  9280					;TEST ROTC LEFT ONE BIT POSITION
  9281					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9282					;TEST MQ SHIFT LOGIC GATES
  9283					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9284					;IS TESTED.
  9285					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9286					;OTHER BIT IS A ZERO AFTER ROTATING
  9287					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9288					;OF THE MQ
  9289
  9290			004737		SN=SN+1
  9291		777777	767777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9292						IFE	<ZZ-1>,<ZZ=-2>
  9293			757777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9294	035557	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9295	035560	525 11 0 00 767777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9296	035561	525 07 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9297	035562	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9298	035563	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9299	035564	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9300	035565	321 12 0 00 035557 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9301
  9302					;TEST ROTC LEFT ONE BIT POSITION
  9303					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9304					;TEST MQ SHIFT LOGIC GATES
  9305					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9306					;IS TESTED.
  9307					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9308					;OTHER BIT IS A ZERO AFTER ROTATING
  9309					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9310					;OF THE MQ
  9311
  9312			004740		SN=SN+1
  9313		777777	757777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9314						IFE	<ZZ-1>,<ZZ=-2>
  9315			737777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9316	035566	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9317	035567	525 11 0 00 757777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9318	035570	525 07 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9319	035571	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9320	035572	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0201

  9321	035573	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9322	035574	321 12 0 00 035566 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9323
  9324					;TEST ROTC LEFT ONE BIT POSITION
  9325					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9326					;TEST MQ SHIFT LOGIC GATES
  9327					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9328					;IS TESTED.
  9329					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9330					;OTHER BIT IS A ZERO AFTER ROTATING
  9331					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9332					;OF THE MQ
  9333
  9334			004741		SN=SN+1
  9335		777777	737777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9336						IFE	<ZZ-1>,<ZZ=-2>
  9337			677777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9338	035575	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9339	035576	525 11 0 00 737777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9340	035577	525 07 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9341	035600	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9342	035601	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9343	035602	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9344	035603	321 12 0 00 035575 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9345
  9346					;TEST ROTC LEFT ONE BIT POSITION
  9347					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9348					;TEST MQ SHIFT LOGIC GATES
  9349					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9350					;IS TESTED.
  9351					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9352					;OTHER BIT IS A ZERO AFTER ROTATING
  9353					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
  9354					;OF THE MQ
  9355
  9356			004742		SN=SN+1
  9357		777777	677777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9358						IFE	<ZZ-1>,<ZZ=-2>
  9359			577777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9360	035604	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9361	035605	525 11 0 00 677777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9362	035606	525 07 0 00 577777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9363	035607	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9364	035610	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9365	035611	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9366	035612	321 12 0 00 035604 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9367
  9368					;TEST ROTC LEFT ONE BIT POSITION
  9369					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
  9370					;TEST MQ SHIFT LOGIC GATES
  9371					;AC, AC+1 ARE ROTATED LEFT ONE BIT POSITION AND AC+1
  9372					;IS TESTED.
  9373					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
  9374					;OTHER BIT IS A ZERO AFTER ROTATING
  9375					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 21-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0202

  9376					;OF THE MQ
  9377
  9378			004743		SN=SN+1
  9379		777777	577777			ZZ=ZZ+ZZ+1		;SELECTED BIT BEFORE ROTATION
  9380						IFE	<ZZ-1>,<ZZ=-2>
  9381			377777			YY=<ZZ+ZZ+1>&777777	;SELECTED BIT AFTER ROTATION
  9382	035613	476 00 0 00 000010 		SETOM	AC		;INITAILIZE AC TO ALL ONES
  9383	035614	525 11 0 00 577777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
  9384	035615	525 07 0 00 377777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON
  9385	035616	245 10 0 00 000001 		ROTC	AC,1		;*ROTATE LEFT ONE
  9386	035617	312 11 0 00 000007 		CAME	AC+1,AC-1	;TEST FOR BIT (N-1) A ZERO
  9387	035620	004 11 0 00 000000 		ER4	AC+1,		;MQ GATE UNDER TEST FAILED
  9388	035621	321 12 0 00 035613 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9389
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 22
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0203

  9390					;TEST ROTC RIGHT ONE BIT POSITION USING ALL ZEROS
  9391					;TEST MQ SHIFT LOGIC GATES
  9392					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND
  9393					;AC+1 IS TESTED
  9394					;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
  9395
  9396			000007			AC=7
  9397						SAVEAC	(1,1)^
  9398	035622	201 11 0 00 035622 		MOVEI	AC+2,.		;SAVE TEST PC
  9399	035623	202 11 0 00 030051 		MOVEM	AC+2,TESTPC
  9400	035624	201 11 0 00 000011 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
  9401	035625	202 11 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
  9402
  9403	035626	403 07 0 00 000010 	E5000:	SETZB	AC,AC+1		;INITIALIZE AC,AC+1 TO ALL ZEROS
  9404	035627	402 00 0 00 000006 		SETZM	AC-1		;INITIALIZE RESULT TO ZERO
  9405	035630	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9406	035631	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ZEROS
  9407	035632	004 10 0 00 005001 		ER4	AC+1,5001	;MQ GRTING FAILED
  9408	035633	321 11 0 00 035626 		JUMPL	AC+2,E5000	;LOOP ON ERROR SWITCH
  9409
  9410					;TEST ROTC,RIGHT ONE BIT POSITION USING ALL ONES
  9411					;TEST MQ SHIFT LOGIC GATES
  9412					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND
  9413					;AC+1 IS TESTED
  9414					;AN ERROR OCCURS IF C(AC+1) IS NONZERO AFTER ROTATING
  9415
  9416	035634	477 07 0 00 000010 	E5100:	SETOB	AC,AC+1		;INITIALIZE AC,AC+1	TO ALL ONES
  9417	035635	476 00 0 00 000006 		SETOM	AC-1		;INITIALIZE RESULT TO ALL ONES
  9418	035636	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9419	035637	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ONES
  9420	035640	004 10 0 00 005101 		ER4	AC+1,5101	;MQ GATING FAILED
  9421	035641	321 11 0 00 035634 		JUMPL	AC+2,E5100	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0204

  9422			005200		SN=5200
  9423			000000			ZZ=0
  9424							;TEST AC+1 LEFT HALF<
  9425					E5200:	REPEAT	^D18,<;TEST ROTC RIGHT ONE BIT POSITION
  9426					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9427					;TEST MQ SHIFT LOGIC GATES
  9428
  9429					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9430					;IS TESTED.
  9431					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9432					;OTHER BIT IS A ONE AFTER ROTATING
  9433					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9434
  9435					SN=SN+1
  9436						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9437						IFE	ZZ,<ZZ=400000>
  9438						YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9439						SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9440						MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9441						IFN	<ZZ-1>,	<
  9442						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9443						IFE	<ZZ-1>,<
  9444						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9445						ROTC	AC,-1		;*ROTATE RIGHT ONE
  9446						CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9447						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9448						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9449					>
  9450					;TEST ROTC RIGHT ONE BIT POSITION
  9451					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9452					;TEST MQ SHIFT LOGIC GATES
  9453
  9454					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9455					;IS TESTED.
  9456					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9457					;OTHER BIT IS A ONE AFTER ROTATING
  9458					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9459
  9460			005201		SN=SN+1
  9461			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9462			400000			IFE	ZZ,<ZZ=400000>
  9463			200000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9464	035642	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9465	035643	205 10 0 00 400000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9466						IFN	<ZZ-1>,	<
  9467	035644	205 06 0 00 200000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9468						IFE	<ZZ-1>,<
  9469						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9470	035645	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9471	035646	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9472	035647	004 10 0 00 005201 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9473	035650	321 11 0 00 035642 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9474
  9475					;TEST ROTC RIGHT ONE BIT POSITION
  9476					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0205

  9477					;TEST MQ SHIFT LOGIC GATES
  9478
  9479					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9480					;IS TESTED.
  9481					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9482					;OTHER BIT IS A ONE AFTER ROTATING
  9483					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9484
  9485			005202		SN=SN+1
  9486			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9487						IFE	ZZ,<ZZ=400000>
  9488			100000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9489	035651	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9490	035652	205 10 0 00 200000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9491						IFN	<ZZ-1>,	<
  9492	035653	205 06 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9493						IFE	<ZZ-1>,<
  9494						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9495	035654	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9496	035655	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9497	035656	004 10 0 00 005202 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9498	035657	321 11 0 00 035651 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9499
  9500					;TEST ROTC RIGHT ONE BIT POSITION
  9501					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9502					;TEST MQ SHIFT LOGIC GATES
  9503
  9504					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9505					;IS TESTED.
  9506					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9507					;OTHER BIT IS A ONE AFTER ROTATING
  9508					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9509
  9510			005203		SN=SN+1
  9511			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9512						IFE	ZZ,<ZZ=400000>
  9513			040000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9514	035660	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9515	035661	205 10 0 00 100000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9516						IFN	<ZZ-1>,	<
  9517	035662	205 06 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9518						IFE	<ZZ-1>,<
  9519						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9520	035663	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9521	035664	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9522	035665	004 10 0 00 005203 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9523	035666	321 11 0 00 035660 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9524
  9525					;TEST ROTC RIGHT ONE BIT POSITION
  9526					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9527					;TEST MQ SHIFT LOGIC GATES
  9528
  9529					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9530					;IS TESTED.
  9531					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0206

  9532					;OTHER BIT IS A ONE AFTER ROTATING
  9533					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9534
  9535			005204		SN=SN+1
  9536			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9537						IFE	ZZ,<ZZ=400000>
  9538			020000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9539	035667	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9540	035670	205 10 0 00 040000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9541						IFN	<ZZ-1>,	<
  9542	035671	205 06 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9543						IFE	<ZZ-1>,<
  9544						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9545	035672	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9546	035673	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9547	035674	004 10 0 00 005204 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9548	035675	321 11 0 00 035667 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9549
  9550					;TEST ROTC RIGHT ONE BIT POSITION
  9551					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9552					;TEST MQ SHIFT LOGIC GATES
  9553
  9554					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9555					;IS TESTED.
  9556					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9557					;OTHER BIT IS A ONE AFTER ROTATING
  9558					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9559
  9560			005205		SN=SN+1
  9561			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9562						IFE	ZZ,<ZZ=400000>
  9563			010000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9564	035676	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9565	035677	205 10 0 00 020000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9566						IFN	<ZZ-1>,	<
  9567	035700	205 06 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9568						IFE	<ZZ-1>,<
  9569						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9570	035701	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9571	035702	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9572	035703	004 10 0 00 005205 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9573	035704	321 11 0 00 035676 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9574
  9575					;TEST ROTC RIGHT ONE BIT POSITION
  9576					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9577					;TEST MQ SHIFT LOGIC GATES
  9578
  9579					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9580					;IS TESTED.
  9581					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9582					;OTHER BIT IS A ONE AFTER ROTATING
  9583					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9584
  9585			005206		SN=SN+1
  9586			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0207

  9587						IFE	ZZ,<ZZ=400000>
  9588			004000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9589	035705	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9590	035706	205 10 0 00 010000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9591						IFN	<ZZ-1>,	<
  9592	035707	205 06 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9593						IFE	<ZZ-1>,<
  9594						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9595	035710	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9596	035711	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9597	035712	004 10 0 00 005206 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9598	035713	321 11 0 00 035705 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9599
  9600					;TEST ROTC RIGHT ONE BIT POSITION
  9601					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9602					;TEST MQ SHIFT LOGIC GATES
  9603
  9604					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9605					;IS TESTED.
  9606					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9607					;OTHER BIT IS A ONE AFTER ROTATING
  9608					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9609
  9610			005207		SN=SN+1
  9611			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9612						IFE	ZZ,<ZZ=400000>
  9613			002000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9614	035714	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9615	035715	205 10 0 00 004000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9616						IFN	<ZZ-1>,	<
  9617	035716	205 06 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9618						IFE	<ZZ-1>,<
  9619						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9620	035717	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9621	035720	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9622	035721	004 10 0 00 005207 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9623	035722	321 11 0 00 035714 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9624
  9625					;TEST ROTC RIGHT ONE BIT POSITION
  9626					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9627					;TEST MQ SHIFT LOGIC GATES
  9628
  9629					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9630					;IS TESTED.
  9631					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9632					;OTHER BIT IS A ONE AFTER ROTATING
  9633					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9634
  9635			005210		SN=SN+1
  9636			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9637						IFE	ZZ,<ZZ=400000>
  9638			001000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9639	035723	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9640	035724	205 10 0 00 002000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9641						IFN	<ZZ-1>,	<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0208

  9642	035725	205 06 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9643						IFE	<ZZ-1>,<
  9644						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9645	035726	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9646	035727	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9647	035730	004 10 0 00 005210 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9648	035731	321 11 0 00 035723 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9649
  9650					;TEST ROTC RIGHT ONE BIT POSITION
  9651					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9652					;TEST MQ SHIFT LOGIC GATES
  9653
  9654					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9655					;IS TESTED.
  9656					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9657					;OTHER BIT IS A ONE AFTER ROTATING
  9658					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9659
  9660			005211		SN=SN+1
  9661			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9662						IFE	ZZ,<ZZ=400000>
  9663			000400			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9664	035732	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9665	035733	205 10 0 00 001000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9666						IFN	<ZZ-1>,	<
  9667	035734	205 06 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9668						IFE	<ZZ-1>,<
  9669						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9670	035735	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9671	035736	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9672	035737	004 10 0 00 005211 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9673	035740	321 11 0 00 035732 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9674
  9675					;TEST ROTC RIGHT ONE BIT POSITION
  9676					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9677					;TEST MQ SHIFT LOGIC GATES
  9678
  9679					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9680					;IS TESTED.
  9681					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9682					;OTHER BIT IS A ONE AFTER ROTATING
  9683					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9684
  9685			005212		SN=SN+1
  9686			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9687						IFE	ZZ,<ZZ=400000>
  9688			000200			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9689	035741	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9690	035742	205 10 0 00 000400 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9691						IFN	<ZZ-1>,	<
  9692	035743	205 06 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9693						IFE	<ZZ-1>,<
  9694						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9695	035744	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9696	035745	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0209

  9697	035746	004 10 0 00 005212 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9698	035747	321 11 0 00 035741 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9699
  9700					;TEST ROTC RIGHT ONE BIT POSITION
  9701					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9702					;TEST MQ SHIFT LOGIC GATES
  9703
  9704					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9705					;IS TESTED.
  9706					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9707					;OTHER BIT IS A ONE AFTER ROTATING
  9708					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9709
  9710			005213		SN=SN+1
  9711			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9712						IFE	ZZ,<ZZ=400000>
  9713			000100			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9714	035750	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9715	035751	205 10 0 00 000200 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9716						IFN	<ZZ-1>,	<
  9717	035752	205 06 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9718						IFE	<ZZ-1>,<
  9719						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9720	035753	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9721	035754	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9722	035755	004 10 0 00 005213 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9723	035756	321 11 0 00 035750 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9724
  9725					;TEST ROTC RIGHT ONE BIT POSITION
  9726					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9727					;TEST MQ SHIFT LOGIC GATES
  9728
  9729					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9730					;IS TESTED.
  9731					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9732					;OTHER BIT IS A ONE AFTER ROTATING
  9733					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9734
  9735			005214		SN=SN+1
  9736			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9737						IFE	ZZ,<ZZ=400000>
  9738			000040			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9739	035757	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9740	035760	205 10 0 00 000100 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9741						IFN	<ZZ-1>,	<
  9742	035761	205 06 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9743						IFE	<ZZ-1>,<
  9744						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9745	035762	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9746	035763	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9747	035764	004 10 0 00 005214 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9748	035765	321 11 0 00 035757 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9749
  9750					;TEST ROTC RIGHT ONE BIT POSITION
  9751					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0210

  9752					;TEST MQ SHIFT LOGIC GATES
  9753
  9754					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9755					;IS TESTED.
  9756					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9757					;OTHER BIT IS A ONE AFTER ROTATING
  9758					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9759
  9760			005215		SN=SN+1
  9761			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9762						IFE	ZZ,<ZZ=400000>
  9763			000020			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9764	035766	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9765	035767	205 10 0 00 000040 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9766						IFN	<ZZ-1>,	<
  9767	035770	205 06 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9768						IFE	<ZZ-1>,<
  9769						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9770	035771	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9771	035772	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9772	035773	004 10 0 00 005215 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9773	035774	321 11 0 00 035766 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9774
  9775					;TEST ROTC RIGHT ONE BIT POSITION
  9776					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9777					;TEST MQ SHIFT LOGIC GATES
  9778
  9779					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9780					;IS TESTED.
  9781					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9782					;OTHER BIT IS A ONE AFTER ROTATING
  9783					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9784
  9785			005216		SN=SN+1
  9786			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9787						IFE	ZZ,<ZZ=400000>
  9788			000010			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9789	035775	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9790	035776	205 10 0 00 000020 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9791						IFN	<ZZ-1>,	<
  9792	035777	205 06 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9793						IFE	<ZZ-1>,<
  9794						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9795	036000	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9796	036001	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9797	036002	004 10 0 00 005216 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9798	036003	321 11 0 00 035775 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9799
  9800					;TEST ROTC RIGHT ONE BIT POSITION
  9801					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9802					;TEST MQ SHIFT LOGIC GATES
  9803
  9804					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9805					;IS TESTED.
  9806					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0211

  9807					;OTHER BIT IS A ONE AFTER ROTATING
  9808					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9809
  9810			005217		SN=SN+1
  9811			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9812						IFE	ZZ,<ZZ=400000>
  9813			000004			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9814	036004	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9815	036005	205 10 0 00 000010 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9816						IFN	<ZZ-1>,	<
  9817	036006	205 06 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9818						IFE	<ZZ-1>,<
  9819						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9820	036007	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9821	036010	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9822	036011	004 10 0 00 005217 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9823	036012	321 11 0 00 036004 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9824
  9825					;TEST ROTC RIGHT ONE BIT POSITION
  9826					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9827					;TEST MQ SHIFT LOGIC GATES
  9828
  9829					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9830					;IS TESTED.
  9831					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9832					;OTHER BIT IS A ONE AFTER ROTATING
  9833					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9834
  9835			005220		SN=SN+1
  9836			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9837						IFE	ZZ,<ZZ=400000>
  9838			000002			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9839	036013	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9840	036014	205 10 0 00 000004 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9841						IFN	<ZZ-1>,	<
  9842	036015	205 06 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9843						IFE	<ZZ-1>,<
  9844						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9845	036016	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9846	036017	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9847	036020	004 10 0 00 005220 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9848	036021	321 11 0 00 036013 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9849
  9850					;TEST ROTC RIGHT ONE BIT POSITION
  9851					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9852					;TEST MQ SHIFT LOGIC GATES
  9853
  9854					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9855					;IS TESTED.
  9856					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9857					;OTHER BIT IS A ONE AFTER ROTATING
  9858					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9859
  9860			005221		SN=SN+1
  9861			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0212

  9862						IFE	ZZ,<ZZ=400000>
  9863			000001			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9864	036022	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9865	036023	205 10 0 00 000002 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9866						IFN	<ZZ-1>,	<
  9867	036024	205 06 0 00 000001 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9868						IFE	<ZZ-1>,<
  9869						MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9870	036025	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9871	036026	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9872	036027	004 10 0 00 005221 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9873	036030	321 11 0 00 036022 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9874
  9875					;TEST ROTC RIGHT ONE BIT POSITION
  9876					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9877					;TEST MQ SHIFT LOGIC GATES
  9878
  9879					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9880					;IS TESTED.
  9881					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9882					;OTHER BIT IS A ONE AFTER ROTATING
  9883					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9884
  9885			005222		SN=SN+1
  9886			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9887						IFE	ZZ,<ZZ=400000>
  9888			000000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9889	036031	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9890	036032	205 10 0 00 000001 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
  9891						IFN	<ZZ-1>,	<
  9892						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
  9893						IFE	<ZZ-1>,<
  9894	036033	201 06 0 00 400000 		MOVEI	AC-1, 400000	;SETUP FOR COMPARISON>
  9895	036034	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9896	036035	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9897	036036	004 10 0 00 005222 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9898	036037	321 11 0 00 036031 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
  9899
  9900					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0213

  9901			000000			ZZ=0
  9902
  9903							;TEST AC+1 RIGHT HALF<
  9904						REPEAT	^D17,<;TEST ROTC RIGHT ONE BIT POSITION
  9905					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9906					;TEST MQ SHIFT LOGIC GATES
  9907					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9908					;IS TESTED.
  9909					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9910					;OTHER BIT IS A ONE AFTER ROTATING
  9911					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9912
  9913					SN=SN+1
  9914						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9915						IFE	ZZ,<ZZ=400000>
  9916
  9917						YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9918						SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9919						MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  9920						MOVEI	AC-1,YY		;SETUP FOR COMPARISON
  9921						ROTC	AC,-1		;*ROTATE RIGHT ONE
  9922						CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9923						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9924						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9925					>
  9926					;TEST ROTC RIGHT ONE BIT POSITION
  9927					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9928					;TEST MQ SHIFT LOGIC GATES
  9929					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9930					;IS TESTED.
  9931					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9932					;OTHER BIT IS A ONE AFTER ROTATING
  9933					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9934
  9935			005223		SN=SN+1
  9936			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9937			400000			IFE	ZZ,<ZZ=400000>
  9938
  9939			200000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9940	036040	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9941	036041	201 10 0 00 400000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  9942	036042	201 06 0 00 200000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
  9943	036043	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9944	036044	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9945	036045	004 10 0 00 005223 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9946	036046	321 11 0 00 036040 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9947
  9948					;TEST ROTC RIGHT ONE BIT POSITION
  9949					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9950					;TEST MQ SHIFT LOGIC GATES
  9951					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9952					;IS TESTED.
  9953					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9954					;OTHER BIT IS A ONE AFTER ROTATING
  9955					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0214

  9956
  9957			005224		SN=SN+1
  9958			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9959						IFE	ZZ,<ZZ=400000>
  9960
  9961			100000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9962	036047	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9963	036050	201 10 0 00 200000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  9964	036051	201 06 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
  9965	036052	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9966	036053	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9967	036054	004 10 0 00 005224 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9968	036055	321 11 0 00 036047 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9969
  9970					;TEST ROTC RIGHT ONE BIT POSITION
  9971					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9972					;TEST MQ SHIFT LOGIC GATES
  9973					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9974					;IS TESTED.
  9975					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9976					;OTHER BIT IS A ONE AFTER ROTATING
  9977					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
  9978
  9979			005225		SN=SN+1
  9980			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
  9981						IFE	ZZ,<ZZ=400000>
  9982
  9983			040000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
  9984	036056	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
  9985	036057	201 10 0 00 100000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
  9986	036060	201 06 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
  9987	036061	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
  9988	036062	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
  9989	036063	004 10 0 00 005225 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
  9990	036064	321 11 0 00 036056 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
  9991
  9992					;TEST ROTC RIGHT ONE BIT POSITION
  9993					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
  9994					;TEST MQ SHIFT LOGIC GATES
  9995					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
  9996					;IS TESTED.
  9997					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
  9998					;OTHER BIT IS A ONE AFTER ROTATING
  9999					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10000
 10001			005226		SN=SN+1
 10002			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10003						IFE	ZZ,<ZZ=400000>
 10004
 10005			020000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10006	036065	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10007	036066	201 10 0 00 040000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10008	036067	201 06 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10009	036070	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10010	036071	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0215

 10011	036072	004 10 0 00 005226 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10012	036073	321 11 0 00 036065 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10013
 10014					;TEST ROTC RIGHT ONE BIT POSITION
 10015					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10016					;TEST MQ SHIFT LOGIC GATES
 10017					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10018					;IS TESTED.
 10019					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10020					;OTHER BIT IS A ONE AFTER ROTATING
 10021					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10022
 10023			005227		SN=SN+1
 10024			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10025						IFE	ZZ,<ZZ=400000>
 10026
 10027			010000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10028	036074	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10029	036075	201 10 0 00 020000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10030	036076	201 06 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10031	036077	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10032	036100	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10033	036101	004 10 0 00 005227 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10034	036102	321 11 0 00 036074 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10035
 10036					;TEST ROTC RIGHT ONE BIT POSITION
 10037					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10038					;TEST MQ SHIFT LOGIC GATES
 10039					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10040					;IS TESTED.
 10041					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10042					;OTHER BIT IS A ONE AFTER ROTATING
 10043					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10044
 10045			005230		SN=SN+1
 10046			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10047						IFE	ZZ,<ZZ=400000>
 10048
 10049			004000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10050	036103	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10051	036104	201 10 0 00 010000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10052	036105	201 06 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10053	036106	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10054	036107	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10055	036110	004 10 0 00 005230 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10056	036111	321 11 0 00 036103 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10057
 10058					;TEST ROTC RIGHT ONE BIT POSITION
 10059					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10060					;TEST MQ SHIFT LOGIC GATES
 10061					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10062					;IS TESTED.
 10063					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10064					;OTHER BIT IS A ONE AFTER ROTATING
 10065					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0216

 10066
 10067			005231		SN=SN+1
 10068			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10069						IFE	ZZ,<ZZ=400000>
 10070
 10071			002000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10072	036112	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10073	036113	201 10 0 00 004000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10074	036114	201 06 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10075	036115	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10076	036116	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10077	036117	004 10 0 00 005231 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10078	036120	321 11 0 00 036112 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10079
 10080					;TEST ROTC RIGHT ONE BIT POSITION
 10081					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10082					;TEST MQ SHIFT LOGIC GATES
 10083					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10084					;IS TESTED.
 10085					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10086					;OTHER BIT IS A ONE AFTER ROTATING
 10087					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10088
 10089			005232		SN=SN+1
 10090			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10091						IFE	ZZ,<ZZ=400000>
 10092
 10093			001000			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10094	036121	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10095	036122	201 10 0 00 002000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10096	036123	201 06 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10097	036124	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10098	036125	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10099	036126	004 10 0 00 005232 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10100	036127	321 11 0 00 036121 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10101
 10102					;TEST ROTC RIGHT ONE BIT POSITION
 10103					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10104					;TEST MQ SHIFT LOGIC GATES
 10105					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10106					;IS TESTED.
 10107					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10108					;OTHER BIT IS A ONE AFTER ROTATING
 10109					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10110
 10111			005233		SN=SN+1
 10112			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10113						IFE	ZZ,<ZZ=400000>
 10114
 10115			000400			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10116	036130	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10117	036131	201 10 0 00 001000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10118	036132	201 06 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10119	036133	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10120	036134	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0217

 10121	036135	004 10 0 00 005233 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10122	036136	321 11 0 00 036130 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10123
 10124					;TEST ROTC RIGHT ONE BIT POSITION
 10125					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10126					;TEST MQ SHIFT LOGIC GATES
 10127					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10128					;IS TESTED.
 10129					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10130					;OTHER BIT IS A ONE AFTER ROTATING
 10131					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10132
 10133			005234		SN=SN+1
 10134			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10135						IFE	ZZ,<ZZ=400000>
 10136
 10137			000200			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10138	036137	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10139	036140	201 10 0 00 000400 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10140	036141	201 06 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10141	036142	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10142	036143	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10143	036144	004 10 0 00 005234 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10144	036145	321 11 0 00 036137 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10145
 10146					;TEST ROTC RIGHT ONE BIT POSITION
 10147					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10148					;TEST MQ SHIFT LOGIC GATES
 10149					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10150					;IS TESTED.
 10151					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10152					;OTHER BIT IS A ONE AFTER ROTATING
 10153					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10154
 10155			005235		SN=SN+1
 10156			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10157						IFE	ZZ,<ZZ=400000>
 10158
 10159			000100			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10160	036146	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10161	036147	201 10 0 00 000200 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10162	036150	201 06 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10163	036151	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10164	036152	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10165	036153	004 10 0 00 005235 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10166	036154	321 11 0 00 036146 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10167
 10168					;TEST ROTC RIGHT ONE BIT POSITION
 10169					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10170					;TEST MQ SHIFT LOGIC GATES
 10171					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10172					;IS TESTED.
 10173					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10174					;OTHER BIT IS A ONE AFTER ROTATING
 10175					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0218

 10176
 10177			005236		SN=SN+1
 10178			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10179						IFE	ZZ,<ZZ=400000>
 10180
 10181			000040			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10182	036155	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10183	036156	201 10 0 00 000100 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10184	036157	201 06 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10185	036160	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10186	036161	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10187	036162	004 10 0 00 005236 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10188	036163	321 11 0 00 036155 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10189
 10190					;TEST ROTC RIGHT ONE BIT POSITION
 10191					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10192					;TEST MQ SHIFT LOGIC GATES
 10193					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10194					;IS TESTED.
 10195					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10196					;OTHER BIT IS A ONE AFTER ROTATING
 10197					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10198
 10199			005237		SN=SN+1
 10200			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10201						IFE	ZZ,<ZZ=400000>
 10202
 10203			000020			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10204	036164	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10205	036165	201 10 0 00 000040 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10206	036166	201 06 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10207	036167	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10208	036170	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10209	036171	004 10 0 00 005237 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10210	036172	321 11 0 00 036164 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10211
 10212					;TEST ROTC RIGHT ONE BIT POSITION
 10213					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10214					;TEST MQ SHIFT LOGIC GATES
 10215					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10216					;IS TESTED.
 10217					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10218					;OTHER BIT IS A ONE AFTER ROTATING
 10219					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10220
 10221			005240		SN=SN+1
 10222			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10223						IFE	ZZ,<ZZ=400000>
 10224
 10225			000010			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10226	036173	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10227	036174	201 10 0 00 000020 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10228	036175	201 06 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10229	036176	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10230	036177	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0219

 10231	036200	004 10 0 00 005240 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10232	036201	321 11 0 00 036173 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10233
 10234					;TEST ROTC RIGHT ONE BIT POSITION
 10235					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10236					;TEST MQ SHIFT LOGIC GATES
 10237					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10238					;IS TESTED.
 10239					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10240					;OTHER BIT IS A ONE AFTER ROTATING
 10241					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10242
 10243			005241		SN=SN+1
 10244			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10245						IFE	ZZ,<ZZ=400000>
 10246
 10247			000004			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10248	036202	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10249	036203	201 10 0 00 000010 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10250	036204	201 06 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10251	036205	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10252	036206	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10253	036207	004 10 0 00 005241 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10254	036210	321 11 0 00 036202 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10255
 10256					;TEST ROTC RIGHT ONE BIT POSITION
 10257					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10258					;TEST MQ SHIFT LOGIC GATES
 10259					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10260					;IS TESTED.
 10261					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10262					;OTHER BIT IS A ONE AFTER ROTATING
 10263					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 10264
 10265			005242		SN=SN+1
 10266			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10267						IFE	ZZ,<ZZ=400000>
 10268
 10269			000002			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10270	036211	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10271	036212	201 10 0 00 000004 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10272	036213	201 06 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10273	036214	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10274	036215	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10275	036216	004 10 0 00 005242 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10276	036217	321 11 0 00 036211 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10277
 10278					;TEST ROTC RIGHT ONE BIT POSITION
 10279					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 10280					;TEST MQ SHIFT LOGIC GATES
 10281					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10282					;IS TESTED.
 10283					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 10284					;OTHER BIT IS A ONE AFTER ROTATING
 10285					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 23-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0220

 10286
 10287			005243		SN=SN+1
 10288			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 10289						IFE	ZZ,<ZZ=400000>
 10290
 10291			000001			YY=ZZ/2			;SELECTED BIT AFTER ROTATION
 10292	036220	400 07 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 10293	036221	201 10 0 00 000002 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 10294	036222	201 06 0 00 000001 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 10295	036223	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10296	036224	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ONE
 10297	036225	004 10 0 00 005243 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10298	036226	321 11 0 00 036220 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10299
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0221

 10300			005300		SN=5300
 10301			000001			ZZ=1
 10302
 10303							;TEST AC+1 LEFT HALF<
 10304					E5300:	REPEAT	^D18,<;TEST ROTC RIGHT ONE BIT POSITION
 10305					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10306					;TEST MQ SHIFT LOGIC GATES
 10307					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10308					;IS TESTED.
 10309					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10310					;OTHER BIT IS A ZERO AFTER ROTATING
 10311					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10312
 10313					SN=SN+1
 10314						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10315						IFE	<ZZ>,<ZZ=777777377777>
 10316						YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10317						SETOM	AC		;INITIALIZE AC TO ALL CNES
 10318						HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10319						IFN	<ZZ-777776>&777777,<
 10320						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10321						IFE	<ZZ-777776>&777777,<
 10322						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10323						ROTC	AC,-1		;*ROTATE RIGHT ONE
 10324						CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10325						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10326						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10327					>
 10328					;TEST ROTC RIGHT ONE BIT POSITION
 10329					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10330					;TEST MQ SHIFT LOGIC GATES
 10331					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10332					;IS TESTED.
 10333					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10334					;OTHER BIT IS A ZERO AFTER ROTATING
 10335					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10336
 10337			005301		SN=SN+1
 10338			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10339		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
 10340			577777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10341	036227	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10342	036230	525 10 0 00 377777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10343						IFN	<ZZ-777776>&777777,<
 10344	036231	525 06 0 00 577777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10345						IFE	<ZZ-777776>&777777,<
 10346						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10347	036232	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10348	036233	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10349	036234	004 10 0 00 005301 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10350	036235	321 11 0 00 036227 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10351
 10352					;TEST ROTC RIGHT ONE BIT POSITION
 10353					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10354					;TEST MQ SHIFT LOGIC GATES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0222

 10355					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10356					;IS TESTED.
 10357					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10358					;OTHER BIT IS A ZERO AFTER ROTATING
 10359					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10360
 10361			005302		SN=SN+1
 10362		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10363						IFE	<ZZ>,<ZZ=777777377777>
 10364			677777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10365	036236	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10366	036237	525 10 0 00 577777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10367						IFN	<ZZ-777776>&777777,<
 10368	036240	525 06 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10369						IFE	<ZZ-777776>&777777,<
 10370						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10371	036241	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10372	036242	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10373	036243	004 10 0 00 005302 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10374	036244	321 11 0 00 036236 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10375
 10376					;TEST ROTC RIGHT ONE BIT POSITION
 10377					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10378					;TEST MQ SHIFT LOGIC GATES
 10379					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10380					;IS TESTED.
 10381					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10382					;OTHER BIT IS A ZERO AFTER ROTATING
 10383					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10384
 10385			005303		SN=SN+1
 10386		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10387						IFE	<ZZ>,<ZZ=777777377777>
 10388			737777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10389	036245	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10390	036246	525 10 0 00 677777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10391						IFN	<ZZ-777776>&777777,<
 10392	036247	525 06 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10393						IFE	<ZZ-777776>&777777,<
 10394						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10395	036250	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10396	036251	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10397	036252	004 10 0 00 005303 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10398	036253	321 11 0 00 036245 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10399
 10400					;TEST ROTC RIGHT ONE BIT POSITION
 10401					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10402					;TEST MQ SHIFT LOGIC GATES
 10403					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10404					;IS TESTED.
 10405					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10406					;OTHER BIT IS A ZERO AFTER ROTATING
 10407					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10408
 10409			005304		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0223

 10410		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10411						IFE	<ZZ>,<ZZ=777777377777>
 10412			757777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10413	036254	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10414	036255	525 10 0 00 737777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10415						IFN	<ZZ-777776>&777777,<
 10416	036256	525 06 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10417						IFE	<ZZ-777776>&777777,<
 10418						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10419	036257	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10420	036260	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10421	036261	004 10 0 00 005304 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10422	036262	321 11 0 00 036254 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10423
 10424					;TEST ROTC RIGHT ONE BIT POSITION
 10425					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10426					;TEST MQ SHIFT LOGIC GATES
 10427					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10428					;IS TESTED.
 10429					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10430					;OTHER BIT IS A ZERO AFTER ROTATING
 10431					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10432
 10433			005305		SN=SN+1
 10434		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10435						IFE	<ZZ>,<ZZ=777777377777>
 10436			767777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10437	036263	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10438	036264	525 10 0 00 757777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10439						IFN	<ZZ-777776>&777777,<
 10440	036265	525 06 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10441						IFE	<ZZ-777776>&777777,<
 10442						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10443	036266	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10444	036267	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10445	036270	004 10 0 00 005305 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10446	036271	321 11 0 00 036263 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10447
 10448					;TEST ROTC RIGHT ONE BIT POSITION
 10449					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10450					;TEST MQ SHIFT LOGIC GATES
 10451					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10452					;IS TESTED.
 10453					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10454					;OTHER BIT IS A ZERO AFTER ROTATING
 10455					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10456
 10457			005306		SN=SN+1
 10458		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10459						IFE	<ZZ>,<ZZ=777777377777>
 10460			773777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10461	036272	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10462	036273	525 10 0 00 767777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10463						IFN	<ZZ-777776>&777777,<
 10464	036274	525 06 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0224

 10465						IFE	<ZZ-777776>&777777,<
 10466						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10467	036275	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10468	036276	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10469	036277	004 10 0 00 005306 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10470	036300	321 11 0 00 036272 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10471
 10472					;TEST ROTC RIGHT ONE BIT POSITION
 10473					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10474					;TEST MQ SHIFT LOGIC GATES
 10475					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10476					;IS TESTED.
 10477					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10478					;OTHER BIT IS A ZERO AFTER ROTATING
 10479					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10480
 10481			005307		SN=SN+1
 10482		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10483						IFE	<ZZ>,<ZZ=777777377777>
 10484			775777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10485	036301	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10486	036302	525 10 0 00 773777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10487						IFN	<ZZ-777776>&777777,<
 10488	036303	525 06 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10489						IFE	<ZZ-777776>&777777,<
 10490						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10491	036304	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10492	036305	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10493	036306	004 10 0 00 005307 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10494	036307	321 11 0 00 036301 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10495
 10496					;TEST ROTC RIGHT ONE BIT POSITION
 10497					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10498					;TEST MQ SHIFT LOGIC GATES
 10499					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10500					;IS TESTED.
 10501					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10502					;OTHER BIT IS A ZERO AFTER ROTATING
 10503					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10504
 10505			005310		SN=SN+1
 10506		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10507						IFE	<ZZ>,<ZZ=777777377777>
 10508			776777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10509	036310	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10510	036311	525 10 0 00 775777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10511						IFN	<ZZ-777776>&777777,<
 10512	036312	525 06 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10513						IFE	<ZZ-777776>&777777,<
 10514						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10515	036313	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10516	036314	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10517	036315	004 10 0 00 005310 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10518	036316	321 11 0 00 036310 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10519
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0225

 10520					;TEST ROTC RIGHT ONE BIT POSITION
 10521					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10522					;TEST MQ SHIFT LOGIC GATES
 10523					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10524					;IS TESTED.
 10525					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10526					;OTHER BIT IS A ZERO AFTER ROTATING
 10527					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10528
 10529			005311		SN=SN+1
 10530		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10531						IFE	<ZZ>,<ZZ=777777377777>
 10532			777377			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10533	036317	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10534	036320	525 10 0 00 776777 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10535						IFN	<ZZ-777776>&777777,<
 10536	036321	525 06 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10537						IFE	<ZZ-777776>&777777,<
 10538						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10539	036322	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10540	036323	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10541	036324	004 10 0 00 005311 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10542	036325	321 11 0 00 036317 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10543
 10544					;TEST ROTC RIGHT ONE BIT POSITION
 10545					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10546					;TEST MQ SHIFT LOGIC GATES
 10547					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10548					;IS TESTED.
 10549					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10550					;OTHER BIT IS A ZERO AFTER ROTATING
 10551					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10552
 10553			005312		SN=SN+1
 10554		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10555						IFE	<ZZ>,<ZZ=777777377777>
 10556			777577			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10557	036326	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10558	036327	525 10 0 00 777377 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10559						IFN	<ZZ-777776>&777777,<
 10560	036330	525 06 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10561						IFE	<ZZ-777776>&777777,<
 10562						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10563	036331	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10564	036332	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10565	036333	004 10 0 00 005312 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10566	036334	321 11 0 00 036326 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10567
 10568					;TEST ROTC RIGHT ONE BIT POSITION
 10569					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10570					;TEST MQ SHIFT LOGIC GATES
 10571					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10572					;IS TESTED.
 10573					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10574					;OTHER BIT IS A ZERO AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0226

 10575					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10576
 10577			005313		SN=SN+1
 10578		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10579						IFE	<ZZ>,<ZZ=777777377777>
 10580			777677			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10581	036335	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10582	036336	525 10 0 00 777577 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10583						IFN	<ZZ-777776>&777777,<
 10584	036337	525 06 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10585						IFE	<ZZ-777776>&777777,<
 10586						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10587	036340	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10588	036341	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10589	036342	004 10 0 00 005313 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10590	036343	321 11 0 00 036335 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10591
 10592					;TEST ROTC RIGHT ONE BIT POSITION
 10593					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10594					;TEST MQ SHIFT LOGIC GATES
 10595					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10596					;IS TESTED.
 10597					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10598					;OTHER BIT IS A ZERO AFTER ROTATING
 10599					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10600
 10601			005314		SN=SN+1
 10602		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10603						IFE	<ZZ>,<ZZ=777777377777>
 10604			777737			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10605	036344	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10606	036345	525 10 0 00 777677 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10607						IFN	<ZZ-777776>&777777,<
 10608	036346	525 06 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10609						IFE	<ZZ-777776>&777777,<
 10610						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10611	036347	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10612	036350	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10613	036351	004 10 0 00 005314 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10614	036352	321 11 0 00 036344 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10615
 10616					;TEST ROTC RIGHT ONE BIT POSITION
 10617					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10618					;TEST MQ SHIFT LOGIC GATES
 10619					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10620					;IS TESTED.
 10621					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10622					;OTHER BIT IS A ZERO AFTER ROTATING
 10623					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10624
 10625			005315		SN=SN+1
 10626		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10627						IFE	<ZZ>,<ZZ=777777377777>
 10628			777757			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10629	036353	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0227

 10630	036354	525 10 0 00 777737 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10631						IFN	<ZZ-777776>&777777,<
 10632	036355	525 06 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10633						IFE	<ZZ-777776>&777777,<
 10634						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10635	036356	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10636	036357	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10637	036360	004 10 0 00 005315 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10638	036361	321 11 0 00 036353 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10639
 10640					;TEST ROTC RIGHT ONE BIT POSITION
 10641					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10642					;TEST MQ SHIFT LOGIC GATES
 10643					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10644					;IS TESTED.
 10645					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10646					;OTHER BIT IS A ZERO AFTER ROTATING
 10647					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10648
 10649			005316		SN=SN+1
 10650		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10651						IFE	<ZZ>,<ZZ=777777377777>
 10652			777767			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10653	036362	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10654	036363	525 10 0 00 777757 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10655						IFN	<ZZ-777776>&777777,<
 10656	036364	525 06 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10657						IFE	<ZZ-777776>&777777,<
 10658						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10659	036365	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10660	036366	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10661	036367	004 10 0 00 005316 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10662	036370	321 11 0 00 036362 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10663
 10664					;TEST ROTC RIGHT ONE BIT POSITION
 10665					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10666					;TEST MQ SHIFT LOGIC GATES
 10667					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10668					;IS TESTED.
 10669					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10670					;OTHER BIT IS A ZERO AFTER ROTATING
 10671					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10672
 10673			005317		SN=SN+1
 10674		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10675						IFE	<ZZ>,<ZZ=777777377777>
 10676			777773			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10677	036371	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10678	036372	525 10 0 00 777767 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10679						IFN	<ZZ-777776>&777777,<
 10680	036373	525 06 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10681						IFE	<ZZ-777776>&777777,<
 10682						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10683	036374	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10684	036375	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0228

 10685	036376	004 10 0 00 005317 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10686	036377	321 11 0 00 036371 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10687
 10688					;TEST ROTC RIGHT ONE BIT POSITION
 10689					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10690					;TEST MQ SHIFT LOGIC GATES
 10691					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10692					;IS TESTED.
 10693					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10694					;OTHER BIT IS A ZERO AFTER ROTATING
 10695					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10696
 10697			005320		SN=SN+1
 10698		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10699						IFE	<ZZ>,<ZZ=777777377777>
 10700			777775			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10701	036400	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10702	036401	525 10 0 00 777773 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10703						IFN	<ZZ-777776>&777777,<
 10704	036402	525 06 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10705						IFE	<ZZ-777776>&777777,<
 10706						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10707	036403	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10708	036404	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10709	036405	004 10 0 00 005320 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10710	036406	321 11 0 00 036400 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10711
 10712					;TEST ROTC RIGHT ONE BIT POSITION
 10713					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10714					;TEST MQ SHIFT LOGIC GATES
 10715					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10716					;IS TESTED.
 10717					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10718					;OTHER BIT IS A ZERO AFTER ROTATING
 10719					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10720
 10721			005321		SN=SN+1
 10722		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10723						IFE	<ZZ>,<ZZ=777777377777>
 10724			777776			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10725	036407	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10726	036410	525 10 0 00 777775 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10727						IFN	<ZZ-777776>&777777,<
 10728	036411	525 06 0 00 777776 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10729						IFE	<ZZ-777776>&777777,<
 10730						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10731	036412	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10732	036413	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10733	036414	004 10 0 00 005321 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10734	036415	321 11 0 00 036407 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10735
 10736					;TEST ROTC RIGHT ONE BIT POSITION
 10737					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10738					;TEST MQ SHIFT LOGIC GATES
 10739					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0229

 10740					;IS TESTED.
 10741					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10742					;OTHER BIT IS A ZERO AFTER ROTATING
 10743					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10744
 10745			005322		SN=SN+1
 10746		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10747						IFE	<ZZ>,<ZZ=777777377777>
 10748			777777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10749	036416	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10750	036417	525 10 0 00 777776 		HRLOI	AC+1,ZZ&777777	;SETUP BIT (N) OF AC+1 LEFT
 10751						IFN	<ZZ-777776>&777777,<
 10752						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 10753						IFE	<ZZ-777776>&777777,<
 10754	036420	561 06 0 00 377777 		HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 10755	036421	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10756	036422	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10757	036423	004 10 0 00 005322 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10758	036424	321 11 0 00 036416 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH.
 10759
 10760					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0230

 10761			000001			ZZ=1
 10762
 10763							;TEST AC+1 RIGHT HALF<
 10764						REPEAT	^D17,<;TEST ROTC RIGHT ONE BIT POSITION
 10765					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10766					;TEST MQ SHIFT LOGIC GATES
 10767					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10768					;IS TESTED.
 10769					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10770					;OTHER BIT IS A ZERO AFTER ROTATING
 10771					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10772
 10773					SN=SN+1
 10774						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10775						IFE<ZZ>,<ZZ=777777377777>
 10776						YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10777						SETOM	AC		;INITIALIZE AC TO ALL CNES
 10778						HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10779						HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10780						ROTC	AC,-1		;*ROTATE RIGHT ONE
 10781						CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10782						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10783						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10784					>
 10785					;TEST ROTC RIGHT ONE BIT POSITION
 10786					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10787					;TEST MQ SHIFT LOGIC GATES
 10788					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10789					;IS TESTED.
 10790					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10791					;OTHER BIT IS A ZERO AFTER ROTATING
 10792					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10793
 10794			005323		SN=SN+1
 10795			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10796		777777	377777			IFE<ZZ>,<ZZ=777777377777>
 10797			577777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10798	036425	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10799	036426	561 10 0 00 377777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10800	036427	561 06 0 00 577777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10801	036430	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10802	036431	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10803	036432	004 10 0 00 005323 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10804	036433	321 11 0 00 036425 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10805
 10806					;TEST ROTC RIGHT ONE BIT POSITION
 10807					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10808					;TEST MQ SHIFT LOGIC GATES
 10809					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10810					;IS TESTED.
 10811					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10812					;OTHER BIT IS A ZERO AFTER ROTATING
 10813					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10814
 10815			005324		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0231

 10816		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10817						IFE<ZZ>,<ZZ=777777377777>
 10818			677777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10819	036434	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10820	036435	561 10 0 00 577777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10821	036436	561 06 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10822	036437	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10823	036440	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10824	036441	004 10 0 00 005324 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10825	036442	321 11 0 00 036434 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10826
 10827					;TEST ROTC RIGHT ONE BIT POSITION
 10828					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10829					;TEST MQ SHIFT LOGIC GATES
 10830					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10831					;IS TESTED.
 10832					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10833					;OTHER BIT IS A ZERO AFTER ROTATING
 10834					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10835
 10836			005325		SN=SN+1
 10837		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10838						IFE<ZZ>,<ZZ=777777377777>
 10839			737777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10840	036443	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10841	036444	561 10 0 00 677777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10842	036445	561 06 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10843	036446	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10844	036447	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10845	036450	004 10 0 00 005325 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10846	036451	321 11 0 00 036443 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10847
 10848					;TEST ROTC RIGHT ONE BIT POSITION
 10849					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10850					;TEST MQ SHIFT LOGIC GATES
 10851					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10852					;IS TESTED.
 10853					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10854					;OTHER BIT IS A ZERO AFTER ROTATING
 10855					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10856
 10857			005326		SN=SN+1
 10858		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10859						IFE<ZZ>,<ZZ=777777377777>
 10860			757777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10861	036452	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10862	036453	561 10 0 00 737777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10863	036454	561 06 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10864	036455	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10865	036456	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10866	036457	004 10 0 00 005326 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10867	036460	321 11 0 00 036452 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10868
 10869					;TEST ROTC RIGHT ONE BIT POSITION
 10870					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0232

 10871					;TEST MQ SHIFT LOGIC GATES
 10872					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10873					;IS TESTED.
 10874					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10875					;OTHER BIT IS A ZERO AFTER ROTATING
 10876					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10877
 10878			005327		SN=SN+1
 10879		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10880						IFE<ZZ>,<ZZ=777777377777>
 10881			767777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10882	036461	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10883	036462	561 10 0 00 757777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10884	036463	561 06 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10885	036464	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10886	036465	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10887	036466	004 10 0 00 005327 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10888	036467	321 11 0 00 036461 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10889
 10890					;TEST ROTC RIGHT ONE BIT POSITION
 10891					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10892					;TEST MQ SHIFT LOGIC GATES
 10893					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10894					;IS TESTED.
 10895					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10896					;OTHER BIT IS A ZERO AFTER ROTATING
 10897					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10898
 10899			005330		SN=SN+1
 10900		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10901						IFE<ZZ>,<ZZ=777777377777>
 10902			773777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10903	036470	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10904	036471	561 10 0 00 767777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10905	036472	561 06 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10906	036473	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10907	036474	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10908	036475	004 10 0 00 005330 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10909	036476	321 11 0 00 036470 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10910
 10911					;TEST ROTC RIGHT ONE BIT POSITION
 10912					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10913					;TEST MQ SHIFT LOGIC GATES
 10914					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10915					;IS TESTED.
 10916					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10917					;OTHER BIT IS A ZERO AFTER ROTATING
 10918					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10919
 10920			005331		SN=SN+1
 10921		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10922						IFE<ZZ>,<ZZ=777777377777>
 10923			775777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10924	036477	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10925	036500	561 10 0 00 773777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0233

 10926	036501	561 06 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10927	036502	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10928	036503	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10929	036504	004 10 0 00 005331 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10930	036505	321 11 0 00 036477 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10931
 10932					;TEST ROTC RIGHT ONE BIT POSITION
 10933					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10934					;TEST MQ SHIFT LOGIC GATES
 10935					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10936					;IS TESTED.
 10937					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10938					;OTHER BIT IS A ZERO AFTER ROTATING
 10939					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10940
 10941			005332		SN=SN+1
 10942		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10943						IFE<ZZ>,<ZZ=777777377777>
 10944			776777			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10945	036506	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10946	036507	561 10 0 00 775777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10947	036510	561 06 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10948	036511	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10949	036512	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10950	036513	004 10 0 00 005332 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10951	036514	321 11 0 00 036506 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10952
 10953					;TEST ROTC RIGHT ONE BIT POSITION
 10954					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10955					;TEST MQ SHIFT LOGIC GATES
 10956					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10957					;IS TESTED.
 10958					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10959					;OTHER BIT IS A ZERO AFTER ROTATING
 10960					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10961
 10962			005333		SN=SN+1
 10963		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10964						IFE<ZZ>,<ZZ=777777377777>
 10965			777377			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10966	036515	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10967	036516	561 10 0 00 776777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10968	036517	561 06 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10969	036520	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10970	036521	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10971	036522	004 10 0 00 005333 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10972	036523	321 11 0 00 036515 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10973
 10974					;TEST ROTC RIGHT ONE BIT POSITION
 10975					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10976					;TEST MQ SHIFT LOGIC GATES
 10977					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10978					;IS TESTED.
 10979					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 10980					;OTHER BIT IS A ZERO AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0234

 10981					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 10982
 10983			005334		SN=SN+1
 10984		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 10985						IFE<ZZ>,<ZZ=777777377777>
 10986			777577			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 10987	036524	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 10988	036525	561 10 0 00 777377 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 10989	036526	561 06 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 10990	036527	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 10991	036530	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 10992	036531	004 10 0 00 005334 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 10993	036532	321 11 0 00 036524 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 10994
 10995					;TEST ROTC RIGHT ONE BIT POSITION
 10996					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 10997					;TEST MQ SHIFT LOGIC GATES
 10998					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 10999					;IS TESTED.
 11000					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11001					;OTHER BIT IS A ZERO AFTER ROTATING
 11002					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11003
 11004			005335		SN=SN+1
 11005		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11006						IFE<ZZ>,<ZZ=777777377777>
 11007			777677			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11008	036533	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11009	036534	561 10 0 00 777577 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11010	036535	561 06 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11011	036536	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11012	036537	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11013	036540	004 10 0 00 005335 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11014	036541	321 11 0 00 036533 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11015
 11016					;TEST ROTC RIGHT ONE BIT POSITION
 11017					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11018					;TEST MQ SHIFT LOGIC GATES
 11019					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11020					;IS TESTED.
 11021					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11022					;OTHER BIT IS A ZERO AFTER ROTATING
 11023					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11024
 11025			005336		SN=SN+1
 11026		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11027						IFE<ZZ>,<ZZ=777777377777>
 11028			777737			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11029	036542	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11030	036543	561 10 0 00 777677 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11031	036544	561 06 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11032	036545	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11033	036546	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11034	036547	004 10 0 00 005336 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11035	036550	321 11 0 00 036542 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0235

 11036
 11037					;TEST ROTC RIGHT ONE BIT POSITION
 11038					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11039					;TEST MQ SHIFT LOGIC GATES
 11040					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11041					;IS TESTED.
 11042					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11043					;OTHER BIT IS A ZERO AFTER ROTATING
 11044					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11045
 11046			005337		SN=SN+1
 11047		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11048						IFE<ZZ>,<ZZ=777777377777>
 11049			777757			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11050	036551	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11051	036552	561 10 0 00 777737 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11052	036553	561 06 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11053	036554	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11054	036555	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11055	036556	004 10 0 00 005337 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11056	036557	321 11 0 00 036551 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11057
 11058					;TEST ROTC RIGHT ONE BIT POSITION
 11059					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11060					;TEST MQ SHIFT LOGIC GATES
 11061					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11062					;IS TESTED.
 11063					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11064					;OTHER BIT IS A ZERO AFTER ROTATING
 11065					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11066
 11067			005340		SN=SN+1
 11068		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11069						IFE<ZZ>,<ZZ=777777377777>
 11070			777767			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11071	036560	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11072	036561	561 10 0 00 777757 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11073	036562	561 06 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11074	036563	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11075	036564	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11076	036565	004 10 0 00 005340 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11077	036566	321 11 0 00 036560 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11078
 11079					;TEST ROTC RIGHT ONE BIT POSITION
 11080					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11081					;TEST MQ SHIFT LOGIC GATES
 11082					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11083					;IS TESTED.
 11084					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11085					;OTHER BIT IS A ZERO AFTER ROTATING
 11086					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11087
 11088			005341		SN=SN+1
 11089		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11090						IFE<ZZ>,<ZZ=777777377777>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 24-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0236

 11091			777773			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11092	036567	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11093	036570	561 10 0 00 777767 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11094	036571	561 06 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11095	036572	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11096	036573	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11097	036574	004 10 0 00 005341 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11098	036575	321 11 0 00 036567 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11099
 11100					;TEST ROTC RIGHT ONE BIT POSITION
 11101					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11102					;TEST MQ SHIFT LOGIC GATES
 11103					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11104					;IS TESTED.
 11105					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11106					;OTHER BIT IS A ZERO AFTER ROTATING
 11107					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11108
 11109			005342		SN=SN+1
 11110		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11111						IFE<ZZ>,<ZZ=777777377777>
 11112			777775			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11113	036576	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11114	036577	561 10 0 00 777773 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11115	036600	561 06 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11116	036601	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11117	036602	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11118	036603	004 10 0 00 005342 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11119	036604	321 11 0 00 036576 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11120
 11121					;TEST ROTC RIGHT ONE BIT POSITION
 11122					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 11123					;TEST MQ SHIFT LOGIC GATES
 11124					;AC,AC+1 ARE ROTATED RIGHT ONE BIT POSITION AND AC+1
 11125					;IS TESTED.
 11126					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 11127					;OTHER BIT IS A ZERO AFTER ROTATING
 11128					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 11129
 11130			005343		SN=SN+1
 11131		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 11132						IFE<ZZ>,<ZZ=777777377777>
 11133			777776			YY=<<ZZ-1>/2>&777777	;SELECTED BIT AFTER ROTATION
 11134	036605	476 00 0 00 000007 		SETOM	AC		;INITIALIZE AC TO ALL CNES
 11135	036606	561 10 0 00 777775 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 11136	036607	561 06 0 00 777776 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 11137	036610	245 07 0 00 777777 		ROTC	AC,-1		;*ROTATE RIGHT ONE
 11138	036611	312 10 0 00 000006 		CAME	AC+1,AC-1	;TEST FOR BIT (N+1) A ZERO
 11139	036612	004 10 0 00 005343 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11140	036613	321 11 0 00 036605 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11141
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 25
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0237

 11142					;TEST ROTC RIGHT TWO BIT POSITIONS USING ALL ZEROS
 11143					;TEST MQ SHIFT LOGIC GATES
 11144					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND
 11145					;AC+1 IS TESTED
 11146					;AN ERROR OCCURS IF C(AC+1) IS NON-ZERO AFTER ROTATING
 11147
 11148			000006			AC=6
 11149						SAVEAC	(1,1)^
 11150	036614	201 10 0 00 036614 		MOVEI	AC+2,.		;SAVE TEST PC
 11151	036615	202 10 0 00 030051 		MOVEM	AC+2,TESTPC
 11152	036616	201 10 0 00 000010 		MOVEI	AC+2,<AC+2>&17	;INFORM ERROR ROUTINE WHICH
 11153	036617	202 10 0 00 041763 		MOVEM	AC+2,ERRLOP#	;AC IS USED FOR ITERATION^
 11154	036620				E5400:
 11155	036620	403 06 0 00 000007 		SETZB	AC,AC+1		;INITIALIZE AC,AC+1 TO ALL ZEROS
 11156	036621	402 00 0 00 000005 		SETZM	AC-1		;INITIALIZE RESULT TO ZERO
 11157	036622	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11158	036623	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ZEROS
 11159	036624	004 07 0 00 005401 		ER4	AC+1,5401	;MQ GATING FAILED
 11160	036625	321 10 0 00 036620 		JUMPL	AC+2,E5400	;LOOP ON ERROR SWITCH
 11161
 11162					;TEST ROTC RIGHT TWO BIT POSITIONS USING ALL ONES
 11163					;TEST MQ SHIFT LOGIC GATES
 11164					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND
 11165					;AC+1 IS TESTED
 11166					;AN ERROR OCCURS IF C(AC+1) IS ZERO AFTER ROTATING
 11167
 11168	036626	477 06 0 00 000007 	E5500:	SETOB	AC,AC+1		;INITIALIZE AC,AC+1 TO ALL ONES
 11169	036627	476 00 0 00 000005 		SETOM	AC-1		;INITIALIZE RESULT TO ALL ONES
 11170	036630	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11171	036631	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST AC+1 FOR ALL ONES
 11172	036632	004 07 0 00 005501 		ER4	AC+1,5501	;MQ GATING FAILED
 11173	036633	321 10 0 00 036626 		JUMPL	AC+2,E5500	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0238

 11174			005600		SN=5600
 11175			000000			ZZ=0
 11176
 11177							;TEST AC+1 LEFT HALF<
 11178					E5600:	REPEAT	^D18,<;TEST ROTC RIGHT TWO BIT POSITIONS
 11179					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11180					;TEST MQ SHIFT LOGIC GATES
 11181					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11182					;IS TESTED.
 11183					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11184					;OTHER BIT IS A ONE AFTER ROTATING
 11185					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11186
 11187					SN=SN+1
 11188						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11189						IFE	ZZ,<ZZ=400000>
 11190						YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11191						SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11192						MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11193						IFG	<ZZ-2,>,<
 11194						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11195						IFE	<ZZ-2>,<
 11196						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11197						IFE	<ZZ-1>,<
 11198						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11199						ROTC	AC,-2		;*ROTATE RIGHT TWO
 11200						CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11201						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11202						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11203					>
 11204					;TEST ROTC RIGHT TWO BIT POSITIONS
 11205					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11206					;TEST MQ SHIFT LOGIC GATES
 11207					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11208					;IS TESTED.
 11209					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11210					;OTHER BIT IS A ONE AFTER ROTATING
 11211					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11212
 11213			005601		SN=SN+1
 11214			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11215			400000			IFE	ZZ,<ZZ=400000>
 11216			100000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11217	036634	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11218	036635	205 07 0 00 400000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11219						IFG	<ZZ-2,>,<
 11220	036636	205 05 0 00 100000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11221						IFE	<ZZ-2>,<
 11222						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11223						IFE	<ZZ-1>,<
 11224						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11225	036637	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11226	036640	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11227	036641	004 07 0 00 005601 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11228	036642	321 10 0 00 036634 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0239

 11229
 11230					;TEST ROTC RIGHT TWO BIT POSITIONS
 11231					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11232					;TEST MQ SHIFT LOGIC GATES
 11233					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11234					;IS TESTED.
 11235					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11236					;OTHER BIT IS A ONE AFTER ROTATING
 11237					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11238
 11239			005602		SN=SN+1
 11240			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11241						IFE	ZZ,<ZZ=400000>
 11242			040000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11243	036643	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11244	036644	205 07 0 00 200000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11245						IFG	<ZZ-2,>,<
 11246	036645	205 05 0 00 040000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11247						IFE	<ZZ-2>,<
 11248						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11249						IFE	<ZZ-1>,<
 11250						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11251	036646	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11252	036647	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11253	036650	004 07 0 00 005602 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11254	036651	321 10 0 00 036643 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11255
 11256					;TEST ROTC RIGHT TWO BIT POSITIONS
 11257					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11258					;TEST MQ SHIFT LOGIC GATES
 11259					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11260					;IS TESTED.
 11261					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11262					;OTHER BIT IS A ONE AFTER ROTATING
 11263					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11264
 11265			005603		SN=SN+1
 11266			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11267						IFE	ZZ,<ZZ=400000>
 11268			020000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11269	036652	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11270	036653	205 07 0 00 100000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11271						IFG	<ZZ-2,>,<
 11272	036654	205 05 0 00 020000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11273						IFE	<ZZ-2>,<
 11274						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11275						IFE	<ZZ-1>,<
 11276						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11277	036655	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11278	036656	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11279	036657	004 07 0 00 005603 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11280	036660	321 10 0 00 036652 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11281
 11282					;TEST ROTC RIGHT TWO BIT POSITIONS
 11283					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0240

 11284					;TEST MQ SHIFT LOGIC GATES
 11285					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11286					;IS TESTED.
 11287					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11288					;OTHER BIT IS A ONE AFTER ROTATING
 11289					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11290
 11291			005604		SN=SN+1
 11292			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11293						IFE	ZZ,<ZZ=400000>
 11294			010000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11295	036661	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11296	036662	205 07 0 00 040000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11297						IFG	<ZZ-2,>,<
 11298	036663	205 05 0 00 010000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11299						IFE	<ZZ-2>,<
 11300						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11301						IFE	<ZZ-1>,<
 11302						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11303	036664	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11304	036665	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11305	036666	004 07 0 00 005604 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11306	036667	321 10 0 00 036661 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11307
 11308					;TEST ROTC RIGHT TWO BIT POSITIONS
 11309					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11310					;TEST MQ SHIFT LOGIC GATES
 11311					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11312					;IS TESTED.
 11313					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11314					;OTHER BIT IS A ONE AFTER ROTATING
 11315					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11316
 11317			005605		SN=SN+1
 11318			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11319						IFE	ZZ,<ZZ=400000>
 11320			004000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11321	036670	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11322	036671	205 07 0 00 020000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11323						IFG	<ZZ-2,>,<
 11324	036672	205 05 0 00 004000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11325						IFE	<ZZ-2>,<
 11326						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11327						IFE	<ZZ-1>,<
 11328						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11329	036673	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11330	036674	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11331	036675	004 07 0 00 005605 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11332	036676	321 10 0 00 036670 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11333
 11334					;TEST ROTC RIGHT TWO BIT POSITIONS
 11335					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11336					;TEST MQ SHIFT LOGIC GATES
 11337					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11338					;IS TESTED.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0241

 11339					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11340					;OTHER BIT IS A ONE AFTER ROTATING
 11341					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11342
 11343			005606		SN=SN+1
 11344			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11345						IFE	ZZ,<ZZ=400000>
 11346			002000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11347	036677	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11348	036700	205 07 0 00 010000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11349						IFG	<ZZ-2,>,<
 11350	036701	205 05 0 00 002000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11351						IFE	<ZZ-2>,<
 11352						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11353						IFE	<ZZ-1>,<
 11354						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11355	036702	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11356	036703	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11357	036704	004 07 0 00 005606 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11358	036705	321 10 0 00 036677 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11359
 11360					;TEST ROTC RIGHT TWO BIT POSITIONS
 11361					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11362					;TEST MQ SHIFT LOGIC GATES
 11363					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11364					;IS TESTED.
 11365					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11366					;OTHER BIT IS A ONE AFTER ROTATING
 11367					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11368
 11369			005607		SN=SN+1
 11370			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11371						IFE	ZZ,<ZZ=400000>
 11372			001000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11373	036706	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11374	036707	205 07 0 00 004000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11375						IFG	<ZZ-2,>,<
 11376	036710	205 05 0 00 001000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11377						IFE	<ZZ-2>,<
 11378						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11379						IFE	<ZZ-1>,<
 11380						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11381	036711	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11382	036712	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11383	036713	004 07 0 00 005607 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11384	036714	321 10 0 00 036706 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11385
 11386					;TEST ROTC RIGHT TWO BIT POSITIONS
 11387					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11388					;TEST MQ SHIFT LOGIC GATES
 11389					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11390					;IS TESTED.
 11391					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11392					;OTHER BIT IS A ONE AFTER ROTATING
 11393					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0242

 11394
 11395			005610		SN=SN+1
 11396			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11397						IFE	ZZ,<ZZ=400000>
 11398			000400			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11399	036715	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11400	036716	205 07 0 00 002000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11401						IFG	<ZZ-2,>,<
 11402	036717	205 05 0 00 000400 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11403						IFE	<ZZ-2>,<
 11404						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11405						IFE	<ZZ-1>,<
 11406						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11407	036720	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11408	036721	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11409	036722	004 07 0 00 005610 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11410	036723	321 10 0 00 036715 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11411
 11412					;TEST ROTC RIGHT TWO BIT POSITIONS
 11413					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11414					;TEST MQ SHIFT LOGIC GATES
 11415					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11416					;IS TESTED.
 11417					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11418					;OTHER BIT IS A ONE AFTER ROTATING
 11419					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11420
 11421			005611		SN=SN+1
 11422			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11423						IFE	ZZ,<ZZ=400000>
 11424			000200			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11425	036724	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11426	036725	205 07 0 00 001000 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11427						IFG	<ZZ-2,>,<
 11428	036726	205 05 0 00 000200 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11429						IFE	<ZZ-2>,<
 11430						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11431						IFE	<ZZ-1>,<
 11432						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11433	036727	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11434	036730	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11435	036731	004 07 0 00 005611 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11436	036732	321 10 0 00 036724 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11437
 11438					;TEST ROTC RIGHT TWO BIT POSITIONS
 11439					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11440					;TEST MQ SHIFT LOGIC GATES
 11441					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11442					;IS TESTED.
 11443					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11444					;OTHER BIT IS A ONE AFTER ROTATING
 11445					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11446
 11447			005612		SN=SN+1
 11448			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0243

 11449						IFE	ZZ,<ZZ=400000>
 11450			000100			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11451	036733	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11452	036734	205 07 0 00 000400 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11453						IFG	<ZZ-2,>,<
 11454	036735	205 05 0 00 000100 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11455						IFE	<ZZ-2>,<
 11456						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11457						IFE	<ZZ-1>,<
 11458						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11459	036736	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11460	036737	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11461	036740	004 07 0 00 005612 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11462	036741	321 10 0 00 036733 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11463
 11464					;TEST ROTC RIGHT TWO BIT POSITIONS
 11465					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11466					;TEST MQ SHIFT LOGIC GATES
 11467					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11468					;IS TESTED.
 11469					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11470					;OTHER BIT IS A ONE AFTER ROTATING
 11471					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11472
 11473			005613		SN=SN+1
 11474			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11475						IFE	ZZ,<ZZ=400000>
 11476			000040			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11477	036742	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11478	036743	205 07 0 00 000200 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11479						IFG	<ZZ-2,>,<
 11480	036744	205 05 0 00 000040 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11481						IFE	<ZZ-2>,<
 11482						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11483						IFE	<ZZ-1>,<
 11484						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11485	036745	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11486	036746	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11487	036747	004 07 0 00 005613 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11488	036750	321 10 0 00 036742 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11489
 11490					;TEST ROTC RIGHT TWO BIT POSITIONS
 11491					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11492					;TEST MQ SHIFT LOGIC GATES
 11493					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11494					;IS TESTED.
 11495					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11496					;OTHER BIT IS A ONE AFTER ROTATING
 11497					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11498
 11499			005614		SN=SN+1
 11500			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11501						IFE	ZZ,<ZZ=400000>
 11502			000020			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11503	036751	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0244

 11504	036752	205 07 0 00 000100 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11505						IFG	<ZZ-2,>,<
 11506	036753	205 05 0 00 000020 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11507						IFE	<ZZ-2>,<
 11508						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11509						IFE	<ZZ-1>,<
 11510						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11511	036754	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11512	036755	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11513	036756	004 07 0 00 005614 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11514	036757	321 10 0 00 036751 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11515
 11516					;TEST ROTC RIGHT TWO BIT POSITIONS
 11517					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11518					;TEST MQ SHIFT LOGIC GATES
 11519					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11520					;IS TESTED.
 11521					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11522					;OTHER BIT IS A ONE AFTER ROTATING
 11523					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11524
 11525			005615		SN=SN+1
 11526			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11527						IFE	ZZ,<ZZ=400000>
 11528			000010			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11529	036760	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11530	036761	205 07 0 00 000040 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11531						IFG	<ZZ-2,>,<
 11532	036762	205 05 0 00 000010 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11533						IFE	<ZZ-2>,<
 11534						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11535						IFE	<ZZ-1>,<
 11536						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11537	036763	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11538	036764	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11539	036765	004 07 0 00 005615 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11540	036766	321 10 0 00 036760 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11541
 11542					;TEST ROTC RIGHT TWO BIT POSITIONS
 11543					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11544					;TEST MQ SHIFT LOGIC GATES
 11545					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11546					;IS TESTED.
 11547					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11548					;OTHER BIT IS A ONE AFTER ROTATING
 11549					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11550
 11551			005616		SN=SN+1
 11552			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11553						IFE	ZZ,<ZZ=400000>
 11554			000004			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11555	036767	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11556	036770	205 07 0 00 000020 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11557						IFG	<ZZ-2,>,<
 11558	036771	205 05 0 00 000004 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0245

 11559						IFE	<ZZ-2>,<
 11560						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11561						IFE	<ZZ-1>,<
 11562						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11563	036772	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11564	036773	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11565	036774	004 07 0 00 005616 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11566	036775	321 10 0 00 036767 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11567
 11568					;TEST ROTC RIGHT TWO BIT POSITIONS
 11569					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11570					;TEST MQ SHIFT LOGIC GATES
 11571					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11572					;IS TESTED.
 11573					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11574					;OTHER BIT IS A ONE AFTER ROTATING
 11575					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11576
 11577			005617		SN=SN+1
 11578			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11579						IFE	ZZ,<ZZ=400000>
 11580			000002			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11581	036776	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11582	036777	205 07 0 00 000010 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11583						IFG	<ZZ-2,>,<
 11584	037000	205 05 0 00 000002 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11585						IFE	<ZZ-2>,<
 11586						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11587						IFE	<ZZ-1>,<
 11588						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11589	037001	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11590	037002	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11591	037003	004 07 0 00 005617 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11592	037004	321 10 0 00 036776 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11593
 11594					;TEST ROTC RIGHT TWO BIT POSITIONS
 11595					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11596					;TEST MQ SHIFT LOGIC GATES
 11597					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11598					;IS TESTED.
 11599					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11600					;OTHER BIT IS A ONE AFTER ROTATING
 11601					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11602
 11603			005620		SN=SN+1
 11604			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11605						IFE	ZZ,<ZZ=400000>
 11606			000001			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11607	037005	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11608	037006	205 07 0 00 000004 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11609						IFG	<ZZ-2,>,<
 11610	037007	205 05 0 00 000001 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11611						IFE	<ZZ-2>,<
 11612						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11613						IFE	<ZZ-1>,<
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0246

 11614						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11615	037010	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11616	037011	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11617	037012	004 07 0 00 005620 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11618	037013	321 10 0 00 037005 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11619
 11620					;TEST ROTC RIGHT TWO BIT POSITIONS
 11621					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11622					;TEST MQ SHIFT LOGIC GATES
 11623					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11624					;IS TESTED.
 11625					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11626					;OTHER BIT IS A ONE AFTER ROTATING
 11627					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11628
 11629			005621		SN=SN+1
 11630			000002			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11631						IFE	ZZ,<ZZ=400000>
 11632			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11633	037014	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11634	037015	205 07 0 00 000002 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11635						IFG	<ZZ-2,>,<
 11636						MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11637						IFE	<ZZ-2>,<
 11638	037016	201 05 0 00 400000 		MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11639						IFE	<ZZ-1>,<
 11640						MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11641	037017	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11642	037020	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11643	037021	004 07 0 00 005621 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11644	037022	321 10 0 00 037014 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11645
 11646					;TEST ROTC RIGHT TWO BIT POSITIONS
 11647					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11648					;TEST MQ SHIFT LOGIC GATES
 11649					;AC,AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11650					;IS TESTED.
 11651					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11652					;OTHER BIT IS A ONE AFTER ROTATING
 11653					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11654
 11655			005622		SN=SN+1
 11656			000001			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11657						IFE	ZZ,<ZZ=400000>
 11658			000000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11659	037023	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11660	037024	205 07 0 00 000001 		MOVSI	AC+1,ZZ		;SET BIT (N) OF AC+1 LEFT
 11661						IFG	<ZZ-2,>,<
 11662	037025	205 05 0 00 000000 		MOVSI	AC-1,YY		;SETUP FOR COMPARISON>
 11663						IFE	<ZZ-2>,<
 11664						MOVEI	AC-1,400000	;SETUP FOR COMPARISON>
 11665						IFE	<ZZ-1>,<
 11666	037026	201 05 0 00 200000 		MOVEI	AC-1,200000	;SETUP FOR COMPARISON>
 11667	037027	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11668	037030	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0247

 11669	037031	004 07 0 00 005622 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11670	037032	321 10 0 00 037024 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11671
 11672					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0248

 11673			000000			ZZ=0
 11674
 11675							;TEST AC+1 RIGHT HALF<
 11676						REPEAT	^D16,<;TEST ROTC RIGHT TWO BIT POSITIONS
 11677					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11678					;TEST MQ SHIFT LOGIC GATES
 11679					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11680					;IS TESTED.
 11681					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11682					;OTHER BIT IS A ONE AFTER ROTATING
 11683					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11684
 11685					SN=SN+1
 11686						ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11687						IFE	ZZ,<ZZ=400000>
 11688						YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11689						SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11690						MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11691
 11692						MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11693						ROTC	AC,-2		;*ROTATE RIGHT TWO
 11694						CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11695						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11696						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11697					>
 11698					;TEST ROTC RIGHT TWO BIT POSITIONS
 11699					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11700					;TEST MQ SHIFT LOGIC GATES
 11701					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11702					;IS TESTED.
 11703					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11704					;OTHER BIT IS A ONE AFTER ROTATING
 11705					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11706
 11707			005623		SN=SN+1
 11708			000000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11709			400000			IFE	ZZ,<ZZ=400000>
 11710			100000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11711	037033	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11712	037034	201 07 0 00 400000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11713
 11714	037035	201 05 0 00 100000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11715	037036	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11716	037037	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11717	037040	004 07 0 00 005623 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11718	037041	321 10 0 00 037033 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11719
 11720					;TEST ROTC RIGHT TWO BIT POSITIONS
 11721					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11722					;TEST MQ SHIFT LOGIC GATES
 11723					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11724					;IS TESTED.
 11725					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11726					;OTHER BIT IS A ONE AFTER ROTATING
 11727					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0249

 11728
 11729			005624		SN=SN+1
 11730			200000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11731						IFE	ZZ,<ZZ=400000>
 11732			040000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11733	037042	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11734	037043	201 07 0 00 200000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11735
 11736	037044	201 05 0 00 040000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11737	037045	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11738	037046	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11739	037047	004 07 0 00 005624 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11740	037050	321 10 0 00 037042 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11741
 11742					;TEST ROTC RIGHT TWO BIT POSITIONS
 11743					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11744					;TEST MQ SHIFT LOGIC GATES
 11745					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11746					;IS TESTED.
 11747					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11748					;OTHER BIT IS A ONE AFTER ROTATING
 11749					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11750
 11751			005625		SN=SN+1
 11752			100000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11753						IFE	ZZ,<ZZ=400000>
 11754			020000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11755	037051	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11756	037052	201 07 0 00 100000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11757
 11758	037053	201 05 0 00 020000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11759	037054	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11760	037055	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11761	037056	004 07 0 00 005625 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11762	037057	321 10 0 00 037051 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11763
 11764					;TEST ROTC RIGHT TWO BIT POSITIONS
 11765					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11766					;TEST MQ SHIFT LOGIC GATES
 11767					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11768					;IS TESTED.
 11769					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11770					;OTHER BIT IS A ONE AFTER ROTATING
 11771					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11772
 11773			005626		SN=SN+1
 11774			040000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11775						IFE	ZZ,<ZZ=400000>
 11776			010000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11777	037060	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11778	037061	201 07 0 00 040000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11779
 11780	037062	201 05 0 00 010000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11781	037063	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11782	037064	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0250

 11783	037065	004 07 0 00 005626 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11784	037066	321 10 0 00 037060 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11785
 11786					;TEST ROTC RIGHT TWO BIT POSITIONS
 11787					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11788					;TEST MQ SHIFT LOGIC GATES
 11789					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11790					;IS TESTED.
 11791					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11792					;OTHER BIT IS A ONE AFTER ROTATING
 11793					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11794
 11795			005627		SN=SN+1
 11796			020000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11797						IFE	ZZ,<ZZ=400000>
 11798			004000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11799	037067	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11800	037070	201 07 0 00 020000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11801
 11802	037071	201 05 0 00 004000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11803	037072	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11804	037073	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11805	037074	004 07 0 00 005627 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11806	037075	321 10 0 00 037067 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11807
 11808					;TEST ROTC RIGHT TWO BIT POSITIONS
 11809					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11810					;TEST MQ SHIFT LOGIC GATES
 11811					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11812					;IS TESTED.
 11813					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11814					;OTHER BIT IS A ONE AFTER ROTATING
 11815					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11816
 11817			005630		SN=SN+1
 11818			010000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11819						IFE	ZZ,<ZZ=400000>
 11820			002000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11821	037076	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11822	037077	201 07 0 00 010000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11823
 11824	037100	201 05 0 00 002000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11825	037101	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11826	037102	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11827	037103	004 07 0 00 005630 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11828	037104	321 10 0 00 037076 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11829
 11830					;TEST ROTC RIGHT TWO BIT POSITIONS
 11831					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11832					;TEST MQ SHIFT LOGIC GATES
 11833					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11834					;IS TESTED.
 11835					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11836					;OTHER BIT IS A ONE AFTER ROTATING
 11837					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0251

 11838
 11839			005631		SN=SN+1
 11840			004000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11841						IFE	ZZ,<ZZ=400000>
 11842			001000			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11843	037105	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11844	037106	201 07 0 00 004000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11845
 11846	037107	201 05 0 00 001000 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11847	037110	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11848	037111	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11849	037112	004 07 0 00 005631 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11850	037113	321 10 0 00 037105 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11851
 11852					;TEST ROTC RIGHT TWO BIT POSITIONS
 11853					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11854					;TEST MQ SHIFT LOGIC GATES
 11855					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11856					;IS TESTED.
 11857					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11858					;OTHER BIT IS A ONE AFTER ROTATING
 11859					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11860
 11861			005632		SN=SN+1
 11862			002000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11863						IFE	ZZ,<ZZ=400000>
 11864			000400			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11865	037114	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11866	037115	201 07 0 00 002000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11867
 11868	037116	201 05 0 00 000400 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11869	037117	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11870	037120	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11871	037121	004 07 0 00 005632 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11872	037122	321 10 0 00 037114 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11873
 11874					;TEST ROTC RIGHT TWO BIT POSITIONS
 11875					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11876					;TEST MQ SHIFT LOGIC GATES
 11877					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11878					;IS TESTED.
 11879					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11880					;OTHER BIT IS A ONE AFTER ROTATING
 11881					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11882
 11883			005633		SN=SN+1
 11884			001000			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11885						IFE	ZZ,<ZZ=400000>
 11886			000200			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11887	037123	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11888	037124	201 07 0 00 001000 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11889
 11890	037125	201 05 0 00 000200 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11891	037126	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11892	037127	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0252

 11893	037130	004 07 0 00 005633 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11894	037131	321 10 0 00 037123 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11895
 11896					;TEST ROTC RIGHT TWO BIT POSITIONS
 11897					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11898					;TEST MQ SHIFT LOGIC GATES
 11899					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11900					;IS TESTED.
 11901					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11902					;OTHER BIT IS A ONE AFTER ROTATING
 11903					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11904
 11905			005634		SN=SN+1
 11906			000400			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11907						IFE	ZZ,<ZZ=400000>
 11908			000100			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11909	037132	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11910	037133	201 07 0 00 000400 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11911
 11912	037134	201 05 0 00 000100 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11913	037135	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11914	037136	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11915	037137	004 07 0 00 005634 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11916	037140	321 10 0 00 037132 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11917
 11918					;TEST ROTC RIGHT TWO BIT POSITIONS
 11919					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11920					;TEST MQ SHIFT LOGIC GATES
 11921					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11922					;IS TESTED.
 11923					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11924					;OTHER BIT IS A ONE AFTER ROTATING
 11925					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11926
 11927			005635		SN=SN+1
 11928			000200			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11929						IFE	ZZ,<ZZ=400000>
 11930			000040			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11931	037141	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11932	037142	201 07 0 00 000200 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11933
 11934	037143	201 05 0 00 000040 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11935	037144	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11936	037145	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11937	037146	004 07 0 00 005635 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11938	037147	321 10 0 00 037141 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11939
 11940					;TEST ROTC RIGHT TWO BIT POSITIONS
 11941					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11942					;TEST MQ SHIFT LOGIC GATES
 11943					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11944					;IS TESTED.
 11945					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11946					;OTHER BIT IS A ONE AFTER ROTATING
 11947					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0253

 11948
 11949			005636		SN=SN+1
 11950			000100			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11951						IFE	ZZ,<ZZ=400000>
 11952			000020			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11953	037150	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11954	037151	201 07 0 00 000100 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11955
 11956	037152	201 05 0 00 000020 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11957	037153	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11958	037154	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11959	037155	004 07 0 00 005636 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11960	037156	321 10 0 00 037150 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11961
 11962					;TEST ROTC RIGHT TWO BIT POSITIONS
 11963					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11964					;TEST MQ SHIFT LOGIC GATES
 11965					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11966					;IS TESTED.
 11967					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11968					;OTHER BIT IS A ONE AFTER ROTATING
 11969					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11970
 11971			005637		SN=SN+1
 11972			000040			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11973						IFE	ZZ,<ZZ=400000>
 11974			000010			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11975	037157	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11976	037160	201 07 0 00 000040 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11977
 11978	037161	201 05 0 00 000010 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 11979	037162	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 11980	037163	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 11981	037164	004 07 0 00 005637 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 11982	037165	321 10 0 00 037157 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 11983
 11984					;TEST ROTC RIGHT TWO BIT POSITIONS
 11985					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 11986					;TEST MQ SHIFT LOGIC GATES
 11987					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 11988					;IS TESTED.
 11989					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 11990					;OTHER BIT IS A ONE AFTER ROTATING
 11991					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 11992
 11993			005640		SN=SN+1
 11994			000020			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 11995						IFE	ZZ,<ZZ=400000>
 11996			000004			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 11997	037166	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 11998	037167	201 07 0 00 000020 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 11999
 12000	037170	201 05 0 00 000004 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 12001	037171	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12002	037172	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 26-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0254

 12003	037173	004 07 0 00 005640 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12004	037174	321 10 0 00 037166 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12005
 12006					;TEST ROTC RIGHT TWO BIT POSITIONS
 12007					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 12008					;TEST MQ SHIFT LOGIC GATES
 12009					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12010					;IS TESTED.
 12011					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 12012					;OTHER BIT IS A ONE AFTER ROTATING
 12013					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 12014
 12015			005641		SN=SN+1
 12016			000010			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 12017						IFE	ZZ,<ZZ=400000>
 12018			000002			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 12019	037175	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 12020	037176	201 07 0 00 000010 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 12021
 12022	037177	201 05 0 00 000002 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 12023	037200	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12024	037201	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 12025	037202	004 07 0 00 005641 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12026	037203	321 10 0 00 037175 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12027
 12028					;TEST ROTC RIGHT TWO BIT POSITIONS
 12029					;TEST ABILITY TO ROTATE A ONE THROUGH THE 36 BITS OF THE MQ
 12030					;TEST MQ SHIFT LOGIC GATES
 12031					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12032					;IS TESTED.
 12033					;AN ERROR OCCURS IF THE TESTED BIT IS ZERO AND/OR ANY
 12034					;OTHER BIT IS A ONE AFTER ROTATING
 12035					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ONE THROUGH ALL 36 BITS OF THE MQ
 12036
 12037			005642		SN=SN+1
 12038			000004			ZZ=ZZ/2			;SELECTED BIT BEFORE ROTATION
 12039						IFE	ZZ,<ZZ=400000>
 12040			000001			YY=ZZ/4			;SELECTED BIT AFTER ROTATION
 12041	037204	400 06 0 00 000000 		SETZ	AC,		;INITIALIZE AC TO ALL ZEROS
 12042	037205	201 07 0 00 000004 		MOVEI	AC+1,ZZ		;SET BIT (N) OF AC+1 RIGHT
 12043
 12044	037206	201 05 0 00 000001 		MOVEI	AC-1,YY		;SETUP FOR COMPARISON
 12045	037207	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12046	037210	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ONE
 12047	037211	004 07 0 00 005642 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12048	037212	321 10 0 00 037204 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12049
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0255

 12050			005700		SN=5700
 12051			000001			ZZ=1
 12052
 12053					 		;TEST AC+1 LEFT HALF <
 12054					E5700:	REPEAT ^D18,<;TEST ROTC RIGHT TWO BIT POSITIONS
 12055					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12056					;TEST MQ SHIFT LOGIC GATES
 12057					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12058					;IS TESTED.
 12059					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12060					;OTHER BIT IS A ZERO AFTER ROTATING
 12061					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12062
 12063					SN=SN+1
 12064
 12065						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12066						IFE<ZZ>,<ZZ=777777377777>
 12067						YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12068						SETOM	AC		;INITIALIZE AC TO ALL ONES
 12069						HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12070						IFG	<ZZ-777775>&777777,<
 12071						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12072						IFE	<ZZ-777775>&777777,<
 12073						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12074						IFE	<ZZ-777776>&777777,<
 12075						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12076						ROTC	AC,-2		;*ROTATE RIGHT TWO
 12077						CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12078						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12079						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12080					>
 12081					;TEST ROTC RIGHT TWO BIT POSITIONS
 12082					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12083					;TEST MQ SHIFT LOGIC GATES
 12084					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12085					;IS TESTED.
 12086					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12087					;OTHER BIT IS A ZERO AFTER ROTATING
 12088					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12089
 12090			005701		SN=SN+1
 12091
 12092			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12093		777777	377777			IFE<ZZ>,<ZZ=777777377777>
 12094			677777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12095	037213	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12096	037214	525 07 0 00 377777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12097						IFG	<ZZ-777775>&777777,<
 12098	037215	525 05 0 00 677777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12099						IFE	<ZZ-777775>&777777,<
 12100						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12101						IFE	<ZZ-777776>&777777,<
 12102						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12103	037216	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12104	037217	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0256

 12105	037220	004 07 0 00 005701 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12106	037221	321 10 0 00 037213 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12107
 12108					;TEST ROTC RIGHT TWO BIT POSITIONS
 12109					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12110					;TEST MQ SHIFT LOGIC GATES
 12111					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12112					;IS TESTED.
 12113					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12114					;OTHER BIT IS A ZERO AFTER ROTATING
 12115					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12116
 12117			005702		SN=SN+1
 12118
 12119		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12120						IFE<ZZ>,<ZZ=777777377777>
 12121			737777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12122	037222	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12123	037223	525 07 0 00 577777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12124						IFG	<ZZ-777775>&777777,<
 12125	037224	525 05 0 00 737777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12126						IFE	<ZZ-777775>&777777,<
 12127						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12128						IFE	<ZZ-777776>&777777,<
 12129						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12130	037225	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12131	037226	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12132	037227	004 07 0 00 005702 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12133	037230	321 10 0 00 037222 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12134
 12135					;TEST ROTC RIGHT TWO BIT POSITIONS
 12136					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12137					;TEST MQ SHIFT LOGIC GATES
 12138					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12139					;IS TESTED.
 12140					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12141					;OTHER BIT IS A ZERO AFTER ROTATING
 12142					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12143
 12144			005703		SN=SN+1
 12145
 12146		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12147						IFE<ZZ>,<ZZ=777777377777>
 12148			757777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12149	037231	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12150	037232	525 07 0 00 677777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12151						IFG	<ZZ-777775>&777777,<
 12152	037233	525 05 0 00 757777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12153						IFE	<ZZ-777775>&777777,<
 12154						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12155						IFE	<ZZ-777776>&777777,<
 12156						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12157	037234	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12158	037235	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12159	037236	004 07 0 00 005703 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0257

 12160	037237	321 10 0 00 037231 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12161
 12162					;TEST ROTC RIGHT TWO BIT POSITIONS
 12163					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12164					;TEST MQ SHIFT LOGIC GATES
 12165					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12166					;IS TESTED.
 12167					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12168					;OTHER BIT IS A ZERO AFTER ROTATING
 12169					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12170
 12171			005704		SN=SN+1
 12172
 12173		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12174						IFE<ZZ>,<ZZ=777777377777>
 12175			767777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12176	037240	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12177	037241	525 07 0 00 737777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12178						IFG	<ZZ-777775>&777777,<
 12179	037242	525 05 0 00 767777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12180						IFE	<ZZ-777775>&777777,<
 12181						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12182						IFE	<ZZ-777776>&777777,<
 12183						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12184	037243	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12185	037244	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12186	037245	004 07 0 00 005704 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12187	037246	321 10 0 00 037240 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12188
 12189					;TEST ROTC RIGHT TWO BIT POSITIONS
 12190					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12191					;TEST MQ SHIFT LOGIC GATES
 12192					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12193					;IS TESTED.
 12194					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12195					;OTHER BIT IS A ZERO AFTER ROTATING
 12196					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12197
 12198			005705		SN=SN+1
 12199
 12200		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12201						IFE<ZZ>,<ZZ=777777377777>
 12202			773777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12203	037247	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12204	037250	525 07 0 00 757777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12205						IFG	<ZZ-777775>&777777,<
 12206	037251	525 05 0 00 773777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12207						IFE	<ZZ-777775>&777777,<
 12208						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12209						IFE	<ZZ-777776>&777777,<
 12210						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12211	037252	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12212	037253	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12213	037254	004 07 0 00 005705 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12214	037255	321 10 0 00 037247 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0258

 12215
 12216					;TEST ROTC RIGHT TWO BIT POSITIONS
 12217					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12218					;TEST MQ SHIFT LOGIC GATES
 12219					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12220					;IS TESTED.
 12221					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12222					;OTHER BIT IS A ZERO AFTER ROTATING
 12223					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12224
 12225			005706		SN=SN+1
 12226
 12227		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12228						IFE<ZZ>,<ZZ=777777377777>
 12229			775777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12230	037256	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12231	037257	525 07 0 00 767777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12232						IFG	<ZZ-777775>&777777,<
 12233	037260	525 05 0 00 775777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12234						IFE	<ZZ-777775>&777777,<
 12235						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12236						IFE	<ZZ-777776>&777777,<
 12237						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12238	037261	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12239	037262	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12240	037263	004 07 0 00 005706 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12241	037264	321 10 0 00 037256 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12242
 12243					;TEST ROTC RIGHT TWO BIT POSITIONS
 12244					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12245					;TEST MQ SHIFT LOGIC GATES
 12246					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12247					;IS TESTED.
 12248					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12249					;OTHER BIT IS A ZERO AFTER ROTATING
 12250					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12251
 12252			005707		SN=SN+1
 12253
 12254		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12255						IFE<ZZ>,<ZZ=777777377777>
 12256			776777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12257	037265	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12258	037266	525 07 0 00 773777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12259						IFG	<ZZ-777775>&777777,<
 12260	037267	525 05 0 00 776777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12261						IFE	<ZZ-777775>&777777,<
 12262						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12263						IFE	<ZZ-777776>&777777,<
 12264						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12265	037270	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12266	037271	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12267	037272	004 07 0 00 005707 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12268	037273	321 10 0 00 037265 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12269
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-4
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0259

 12270					;TEST ROTC RIGHT TWO BIT POSITIONS
 12271					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12272					;TEST MQ SHIFT LOGIC GATES
 12273					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12274					;IS TESTED.
 12275					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12276					;OTHER BIT IS A ZERO AFTER ROTATING
 12277					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12278
 12279			005710		SN=SN+1
 12280
 12281		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12282						IFE<ZZ>,<ZZ=777777377777>
 12283			777377			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12284	037274	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12285	037275	525 07 0 00 775777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12286						IFG	<ZZ-777775>&777777,<
 12287	037276	525 05 0 00 777377 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12288						IFE	<ZZ-777775>&777777,<
 12289						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12290						IFE	<ZZ-777776>&777777,<
 12291						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12292	037277	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12293	037300	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12294	037301	004 07 0 00 005710 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12295	037302	321 10 0 00 037274 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12296
 12297					;TEST ROTC RIGHT TWO BIT POSITIONS
 12298					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12299					;TEST MQ SHIFT LOGIC GATES
 12300					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12301					;IS TESTED.
 12302					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12303					;OTHER BIT IS A ZERO AFTER ROTATING
 12304					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12305
 12306			005711		SN=SN+1
 12307
 12308		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12309						IFE<ZZ>,<ZZ=777777377777>
 12310			777577			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12311	037303	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12312	037304	525 07 0 00 776777 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12313						IFG	<ZZ-777775>&777777,<
 12314	037305	525 05 0 00 777577 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12315						IFE	<ZZ-777775>&777777,<
 12316						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12317						IFE	<ZZ-777776>&777777,<
 12318						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12319	037306	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12320	037307	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12321	037310	004 07 0 00 005711 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12322	037311	321 10 0 00 037303 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12323
 12324					;TEST ROTC RIGHT TWO BIT POSITIONS
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-5
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0260

 12325					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12326					;TEST MQ SHIFT LOGIC GATES
 12327					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12328					;IS TESTED.
 12329					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12330					;OTHER BIT IS A ZERO AFTER ROTATING
 12331					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12332
 12333			005712		SN=SN+1
 12334
 12335		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12336						IFE<ZZ>,<ZZ=777777377777>
 12337			777677			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12338	037312	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12339	037313	525 07 0 00 777377 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12340						IFG	<ZZ-777775>&777777,<
 12341	037314	525 05 0 00 777677 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12342						IFE	<ZZ-777775>&777777,<
 12343						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12344						IFE	<ZZ-777776>&777777,<
 12345						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12346	037315	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12347	037316	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12348	037317	004 07 0 00 005712 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12349	037320	321 10 0 00 037312 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12350
 12351					;TEST ROTC RIGHT TWO BIT POSITIONS
 12352					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12353					;TEST MQ SHIFT LOGIC GATES
 12354					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12355					;IS TESTED.
 12356					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12357					;OTHER BIT IS A ZERO AFTER ROTATING
 12358					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12359
 12360			005713		SN=SN+1
 12361
 12362		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12363						IFE<ZZ>,<ZZ=777777377777>
 12364			777737			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12365	037321	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12366	037322	525 07 0 00 777577 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12367						IFG	<ZZ-777775>&777777,<
 12368	037323	525 05 0 00 777737 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12369						IFE	<ZZ-777775>&777777,<
 12370						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12371						IFE	<ZZ-777776>&777777,<
 12372						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12373	037324	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12374	037325	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12375	037326	004 07 0 00 005713 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12376	037327	321 10 0 00 037321 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12377
 12378					;TEST ROTC RIGHT TWO BIT POSITIONS
 12379					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-6
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0261

 12380					;TEST MQ SHIFT LOGIC GATES
 12381					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12382					;IS TESTED.
 12383					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12384					;OTHER BIT IS A ZERO AFTER ROTATING
 12385					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12386
 12387			005714		SN=SN+1
 12388
 12389		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12390						IFE<ZZ>,<ZZ=777777377777>
 12391			777757			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12392	037330	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12393	037331	525 07 0 00 777677 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12394						IFG	<ZZ-777775>&777777,<
 12395	037332	525 05 0 00 777757 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12396						IFE	<ZZ-777775>&777777,<
 12397						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12398						IFE	<ZZ-777776>&777777,<
 12399						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12400	037333	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12401	037334	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12402	037335	004 07 0 00 005714 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12403	037336	321 10 0 00 037330 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12404
 12405					;TEST ROTC RIGHT TWO BIT POSITIONS
 12406					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12407					;TEST MQ SHIFT LOGIC GATES
 12408					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12409					;IS TESTED.
 12410					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12411					;OTHER BIT IS A ZERO AFTER ROTATING
 12412					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12413
 12414			005715		SN=SN+1
 12415
 12416		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12417						IFE<ZZ>,<ZZ=777777377777>
 12418			777767			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12419	037337	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12420	037340	525 07 0 00 777737 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12421						IFG	<ZZ-777775>&777777,<
 12422	037341	525 05 0 00 777767 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12423						IFE	<ZZ-777775>&777777,<
 12424						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12425						IFE	<ZZ-777776>&777777,<
 12426						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12427	037342	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12428	037343	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12429	037344	004 07 0 00 005715 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12430	037345	321 10 0 00 037337 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12431
 12432					;TEST ROTC RIGHT TWO BIT POSITIONS
 12433					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12434					;TEST MQ SHIFT LOGIC GATES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-7
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0262

 12435					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12436					;IS TESTED.
 12437					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12438					;OTHER BIT IS A ZERO AFTER ROTATING
 12439					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12440
 12441			005716		SN=SN+1
 12442
 12443		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12444						IFE<ZZ>,<ZZ=777777377777>
 12445			777773			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12446	037346	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12447	037347	525 07 0 00 777757 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12448						IFG	<ZZ-777775>&777777,<
 12449	037350	525 05 0 00 777773 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12450						IFE	<ZZ-777775>&777777,<
 12451						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12452						IFE	<ZZ-777776>&777777,<
 12453						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12454	037351	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12455	037352	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12456	037353	004 07 0 00 005716 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12457	037354	321 10 0 00 037346 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12458
 12459					;TEST ROTC RIGHT TWO BIT POSITIONS
 12460					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12461					;TEST MQ SHIFT LOGIC GATES
 12462					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12463					;IS TESTED.
 12464					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12465					;OTHER BIT IS A ZERO AFTER ROTATING
 12466					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12467
 12468			005717		SN=SN+1
 12469
 12470		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12471						IFE<ZZ>,<ZZ=777777377777>
 12472			777775			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12473	037355	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12474	037356	525 07 0 00 777767 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12475						IFG	<ZZ-777775>&777777,<
 12476	037357	525 05 0 00 777775 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12477						IFE	<ZZ-777775>&777777,<
 12478						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12479						IFE	<ZZ-777776>&777777,<
 12480						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12481	037360	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12482	037361	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12483	037362	004 07 0 00 005717 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12484	037363	321 10 0 00 037355 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12485
 12486					;TEST ROTC RIGHT TWO BIT POSITIONS
 12487					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12488					;TEST MQ SHIFT LOGIC GATES
 12489					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-8
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0263

 12490					;IS TESTED.
 12491					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12492					;OTHER BIT IS A ZERO AFTER ROTATING
 12493					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12494
 12495			005720		SN=SN+1
 12496
 12497		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12498						IFE<ZZ>,<ZZ=777777377777>
 12499			777776			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12500	037364	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12501	037365	525 07 0 00 777773 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12502						IFG	<ZZ-777775>&777777,<
 12503	037366	525 05 0 00 777776 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12504						IFE	<ZZ-777775>&777777,<
 12505						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12506						IFE	<ZZ-777776>&777777,<
 12507						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12508	037367	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12509	037370	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12510	037371	004 07 0 00 005720 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12511	037372	321 10 0 00 037364 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12512
 12513					;TEST ROTC RIGHT TWO BIT POSITIONS
 12514					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12515					;TEST MQ SHIFT LOGIC GATES
 12516					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12517					;IS TESTED.
 12518					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12519					;OTHER BIT IS A ZERO AFTER ROTATING
 12520					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12521
 12522			005721		SN=SN+1
 12523
 12524		777777	777775			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12525						IFE<ZZ>,<ZZ=777777377777>
 12526			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12527	037373	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12528	037374	525 07 0 00 777775 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12529						IFG	<ZZ-777775>&777777,<
 12530						HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12531						IFE	<ZZ-777775>&777777,<
 12532	037375	561 05 0 00 377777 		HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12533						IFE	<ZZ-777776>&777777,<
 12534						HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12535	037376	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12536	037377	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12537	037400	004 07 0 00 005721 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12538	037401	321 10 0 00 037373 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12539
 12540					;TEST ROTC RIGHT TWO BIT POSITIONS
 12541					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12542					;TEST MQ SHIFT LOGIC GATES
 12543					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12544					;IS TESTED.
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-9
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0264

 12545					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12546					;OTHER BIT IS A ZERO AFTER ROTATING
 12547					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12548
 12549			005722		SN=SN+1
 12550
 12551		777777	777776			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12552						IFE<ZZ>,<ZZ=777777377777>
 12553			777777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12554	037402	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12555	037403	525 07 0 00 777776 		HRLOI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 LEFT
 12556						IFG	<ZZ-777775>&777777,<
 12557	037404	525 05 0 00 777777 		HRLOI	AC-1,YY		;SETUP FOR COMPARISON>
 12558						IFE	<ZZ-777775>&777777,<
 12559						HRROI	AC-1,377777	;SETUP FOR COMPARISON>
 12560						IFE	<ZZ-777776>&777777,<
 12561	037405	561 05 0 00 577777 		HRROI	AC-1,577777	;SETUP FOR COMPARISON>
 12562	037406	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12563	037407	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12564	037410	004 07 0 00 005722 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12565	037411	321 10 0 00 037403 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12566
 12567					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-10
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0265

 12568			000001			ZZ=1
 12569
 12570							;TEST AC+1 RIGHT HALF<
 12571						REPEAT ^D16,<;TEST ROTC RIGHT TWO BIT POSITIONS
 12572					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12573					;TEST MQ SHIFT LOGIC GATES
 12574					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12575					;IS TESTED.
 12576					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12577					;OTHER BIT IS A ZERO AFTER ROTATING
 12578					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12579
 12580					SN=SN+1
 12581						ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12582						IFE	<ZZ>,<ZZ=777777377777>
 12583						YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12584						SETOM	AC		;INITIALIZE AC TO ALL ONES
 12585						HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12586						HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12587						ROTC	AC,-2		;*ROTATE RIGHT TWO
 12588						CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12589						ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12590						JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12591					>
 12592					;TEST ROTC RIGHT TWO BIT POSITIONS
 12593					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12594					;TEST MQ SHIFT LOGIC GATES
 12595					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12596					;IS TESTED.
 12597					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12598					;OTHER BIT IS A ZERO AFTER ROTATING
 12599					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12600
 12601			005723		SN=SN+1
 12602			000000			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12603		777777	377777			IFE	<ZZ>,<ZZ=777777377777>
 12604			677777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12605	037412	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12606	037413	561 07 0 00 377777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12607	037414	561 05 0 00 677777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12608	037415	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12609	037416	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12610	037417	004 07 0 00 005723 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12611	037420	321 10 0 00 037412 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12612
 12613					;TEST ROTC RIGHT TWO BIT POSITIONS
 12614					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12615					;TEST MQ SHIFT LOGIC GATES
 12616					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12617					;IS TESTED.
 12618					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12619					;OTHER BIT IS A ZERO AFTER ROTATING
 12620					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12621
 12622			005724		SN=SN+1
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-11
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0266

 12623		777777	577777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12624						IFE	<ZZ>,<ZZ=777777377777>
 12625			737777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12626	037421	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12627	037422	561 07 0 00 577777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12628	037423	561 05 0 00 737777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12629	037424	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12630	037425	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12631	037426	004 07 0 00 005724 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12632	037427	321 10 0 00 037421 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12633
 12634					;TEST ROTC RIGHT TWO BIT POSITIONS
 12635					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12636					;TEST MQ SHIFT LOGIC GATES
 12637					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12638					;IS TESTED.
 12639					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12640					;OTHER BIT IS A ZERO AFTER ROTATING
 12641					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12642
 12643			005725		SN=SN+1
 12644		777777	677777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12645						IFE	<ZZ>,<ZZ=777777377777>
 12646			757777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12647	037430	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12648	037431	561 07 0 00 677777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12649	037432	561 05 0 00 757777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12650	037433	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12651	037434	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12652	037435	004 07 0 00 005725 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12653	037436	321 10 0 00 037430 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12654
 12655					;TEST ROTC RIGHT TWO BIT POSITIONS
 12656					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12657					;TEST MQ SHIFT LOGIC GATES
 12658					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12659					;IS TESTED.
 12660					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12661					;OTHER BIT IS A ZERO AFTER ROTATING
 12662					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12663
 12664			005726		SN=SN+1
 12665		777777	737777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12666						IFE	<ZZ>,<ZZ=777777377777>
 12667			767777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12668	037437	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12669	037440	561 07 0 00 737777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12670	037441	561 05 0 00 767777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12671	037442	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12672	037443	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12673	037444	004 07 0 00 005726 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12674	037445	321 10 0 00 037437 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12675
 12676					;TEST ROTC RIGHT TWO BIT POSITIONS
 12677					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-12
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0267

 12678					;TEST MQ SHIFT LOGIC GATES
 12679					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12680					;IS TESTED.
 12681					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12682					;OTHER BIT IS A ZERO AFTER ROTATING
 12683					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12684
 12685			005727		SN=SN+1
 12686		777777	757777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12687						IFE	<ZZ>,<ZZ=777777377777>
 12688			773777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12689	037446	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12690	037447	561 07 0 00 757777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12691	037450	561 05 0 00 773777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12692	037451	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12693	037452	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12694	037453	004 07 0 00 005727 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12695	037454	321 10 0 00 037446 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12696
 12697					;TEST ROTC RIGHT TWO BIT POSITIONS
 12698					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12699					;TEST MQ SHIFT LOGIC GATES
 12700					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12701					;IS TESTED.
 12702					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12703					;OTHER BIT IS A ZERO AFTER ROTATING
 12704					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12705
 12706			005730		SN=SN+1
 12707		777777	767777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12708						IFE	<ZZ>,<ZZ=777777377777>
 12709			775777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12710	037455	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12711	037456	561 07 0 00 767777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12712	037457	561 05 0 00 775777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12713	037460	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12714	037461	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12715	037462	004 07 0 00 005730 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12716	037463	321 10 0 00 037455 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12717
 12718					;TEST ROTC RIGHT TWO BIT POSITIONS
 12719					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12720					;TEST MQ SHIFT LOGIC GATES
 12721					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12722					;IS TESTED.
 12723					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12724					;OTHER BIT IS A ZERO AFTER ROTATING
 12725					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12726
 12727			005731		SN=SN+1
 12728		777777	773777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12729						IFE	<ZZ>,<ZZ=777777377777>
 12730			776777			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12731	037464	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12732	037465	561 07 0 00 773777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-13
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0268

 12733	037466	561 05 0 00 776777 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12734	037467	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12735	037470	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12736	037471	004 07 0 00 005731 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12737	037472	321 10 0 00 037464 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12738
 12739					;TEST ROTC RIGHT TWO BIT POSITIONS
 12740					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12741					;TEST MQ SHIFT LOGIC GATES
 12742					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12743					;IS TESTED.
 12744					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12745					;OTHER BIT IS A ZERO AFTER ROTATING
 12746					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12747
 12748			005732		SN=SN+1
 12749		777777	775777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12750						IFE	<ZZ>,<ZZ=777777377777>
 12751			777377			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12752	037473	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12753	037474	561 07 0 00 775777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12754	037475	561 05 0 00 777377 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12755	037476	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12756	037477	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12757	037500	004 07 0 00 005732 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12758	037501	321 10 0 00 037473 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12759
 12760					;TEST ROTC RIGHT TWO BIT POSITIONS
 12761					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12762					;TEST MQ SHIFT LOGIC GATES
 12763					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12764					;IS TESTED.
 12765					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12766					;OTHER BIT IS A ZERO AFTER ROTATING
 12767					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12768
 12769			005733		SN=SN+1
 12770		777777	776777			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12771						IFE	<ZZ>,<ZZ=777777377777>
 12772			777577			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12773	037502	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12774	037503	561 07 0 00 776777 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12775	037504	561 05 0 00 777577 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12776	037505	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12777	037506	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12778	037507	004 07 0 00 005733 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12779	037510	321 10 0 00 037502 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12780
 12781					;TEST ROTC RIGHT TWO BIT POSITIONS
 12782					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12783					;TEST MQ SHIFT LOGIC GATES
 12784					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12785					;IS TESTED.
 12786					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12787					;OTHER BIT IS A ZERO AFTER ROTATING
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-14
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0269

 12788					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12789
 12790			005734		SN=SN+1
 12791		777777	777377			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12792						IFE	<ZZ>,<ZZ=777777377777>
 12793			777677			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12794	037511	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12795	037512	561 07 0 00 777377 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12796	037513	561 05 0 00 777677 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12797	037514	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12798	037515	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12799	037516	004 07 0 00 005734 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12800	037517	321 10 0 00 037511 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12801
 12802					;TEST ROTC RIGHT TWO BIT POSITIONS
 12803					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12804					;TEST MQ SHIFT LOGIC GATES
 12805					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12806					;IS TESTED.
 12807					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12808					;OTHER BIT IS A ZERO AFTER ROTATING
 12809					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12810
 12811			005735		SN=SN+1
 12812		777777	777577			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12813						IFE	<ZZ>,<ZZ=777777377777>
 12814			777737			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12815	037520	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12816	037521	561 07 0 00 777577 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12817	037522	561 05 0 00 777737 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12818	037523	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12819	037524	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12820	037525	004 07 0 00 005735 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12821	037526	321 10 0 00 037520 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12822
 12823					;TEST ROTC RIGHT TWO BIT POSITIONS
 12824					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12825					;TEST MQ SHIFT LOGIC GATES
 12826					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12827					;IS TESTED.
 12828					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12829					;OTHER BIT IS A ZERO AFTER ROTATING
 12830					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12831
 12832			005736		SN=SN+1
 12833		777777	777677			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12834						IFE	<ZZ>,<ZZ=777777377777>
 12835			777757			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12836	037527	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12837	037530	561 07 0 00 777677 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12838	037531	561 05 0 00 777757 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12839	037532	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12840	037533	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12841	037534	004 07 0 00 005736 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12842	037535	321 10 0 00 037527 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-15
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0270

 12843
 12844					;TEST ROTC RIGHT TWO BIT POSITIONS
 12845					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12846					;TEST MQ SHIFT LOGIC GATES
 12847					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12848					;IS TESTED.
 12849					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12850					;OTHER BIT IS A ZERO AFTER ROTATING
 12851					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12852
 12853			005737		SN=SN+1
 12854		777777	777737			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12855						IFE	<ZZ>,<ZZ=777777377777>
 12856			777767			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12857	037536	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12858	037537	561 07 0 00 777737 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12859	037540	561 05 0 00 777767 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12860	037541	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12861	037542	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12862	037543	004 07 0 00 005737 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12863	037544	321 10 0 00 037536 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12864
 12865					;TEST ROTC RIGHT TWO BIT POSITIONS
 12866					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12867					;TEST MQ SHIFT LOGIC GATES
 12868					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12869					;IS TESTED.
 12870					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12871					;OTHER BIT IS A ZERO AFTER ROTATING
 12872					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12873
 12874			005740		SN=SN+1
 12875		777777	777757			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12876						IFE	<ZZ>,<ZZ=777777377777>
 12877			777773			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12878	037545	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12879	037546	561 07 0 00 777757 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12880	037547	561 05 0 00 777773 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12881	037550	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12882	037551	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12883	037552	004 07 0 00 005740 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12884	037553	321 10 0 00 037545 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12885
 12886					;TEST ROTC RIGHT TWO BIT POSITIONS
 12887					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12888					;TEST MQ SHIFT LOGIC GATES
 12889					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12890					;IS TESTED.
 12891					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12892					;OTHER BIT IS A ZERO AFTER ROTATING
 12893					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12894
 12895			005741		SN=SN+1
 12896		777777	777767			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12897						IFE	<ZZ>,<ZZ=777777377777>
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 27-16
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - TEST MQ SHIFT LOGIC GATES                                     SEQ 0271

 12898			777775			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12899	037554	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12900	037555	561 07 0 00 777767 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12901	037556	561 05 0 00 777775 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12902	037557	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12903	037560	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12904	037561	004 07 0 00 005741 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12905	037562	321 10 0 00 037554 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12906
 12907					;TEST ROTC RIGHT TWO BIT POSITIONS
 12908					;TEST ABILITY TO ROTATE A ZERO THROUGH THE 36 BITS OF THE MQ
 12909					;TEST MQ SHIFT LOGIC GATES
 12910					;AC, AC+1 ARE ROTATED RIGHT TWO BIT POSITIONS AND AC+1
 12911					;IS TESTED.
 12912					;AN ERROR OCCURS IF THE TESTED BIT IS A ONE AND/OR ANY
 12913					;OTHER BIT IS A ZERO AFTER ROTATING
 12914					;THIS TEST IS REPEATED 36 TIMES TO RIPPLE A ZERO THROUGH ALL 36 BITS OF THE MQ
 12915
 12916			005742		SN=SN+1
 12917		777777	777773			ZZ=<ZZ-1>/2		;SELECTED BIT BEFORE ROTATION
 12918						IFE	<ZZ>,<ZZ=777777377777>
 12919			777776			YY=<<ZZ-3>/4>&777777	;SELECTED BIT AFTER ROTATION
 12920	037563	476 00 0 00 000006 		SETOM	AC		;INITIALIZE AC TO ALL ONES
 12921	037564	561 07 0 00 777773 		HRROI	AC+1,ZZ&777777	;CLEAR BIT (N) OF AC+1 RIGHT
 12922	037565	561 05 0 00 777776 		HRROI	AC-1,YY		;SETUP FOR COMPARISON
 12923	037566	245 06 0 00 777776 		ROTC	AC,-2		;*ROTATE RIGHT TWO
 12924	037567	312 07 0 00 000005 		CAME	AC+1,AC-1	;TEST FOR BIT (N+2) A ZERO
 12925	037570	004 07 0 00 005742 		ER4	AC+1,SN		;MQ GATE UNDER TEST FAILED
 12926	037571	321 10 0 00 037563 		JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
 12927
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 28
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0272

 12928					SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)
 12929
 12930					;END CONNECTIONS-ROT
 12931					;TEST AR END BIT INPUT GATES
 12932					;TEST LEFT-AR0,1,34,35 SHLT INP GATES
 12933					;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
 12934					;AC IS ROTATED LEFT/RIGHT
 12935					;AND END BITS TESTED
 12936
 12937					;SHIFT CONNECTIONS TEST
 12938					;TEST AR35 SHLT INP-ONE'S - ROT AC,1
 12939					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 12940						SR1	(60,400000,0,0,1,ROT,1)^
 12941					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] 1 BIT
 12942					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 12943					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 12944
 12945	037572	200 06 0 00 041624 	E6000:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 12946	037573	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 12947	037574	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 12948	037575	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 12949	037576	003 06 0 00 006001 		ER3	AC,6001			;RESULT IN AC IS INCORRECT
 12950	037577	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 12951	037600	004 07 0 00 006001 		ER4	AC+1,6001		;C(AC+1) WAS MODIFIED INCORRECTLY
 12952	037601	321 10 0 00 037572 		JUMPL	AC+2,E6000		;LOOP ON ERROR SWITCH^
 12953
 12954					;SHIFT CONNECTIONS TEST
 12955					;TEST AR35 SHLT INP-ZERO'S - ROT AC,1
 12956					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 12957						SR1	(61,377777,-1,-1,-2,ROT,1)^
 12958					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] 1 BIT
 12959					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 12960					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 12961
 12962	037602	200 06 0 00 041626 	E6100:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 12963	037603	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 12964	037604	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 12965	037605	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 12966	037606	003 06 0 00 006101 		ER3	AC,6101			;RESULT IN AC IS INCORRECT
 12967	037607	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 12968	037610	004 07 0 00 006101 		ER4	AC+1,6101		;C(AC+1) WAS MODIFIED INCORRECTLY
 12969	037611	321 10 0 00 037602 		JUMPL	AC+2,E6100		;LOOP ON ERROR SWITCH^
 12970
 12971					;SHIFT CONNECTIONS TEST
 12972					;TEST AR34 SHLT INP-ONE'S - ROT AC,1
 12973					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 12974						SR1	(62,0,1,0,2,ROT,1)^
 12975					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
 12976					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 12977					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 12978
 12979	037612	200 06 0 00 041625 	E6200:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 12980	037613	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 12981	037614	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 12982	037615	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 28-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0273

 12983	037616	003 06 0 00 006201 		ER3	AC,6201			;RESULT IN AC IS INCORRECT
 12984	037617	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 12985	037620	004 07 0 00 006201 		ER4	AC+1,6201		;C(AC+1) WAS MODIFIED INCORRECTLY
 12986	037621	321 10 0 00 037612 		JUMPL	AC+2,E6200		;LOOP ON ERROR SWITCH^
 12987					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 28-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0274

 12988					;SHIFT CONNECTIONS TEST
 12989					;TEST AR34 SHLT INP-ZERO'S - ROT AC,1
 12990					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 12991						SR1	(63,-1,-2,-1,-3,ROT,1)^
 12992					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
 12993					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
 12994					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 12995
 12996	037622	200 06 0 00 041627 	E6300:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 12997	037623	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 12998	037624	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 12999	037625	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 13000	037626	003 06 0 00 006301 		ER3	AC,6301			;RESULT IN AC IS INCORRECT
 13001	037627	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13002	037630	004 07 0 00 006301 		ER4	AC+1,6301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13003	037631	321 10 0 00 037622 		JUMPL	AC+2,E6300		;LOOP ON ERROR SWITCH^
 13004
 13005					;SHIFT CONNECTIONS TEST
 13006					;TEST AR1 SHLT INP-ONE'S - ROT AC,1
 13007					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13008						SR1	(64,100000,0,200000,0,ROT,1)^
 13009					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
 13010					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13011					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13012
 13013	037632	200 06 0 00 041631 	E6400:	MOVE	AC,[XWD 100000,0]	;INITIALIZE AC
 13014	037633	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13015	037634	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13016	037635	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13017	037636	003 06 0 00 006401 		ER3	AC,6401			;RESULT IN AC IS INCORRECT
 13018	037637	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13019	037640	004 07 0 00 006401 		ER4	AC+1,6401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13020	037641	321 10 0 00 037632 		JUMPL	AC+2,E6400		;LOOP ON ERROR SWITCH^
 13021
 13022					;SHIFT CONNECTIONS TEST
 13023					;TEST AR1 SHLT INP-ZERO'S - ROT AC,1
 13024					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13025						SR1	(65,677777,-1,577777,-1,ROT,1)^
 13026					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
 13027					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
 13028					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13029
 13030	037642	200 06 0 00 041633 	E6500:	MOVE	AC,[XWD 677777,-1]	;INITIALIZE AC
 13031	037643	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13032	037644	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13033	037645	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 13034	037646	003 06 0 00 006501 		ER3	AC,6501			;RESULT IN AC IS INCORRECT
 13035	037647	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13036	037650	004 07 0 00 006501 		ER4	AC+1,6501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13037	037651	321 10 0 00 037642 		JUMPL	AC+2,E6500		;LOOP ON ERROR SWITCH^
 13038					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 28-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0275

 13039					;SHIFT CONNECTIONS TEST
 13040					;TEST AR0 SHLT INP-ONE'S - ROT AC,1
 13041					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13042						SR1	(66,200000,0,400000,0,ROT,1)^
 13043					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 200000,0] 1 BIT
 13044					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
 13045					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13046
 13047	037652	200 06 0 00 041632 	E6600:	MOVE	AC,[XWD 200000,0]	;INITIALIZE AC
 13048	037653	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13049	037654	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13050	037655	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 13051	037656	003 06 0 00 006601 		ER3	AC,6601			;RESULT IN AC IS INCORRECT
 13052	037657	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13053	037660	004 07 0 00 006601 		ER4	AC+1,6601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13054	037661	321 10 0 00 037652 		JUMPL	AC+2,E6600		;LOOP ON ERROR SWITCH^
 13055
 13056					;SHIFT CONNECTIONS TEST
 13057					;TEST AR0 SHLT INP-ZERO'S - ROT AC,1
 13058					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13059						SR1	(67,577777,-1,377777,-1,ROT,1)^
 13060					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 577777,-1] 1 BIT
 13061					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
 13062					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13063
 13064	037662	200 06 0 00 041634 	E6700:	MOVE	AC,[XWD 577777,-1]	;INITIALIZE AC
 13065	037663	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13066	037664	241 06 0 00 000001 		ROT	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13067	037665	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 13068	037666	003 06 0 00 006701 		ER3	AC,6701			;RESULT IN AC IS INCORRECT
 13069	037667	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13070	037670	004 07 0 00 006701 		ER4	AC+1,6701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13071	037671	321 10 0 00 037662 		JUMPL	AC+2,E6700		;LOOP ON ERROR SWITCH^
 13072
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 29
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0276

 13073					;SHIFT CONNECTIONS TEST
 13074					;TEST AR0 SHRT INP-ONE'S - ROT AC,-1
 13075					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13076						SR1	(70,0,1,400000,0,ROT,-1)^
 13077					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] -1 BIT
 13078					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
 13079					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13080
 13081	037672	200 06 0 00 041625 	E7000:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 13082	037673	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13083	037674	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13084	037675	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 13085	037676	003 06 0 00 007001 		ER3	AC,7001			;RESULT IN AC IS INCORRECT
 13086	037677	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13087	037700	004 07 0 00 007001 		ER4	AC+1,7001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13088	037701	321 10 0 00 037672 		JUMPL	AC+2,E7000		;LOOP ON ERROR SWITCH^
 13089
 13090					;SHIFT CONNECTIONS TEST
 13091					;TEST AR0 SHRT INP-ZERO'S - ROT AC,-1
 13092					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13093						SR1	(71,-1,-2,377777,-1,ROT,-1)^
 13094					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] -1 BIT
 13095					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
 13096					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13097
 13098	037702	200 06 0 00 041627 	E7100:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 13099	037703	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13100	037704	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13101	037705	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 13102	037706	003 06 0 00 007101 		ER3	AC,7101			;RESULT IN AC IS INCORRECT
 13103	037707	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13104	037710	004 07 0 00 007101 		ER4	AC+1,7101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13105	037711	321 10 0 00 037702 		JUMPL	AC+2,E7100		;LOOP ON ERROR SWITCH^
 13106
 13107					;SHIFT CONNECTIONS TEST
 13108					;TEST AR1 SHRT INP-ONE'S - ROT AC,-1
 13109					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13110						SR1	(72,400000,0,200000,0,ROT,-1)^
 13111					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
 13112					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13113					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13114
 13115	037712	200 06 0 00 041624 	E7200:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13116	037713	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13117	037714	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13118	037715	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13119	037716	003 06 0 00 007201 		ER3	AC,7201			;RESULT IN AC IS INCORRECT
 13120	037717	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13121	037720	004 07 0 00 007201 		ER4	AC+1,7201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13122	037721	321 10 0 00 037712 		JUMPL	AC+2,E7200		;LOOP ON ERROR SWITCH^
 13123
 13124					;SHIFT CONNECTIONS TEST
 13125					;TEST AR1 SHRT INP-ZERO'S - ROT AC,-1
 13126					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13127						SR1	(73,377777,-1,577777,-1,ROT,-1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 29-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0277

 13128					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
 13129					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
 13130					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13131
 13132	037722	200 06 0 00 041626 	E7300:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13133	037723	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13134	037724	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13135	037725	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 13136	037726	003 06 0 00 007301 		ER3	AC,7301			;RESULT IN AC IS INCORRECT
 13137	037727	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13138	037730	004 07 0 00 007301 		ER4	AC+1,7301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13139	037731	321 10 0 00 037722 		JUMPL	AC+2,E7300		;LOOP ON ERROR SWITCH^
 13140					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 29-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0278

 13141					;SHIFT CONNECTIONS TEST
 13142					;TEST AR34 SHRT INP-ONE'S - ROT AC,-1
 13143					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 13144						SR1	(74,0,4,0,2,ROT,-1)^
 13145					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
 13146					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13147					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13148
 13149	037732	200 06 0 00 041622 	E7400:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 13150	037733	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13151	037734	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13152	037735	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13153	037736	003 06 0 00 007401 		ER3	AC,7401			;RESULT IN AC IS INCORRECT
 13154	037737	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13155	037740	004 07 0 00 007401 		ER4	AC+1,7401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13156	037741	321 10 0 00 037732 		JUMPL	AC+2,E7400		;LOOP ON ERROR SWITCH^
 13157
 13158					;SHIFT CONNECTIONS TEST
 13159					;TEST AR34 SHRT INP-ZERO'S - ROT AC,-1
 13160					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 13161						SR1	(75,-1,-5,-1,-3,ROT,-1)^
 13162					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
 13163					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
 13164					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13165
 13166	037742	200 06 0 00 041635 	E7500:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 13167	037743	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13168	037744	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13169	037745	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 13170	037746	003 06 0 00 007501 		ER3	AC,7501			;RESULT IN AC IS INCORRECT
 13171	037747	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13172	037750	004 07 0 00 007501 		ER4	AC+1,7501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13173	037751	321 10 0 00 037742 		JUMPL	AC+2,E7500		;LOOP ON ERROR SWITCH^
 13174
 13175					;SHIFT CONNECTIONS TEST
 13176					;TEST AR35 SHRT INP-ONE'S - ROT AC,-1
 13177					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 13178						SR1	(76,0,2,0,1,ROT,-1)^
 13179					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
 13180					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 13181					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13182
 13183	037752	200 06 0 00 041623 	E7600:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 13184	037753	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13185	037754	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13186	037755	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 13187	037756	003 06 0 00 007601 		ER3	AC,7601			;RESULT IN AC IS INCORRECT
 13188	037757	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13189	037760	004 07 0 00 007601 		ER4	AC+1,7601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13190	037761	321 10 0 00 037752 		JUMPL	AC+2,E7600		;LOOP ON ERROR SWITCH^
 13191
 13192					;SHIFT CONNECTIONS TEST
 13193					;TEST AR35 SHRT INP-ZERO'S - ROT AC,-1
 13194					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 13195						SR1	(77,-1,-3,-1,-2,ROT,-1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 29-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0279

 13196					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
 13197					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 13198					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13199
 13200	037762	200 06 0 00 041630 	E7700:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 13201	037763	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13202	037764	241 06 0 00 777777 		ROT	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13203	037765	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 13204	037766	003 06 0 00 007701 		ER3	AC,7701			;RESULT IN AC IS INCORRECT
 13205	037767	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13206	037770	004 07 0 00 007701 		ER4	AC+1,7701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13207	037771	321 10 0 00 037762 		JUMPL	AC+2,E7700		;LOOP ON ERROR SWITCH^
 13208
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 30
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0280

 13209					;SHIFT CONNECTIONS TEST
 13210					;TEST AR0 SHRT INP-ONE'S - ROT AC,-2
 13211					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13212						SR1	(100,0,2,400000,0,ROT,-2)^
 13213					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -2 BIT
 13214					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
 13215					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13216
 13217	037772	200 06 0 00 041623 	E10000:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 13218	037773	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13219	037774	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13220	037775	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 13221	037776	003 06 0 00 010001 		ER3	AC,10001			;RESULT IN AC IS INCORRECT
 13222	037777	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13223	040000	004 07 0 00 010001 		ER4	AC+1,10001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13224	040001	321 10 0 00 037772 		JUMPL	AC+2,E10000		;LOOP ON ERROR SWITCH^
 13225
 13226					;SHIFT CONNECTIONS TEST
 13227					;TEST AR0 SHRT INP-ZERO'S - ROT AC,-2
 13228					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 13229						SR1	(101,-1,-3,377777,-1,ROT,-2)^
 13230					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -2 BIT
 13231					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
 13232					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13233
 13234	040002	200 06 0 00 041630 	E10100:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 13235	040003	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13236	040004	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13237	040005	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 13238	040006	003 06 0 00 010101 		ER3	AC,10101			;RESULT IN AC IS INCORRECT
 13239	040007	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13240	040010	004 07 0 00 010101 		ER4	AC+1,10101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13241	040011	321 10 0 00 040002 		JUMPL	AC+2,E10100		;LOOP ON ERROR SWITCH^
 13242
 13243					;SHIFT CONNECTIONS TEST
 13244					;TEST AR1 SHRT INP-ONE'S - ROT AC,-2
 13245					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13246						SR1	(102,0,1,200000,0,ROT,-2)^
 13247					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] -2 BIT
 13248					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13249					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13250
 13251	040012	200 06 0 00 041625 	E10200:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 13252	040013	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13253	040014	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13254	040015	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13255	040016	003 06 0 00 010201 		ER3	AC,10201			;RESULT IN AC IS INCORRECT
 13256	040017	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13257	040020	004 07 0 00 010201 		ER4	AC+1,10201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13258	040021	321 10 0 00 040012 		JUMPL	AC+2,E10200		;LOOP ON ERROR SWITCH^
 13259
 13260					;SHIFT CONNECTIONS TEST
 13261					;TEST AR1 SHRT INP-ZERO'S - ROT AC,-2
 13262					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 13263						SR1	(103,-1,-2,577777,-1,ROT,-2)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 30-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0281

 13264					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] -2 BIT
 13265					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-1]
 13266					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13267
 13268	040022	200 06 0 00 041627 	E10300:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 13269	040023	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13270	040024	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13271	040025	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 13272	040026	003 06 0 00 010301 		ER3	AC,10301			;RESULT IN AC IS INCORRECT
 13273	040027	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13274	040030	004 07 0 00 010301 		ER4	AC+1,10301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13275	040031	321 10 0 00 040022 		JUMPL	AC+2,E10300		;LOOP ON ERROR SWITCH^
 13276					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 30-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0282

 13277					;SHIFT CONNECTIONS TEST
 13278					;TEST AR34 SHRT INP-ONE'S - ROT AC,-2
 13279					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 13280						SR1	(104,0,10,0,2,ROT,-2)^
 13281					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
 13282					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13283					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13284
 13285	040032	200 06 0 00 041617 	E10400:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
 13286	040033	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13287	040034	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13288	040035	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13289	040036	003 06 0 00 010401 		ER3	AC,10401			;RESULT IN AC IS INCORRECT
 13290	040037	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13291	040040	004 07 0 00 010401 		ER4	AC+1,10401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13292	040041	321 10 0 00 040032 		JUMPL	AC+2,E10400		;LOOP ON ERROR SWITCH^
 13293
 13294					;SHIFT CONNECTIONS TEST
 13295					;TEST AR34 SHRT INP-ZERO'S - ROT AC,-2
 13296					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 13297						SR1	(105,-1,-11,-1,-3,ROT,-2)^
 13298					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
 13299					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
 13300					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13301
 13302	040042	200 06 0 00 041636 	E10500:	MOVE	AC,[XWD -1,-11]	;INITIALIZE AC
 13303	040043	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13304	040044	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13305	040045	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 13306	040046	003 06 0 00 010501 		ER3	AC,10501			;RESULT IN AC IS INCORRECT
 13307	040047	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13308	040050	004 07 0 00 010501 		ER4	AC+1,10501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13309	040051	321 10 0 00 040042 		JUMPL	AC+2,E10500		;LOOP ON ERROR SWITCH^
 13310
 13311					;SHIFT CONNECTIONS TEST
 13312					;TEST AR35 SHRT INP-ONE'S - ROT AC,-2
 13313					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 13314						SR1	(106,0,4,0,1,ROT,-2)^
 13315					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
 13316					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 13317					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13318
 13319	040052	200 06 0 00 041622 	E10600:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 13320	040053	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13321	040054	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13322	040055	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 13323	040056	003 06 0 00 010601 		ER3	AC,10601			;RESULT IN AC IS INCORRECT
 13324	040057	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13325	040060	004 07 0 00 010601 		ER4	AC+1,10601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13326	040061	321 10 0 00 040052 		JUMPL	AC+2,E10600		;LOOP ON ERROR SWITCH^
 13327
 13328					;SHIFT CONNECTIONS TEST
 13329					;TEST AR35 SHRT INP-ZERO'S - ROT AC,-2
 13330					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 13331						SR1	(107,-1,-5,-1,-2,ROT,-2)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 30-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROT)                                    SEQ 0283

 13332					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
 13333					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 13334					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13335
 13336	040062	200 06 0 00 041635 	E10700:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 13337	040063	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13338	040064	241 06 0 00 777776 		ROT	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13339	040065	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 13340	040066	003 06 0 00 010701 		ER3	AC,10701			;RESULT IN AC IS INCORRECT
 13341	040067	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13342	040070	004 07 0 00 010701 		ER4	AC+1,10701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13343	040071	321 10 0 00 040062 		JUMPL	AC+2,E10700		;LOOP ON ERROR SWITCH^
 13344
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 31
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0284

 13345					SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)
 13346
 13347					;END CONNECTIONS-LSH
 13348					;TEST AR END BIT INPUT GATES
 13349					;TEST LEFT-AR0,1,34,35 SHLT INP GATES
 13350					;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
 13351					;AC IS SHIFTED LEFT/RIGHT
 13352					;AND END BITS TESTED
 13353
 13354					;SHIFT CONNECTIONS TEST
 13355					;TEST AR35 SHLT INP-ZERO'S - LSH AC,1
 13356					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13357						SR1	(110,-1,-1,-1,-2,LSH,1)^
 13358					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] 1 BIT
 13359					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 13360					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13361
 13362	040072	200 06 0 00 041616 	E11000:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 13363	040073	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13364	040074	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13365	040075	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 13366	040076	003 06 0 00 011001 		ER3	AC,11001			;RESULT IN AC IS INCORRECT
 13367	040077	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13368	040100	004 07 0 00 011001 		ER4	AC+1,11001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13369	040101	321 10 0 00 040072 		JUMPL	AC+2,E11000		;LOOP ON ERROR SWITCH^
 13370
 13371					;SHIFT CONNECTIONS TEST
 13372					;TEST AR34 SHLT INP-ONE'S - LSH AC,1
 13373					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13374						SR1	(111,0,1,0,2,LSH,1)^
 13375					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
 13376					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13377					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13378
 13379	040102	200 06 0 00 041625 	E11100:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 13380	040103	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13381	040104	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13382	040105	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13383	040106	003 06 0 00 011101 		ER3	AC,11101			;RESULT IN AC IS INCORRECT
 13384	040107	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13385	040110	004 07 0 00 011101 		ER4	AC+1,11101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13386	040111	321 10 0 00 040102 		JUMPL	AC+2,E11100		;LOOP ON ERROR SWITCH^
 13387
 13388					;SHIFT CONNECTIONS TEST
 13389					;TEST AR34 SHLT INP-ZERO'S - LSH AC,1
 13390					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13391						SR1	(112,-1,-2,-1,-4,LSH,1)^
 13392					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
 13393					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-4]
 13394					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13395
 13396	040112	200 06 0 00 041627 	E11200:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 13397	040113	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13398	040114	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13399	040115	312 06 0 00 041637 		CAME	AC,[XWD -1,-4]	;IS RESULT IN AC CORRECT?
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 31-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0285

 13400	040116	003 06 0 00 011201 		ER3	AC,11201			;RESULT IN AC IS INCORRECT
 13401	040117	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13402	040120	004 07 0 00 011201 		ER4	AC+1,11201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13403	040121	321 10 0 00 040112 		JUMPL	AC+2,E11200		;LOOP ON ERROR SWITCH^
 13404					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 31-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0286

 13405					;SHIFT CONNECTIONS TEST
 13406					;TEST AR1 SHLT INP-ONE'S - LSH AC,1
 13407					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13408						SR1	(113,100000,0,200000,0,LSH,1)^
 13409					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
 13410					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13411					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13412
 13413	040122	200 06 0 00 041631 	E11300:	MOVE	AC,[XWD 100000,0]	;INITIALIZE AC
 13414	040123	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13415	040124	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13416	040125	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13417	040126	003 06 0 00 011301 		ER3	AC,11301			;RESULT IN AC IS INCORRECT
 13418	040127	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13419	040130	004 07 0 00 011301 		ER4	AC+1,11301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13420	040131	321 10 0 00 040122 		JUMPL	AC+2,E11300		;LOOP ON ERROR SWITCH^
 13421
 13422					;SHIFT CONNECTIONS TEST
 13423					;TEST AR1 SHLT INP-ZERO'S - LSH AC,1
 13424					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13425						SR1	(114,677777,-1,577777,-2,LSH,1)^
 13426					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
 13427					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-2]
 13428					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13429
 13430	040132	200 06 0 00 041633 	E11400:	MOVE	AC,[XWD 677777,-1]	;INITIALIZE AC
 13431	040133	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13432	040134	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13433	040135	312 06 0 00 041640 		CAME	AC,[XWD 577777,-2]	;IS RESULT IN AC CORRECT?
 13434	040136	003 06 0 00 011401 		ER3	AC,11401			;RESULT IN AC IS INCORRECT
 13435	040137	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13436	040140	004 07 0 00 011401 		ER4	AC+1,11401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13437	040141	321 10 0 00 040132 		JUMPL	AC+2,E11400		;LOOP ON ERROR SWITCH^
 13438
 13439					;SHIFT CONNECTIONS TEST
 13440					;TEST AR0 SHLT INP-ONE'S - LSH AC,1
 13441					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13442						SR1	(115,200000,0,400000,0,LSH,1)^
 13443					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 200000,0] 1 BIT
 13444					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
 13445					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13446
 13447	040142	200 06 0 00 041632 	E11500:	MOVE	AC,[XWD 200000,0]	;INITIALIZE AC
 13448	040143	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13449	040144	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13450	040145	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 13451	040146	003 06 0 00 011501 		ER3	AC,11501			;RESULT IN AC IS INCORRECT
 13452	040147	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13453	040150	004 07 0 00 011501 		ER4	AC+1,11501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13454	040151	321 10 0 00 040142 		JUMPL	AC+2,E11500		;LOOP ON ERROR SWITCH^
 13455
 13456					;SHIFT CONNECTIONS TEST
 13457					;TEST AR0 SHLT INP-ZERO'S - LSH AC,1
 13458					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13459						SR1	(116,577777,-1,377777,-2,LSH,1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 31-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0287

 13460					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 577777,-1] 1 BIT
 13461					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
 13462					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13463
 13464	040152	200 06 0 00 041634 	E11600:	MOVE	AC,[XWD 577777,-1]	;INITIALIZE AC
 13465	040153	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13466	040154	242 06 0 00 000001 		LSH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13467	040155	312 06 0 00 041641 		CAME	AC,[XWD 377777,-2]	;IS RESULT IN AC CORRECT?
 13468	040156	003 06 0 00 011601 		ER3	AC,11601			;RESULT IN AC IS INCORRECT
 13469	040157	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13470	040160	004 07 0 00 011601 		ER4	AC+1,11601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13471	040161	321 10 0 00 040152 		JUMPL	AC+2,E11600		;LOOP ON ERROR SWITCH^
 13472
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 32
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0288

 13473					;SHIFT CONNECTIONS TEST
 13474					;TEST AR0 SHRT INP-ZERO'S - LSH AC,-1
 13475					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13476						SR1	(117,-1,-1,377777,-1,LSH,-1)^
 13477					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -1 BIT
 13478					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-1]
 13479					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13480
 13481	040162	200 06 0 00 041616 	E11700:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 13482	040163	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13483	040164	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13484	040165	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 13485	040166	003 06 0 00 011701 		ER3	AC,11701			;RESULT IN AC IS INCORRECT
 13486	040167	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13487	040170	004 07 0 00 011701 		ER4	AC+1,11701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13488	040171	321 10 0 00 040162 		JUMPL	AC+2,E11700		;LOOP ON ERROR SWITCH^
 13489
 13490					;SHIFT CONNECTIONS TEST
 13491					;TEST AR1 SHRT INP-ONE'S - LSH AC,-1
 13492					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13493						SR1	(120,400000,0,200000,0,LSH,-1)^
 13494					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
 13495					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13496					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13497
 13498	040172	200 06 0 00 041624 	E12000:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13499	040173	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13500	040174	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13501	040175	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13502	040176	003 06 0 00 012001 		ER3	AC,12001			;RESULT IN AC IS INCORRECT
 13503	040177	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13504	040200	004 07 0 00 012001 		ER4	AC+1,12001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13505	040201	321 10 0 00 040172 		JUMPL	AC+2,E12000		;LOOP ON ERROR SWITCH^
 13506
 13507					;SHIFT CONNECTIONS TEST
 13508					;TEST AR1 SHRT INP-ZERO'S - LSH AC,-1
 13509					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13510						SR1	(121,377777,-1,177777,-1,LSH,-1)^
 13511					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
 13512					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
 13513					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13514
 13515	040202	200 06 0 00 041626 	E12100:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13516	040203	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13517	040204	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13518	040205	312 06 0 00 041642 		CAME	AC,[XWD 177777,-1]	;IS RESULT IN AC CORRECT?
 13519	040206	003 06 0 00 012101 		ER3	AC,12101			;RESULT IN AC IS INCORRECT
 13520	040207	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13521	040210	004 07 0 00 012101 		ER4	AC+1,12101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13522	040211	321 10 0 00 040202 		JUMPL	AC+2,E12100		;LOOP ON ERROR SWITCH^
 13523					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 32-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0289

 13524					;SHIFT CONNECTIONS TEST
 13525					;TEST AR34 SHRT INP-ONE'S - LSH AC,-1
 13526					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13527						SR1	(122,0,4,0,2,LSH,-1)^
 13528					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
 13529					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13530					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13531
 13532	040212	200 06 0 00 041622 	E12200:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 13533	040213	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13534	040214	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13535	040215	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13536	040216	003 06 0 00 012201 		ER3	AC,12201			;RESULT IN AC IS INCORRECT
 13537	040217	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13538	040220	004 07 0 00 012201 		ER4	AC+1,12201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13539	040221	321 10 0 00 040212 		JUMPL	AC+2,E12200		;LOOP ON ERROR SWITCH^
 13540
 13541					;SHIFT CONNECTIONS TEST
 13542					;TEST AR34 SHRT INP-ZERO'S - LSH AC,-1
 13543					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13544						SR1	(123,-1,-5,377777,-3,LSH,-1)^
 13545					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
 13546					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-3]
 13547					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13548
 13549	040222	200 06 0 00 041635 	E12300:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 13550	040223	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13551	040224	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13552	040225	312 06 0 00 041643 		CAME	AC,[XWD 377777,-3]	;IS RESULT IN AC CORRECT?
 13553	040226	003 06 0 00 012301 		ER3	AC,12301			;RESULT IN AC IS INCORRECT
 13554	040227	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13555	040230	004 07 0 00 012301 		ER4	AC+1,12301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13556	040231	321 10 0 00 040222 		JUMPL	AC+2,E12300		;LOOP ON ERROR SWITCH^
 13557
 13558					;SHIFT CONNECTIONS TEST
 13559					;TEST AR35 SHRT INP-ONE'S - LSH AC,-1
 13560					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13561						SR1	(124,0,2,0,1,LSH,-1)^
 13562					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
 13563					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 13564					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13565
 13566	040232	200 06 0 00 041623 	E12400:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 13567	040233	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13568	040234	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13569	040235	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 13570	040236	003 06 0 00 012401 		ER3	AC,12401			;RESULT IN AC IS INCORRECT
 13571	040237	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13572	040240	004 07 0 00 012401 		ER4	AC+1,12401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13573	040241	321 10 0 00 040232 		JUMPL	AC+2,E12400		;LOOP ON ERROR SWITCH^
 13574
 13575					;SHIFT CONNECTIONS TEST
 13576					;TEST AR35 SHRT INP-ZERO'S - LSH AC,-1
 13577					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13578						SR1	(125,-1,-3,377777,-2,LSH,-1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 32-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0290

 13579					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
 13580					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
 13581					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13582
 13583	040242	200 06 0 00 041630 	E12500:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 13584	040243	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13585	040244	242 06 0 00 777777 		LSH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13586	040245	312 06 0 00 041641 		CAME	AC,[XWD 377777,-2]	;IS RESULT IN AC CORRECT?
 13587	040246	003 06 0 00 012501 		ER3	AC,12501			;RESULT IN AC IS INCORRECT
 13588	040247	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13589	040250	004 07 0 00 012501 		ER4	AC+1,12501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13590	040251	321 10 0 00 040242 		JUMPL	AC+2,E12500		;LOOP ON ERROR SWITCH^
 13591
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 33
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0291

 13592					;SHIFT CONNECTIONS TEST
 13593					;TEST AR0 SHRT INP-ZERO'S - LSH AC,-2
 13594					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13595						SR1	(126,-1,-1,177777,-1,LSH,-2)^
 13596					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -2 BIT
 13597					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
 13598					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13599
 13600	040252	200 06 0 00 041616 	E12600:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 13601	040253	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13602	040254	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13603	040255	312 06 0 00 041642 		CAME	AC,[XWD 177777,-1]	;IS RESULT IN AC CORRECT?
 13604	040256	003 06 0 00 012601 		ER3	AC,12601			;RESULT IN AC IS INCORRECT
 13605	040257	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13606	040260	004 07 0 00 012601 		ER4	AC+1,12601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13607	040261	321 10 0 00 040252 		JUMPL	AC+2,E12600		;LOOP ON ERROR SWITCH^
 13608
 13609					;SHIFT CONNECTIONS TEST
 13610					;TEST AR1 SHRT INP-ZERO'S - LSH AC,-2
 13611					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13612						SR1	(127,-1,-1,177777,-1,LSH,-2)^
 13613					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] -2 BIT
 13614					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
 13615					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13616
 13617	040262	200 06 0 00 041616 	E12700:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 13618	040263	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13619	040264	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13620	040265	312 06 0 00 041642 		CAME	AC,[XWD 177777,-1]	;IS RESULT IN AC CORRECT?
 13621	040266	003 06 0 00 012701 		ER3	AC,12701			;RESULT IN AC IS INCORRECT
 13622	040267	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13623	040270	004 07 0 00 012701 		ER4	AC+1,12701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13624	040271	321 10 0 00 040262 		JUMPL	AC+2,E12700		;LOOP ON ERROR SWITCH^
 13625
 13626					;SHIFT CONNECTIONS TEST
 13627					;TEST AR34 SHRT INP-ONE'S - LSH AC,-2
 13628					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13629						SR1	(130,0,10,0,2,LSH,-2)^
 13630					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
 13631					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13632					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13633
 13634	040272	200 06 0 00 041617 	E13000:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
 13635	040273	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13636	040274	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13637	040275	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13638	040276	003 06 0 00 013001 		ER3	AC,13001			;RESULT IN AC IS INCORRECT
 13639	040277	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13640	040300	004 07 0 00 013001 		ER4	AC+1,13001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13641	040301	321 10 0 00 040272 		JUMPL	AC+2,E13000		;LOOP ON ERROR SWITCH^
 13642					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 33-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSH)                                    SEQ 0292

 13643					;SHIFT CONNECTIONS TEST
 13644					;TEST AR34 SHRT INP-ZERO'S - LSH AC,-2
 13645					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13646						SR1	(131,-1,-11,177777,-3,LSH,-2)^
 13647					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
 13648					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-3]
 13649					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13650
 13651	040302	200 06 0 00 041636 	E13100:	MOVE	AC,[XWD -1,-11]	;INITIALIZE AC
 13652	040303	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13653	040304	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13654	040305	312 06 0 00 041644 		CAME	AC,[XWD 177777,-3]	;IS RESULT IN AC CORRECT?
 13655	040306	003 06 0 00 013101 		ER3	AC,13101			;RESULT IN AC IS INCORRECT
 13656	040307	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13657	040310	004 07 0 00 013101 		ER4	AC+1,13101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13658	040311	321 10 0 00 040302 		JUMPL	AC+2,E13100		;LOOP ON ERROR SWITCH^
 13659
 13660					;SHIFT CONNECTIONS TEST
 13661					;TEST AR35 SHRT INP-ONE'S - LSH AC,-2
 13662					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13663						SR1	(132,0,4,0,1,LSH,-2)^
 13664					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
 13665					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 13666					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13667
 13668	040312	200 06 0 00 041622 	E13200:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 13669	040313	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13670	040314	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13671	040315	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 13672	040316	003 06 0 00 013201 		ER3	AC,13201			;RESULT IN AC IS INCORRECT
 13673	040317	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13674	040320	004 07 0 00 013201 		ER4	AC+1,13201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13675	040321	321 10 0 00 040312 		JUMPL	AC+2,E13200		;LOOP ON ERROR SWITCH^
 13676
 13677					;SHIFT CONNECTIONS TEST
 13678					;TEST AR35 SHRT INP-ZERO'S - LSH AC,-2
 13679					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13680						SR1	(133,-1,-5,177777,-2,LSH,-2)^
 13681					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
 13682					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-2]
 13683					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13684
 13685	040322	200 06 0 00 041635 	E13300:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 13686	040323	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13687	040324	242 06 0 00 777776 		LSH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13688	040325	312 06 0 00 041645 		CAME	AC,[XWD 177777,-2]	;IS RESULT IN AC CORRECT?
 13689	040326	003 06 0 00 013301 		ER3	AC,13301			;RESULT IN AC IS INCORRECT
 13690	040327	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13691	040330	004 07 0 00 013301 		ER4	AC+1,13301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13692	040331	321 10 0 00 040322 		JUMPL	AC+2,E13300		;LOOP ON ERROR SWITCH^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 34
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0293

 13693					SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)
 13694
 13695					;END CONNECTIONS-ASH
 13696					;TEST AR END BIT INPUT GATES
 13697					;TEST LEFT-AR0,1,34,35 SHLT INP GATES
 13698					;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
 13699					;AC IS SHIFTD LEFT/RIGHT
 13700					;AND END BITS TESTED
 13701
 13702					;SHIFT CONNECTIONS TEST
 13703					;TEST AR35 SHLT INP-ZERO'S - ASH AC,1
 13704					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13705						SR1	(134,-1,-1,-1,-2,ASH,1)^
 13706					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-1] 1 BIT
 13707					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 13708					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13709
 13710	040332	200 06 0 00 041616 	E13400:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 13711	040333	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13712	040334	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13713	040335	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 13714	040336	003 06 0 00 013401 		ER3	AC,13401			;RESULT IN AC IS INCORRECT
 13715	040337	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13716	040340	004 07 0 00 013401 		ER4	AC+1,13401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13717	040341	321 10 0 00 040332 		JUMPL	AC+2,E13400		;LOOP ON ERROR SWITCH^
 13718
 13719					;SHIFT CONNECTIONS TEST
 13720					;TEST AR34 SHLT INP-ONE'S - ASH AC,1
 13721					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13722						SR1	(135,0,1,0,2,ASH,1)^
 13723					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,1] 1 BIT
 13724					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13725					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13726
 13727	040342	200 06 0 00 041625 	E13500:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 13728	040343	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13729	040344	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13730	040345	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13731	040346	003 06 0 00 013501 		ER3	AC,13501			;RESULT IN AC IS INCORRECT
 13732	040347	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13733	040350	004 07 0 00 013501 		ER4	AC+1,13501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13734	040351	321 10 0 00 040342 		JUMPL	AC+2,E13500		;LOOP ON ERROR SWITCH^
 13735
 13736					;SHIFT CONNECTIONS TEST
 13737					;TEST AR34 SHLT INP-ZERO'S - ASH AC,1
 13738					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13739						SR1	(136,-1,-2,-1,-4,ASH,1)^
 13740					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-2] 1 BIT
 13741					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-4]
 13742					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13743
 13744	040352	200 06 0 00 041627 	E13600:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 13745	040353	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13746	040354	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13747	040355	312 06 0 00 041637 		CAME	AC,[XWD -1,-4]	;IS RESULT IN AC CORRECT?
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 34-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0294

 13748	040356	003 06 0 00 013601 		ER3	AC,13601			;RESULT IN AC IS INCORRECT
 13749	040357	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13750	040360	004 07 0 00 013601 		ER4	AC+1,13601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13751	040361	321 10 0 00 040352 		JUMPL	AC+2,E13600		;LOOP ON ERROR SWITCH^
 13752					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 34-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0295

 13753					;SHIFT CONNECTIONS TEST
 13754					;TEST AR1 SHLT INP-ONE'S - ASH AC,1
 13755					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13756						SR1	(137,100000,0,200000,0,ASH,1)^
 13757					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 100000,0] 1 BIT
 13758					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 200000,0]
 13759					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13760
 13761	040362	200 06 0 00 041631 	E13700:	MOVE	AC,[XWD 100000,0]	;INITIALIZE AC
 13762	040363	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13763	040364	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13764	040365	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 13765	040366	003 06 0 00 013701 		ER3	AC,13701			;RESULT IN AC IS INCORRECT
 13766	040367	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13767	040370	004 07 0 00 013701 		ER4	AC+1,13701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13768	040371	321 10 0 00 040362 		JUMPL	AC+2,E13700		;LOOP ON ERROR SWITCH^
 13769
 13770					;SHIFT CONNECTIONS TEST
 13771					;TEST AR1 SHLT INP-ZERO'S - ASH AC,1
 13772					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13773						SR1	(140,677777,-1,577777,-2,ASH,1)^
 13774					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 677777,-1] 1 BIT
 13775					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 577777,-2]
 13776					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13777
 13778	040372	200 06 0 00 041633 	E14000:	MOVE	AC,[XWD 677777,-1]	;INITIALIZE AC
 13779	040373	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13780	040374	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13781	040375	312 06 0 00 041640 		CAME	AC,[XWD 577777,-2]	;IS RESULT IN AC CORRECT?
 13782	040376	003 06 0 00 014001 		ER3	AC,14001			;RESULT IN AC IS INCORRECT
 13783	040377	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13784	040400	004 07 0 00 014001 		ER4	AC+1,14001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13785	040401	321 10 0 00 040372 		JUMPL	AC+2,E14000		;LOOP ON ERROR SWITCH^
 13786
 13787					;SHIFT CONNECTIONS TEST
 13788					;TEST AR0 SHLT INP-ONE'S - ASH AC,1
 13789					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13790						SR1	(141,400000,0,400000,0,ASH,1)^
 13791					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] 1 BIT
 13792					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 400000,0]
 13793					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13794
 13795	040402	200 06 0 00 041624 	E14100:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13796	040403	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13797	040404	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13798	040405	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 13799	040406	003 06 0 00 014101 		ER3	AC,14101			;RESULT IN AC IS INCORRECT
 13800	040407	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13801	040410	004 07 0 00 014101 		ER4	AC+1,14101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13802	040411	321 10 0 00 040402 		JUMPL	AC+2,E14100		;LOOP ON ERROR SWITCH^
 13803
 13804					;SHIFT CONNECTIONS TEST
 13805					;TEST AR0 SHLT INP-ZERO'S - ASH AC,1
 13806					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13807						SR1	(142,377777,-1,377777,-2,ASH,1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 34-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0296

 13808					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] 1 BIT
 13809					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 377777,-2]
 13810					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13811
 13812	040412	200 06 0 00 041626 	E14200:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13813	040413	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13814	040414	240 06 0 00 000001 		ASH	AC,1			;*SHIFT/ROTATE 1 BIT POSITIONS
 13815	040415	312 06 0 00 041641 		CAME	AC,[XWD 377777,-2]	;IS RESULT IN AC CORRECT?
 13816	040416	003 06 0 00 014201 		ER3	AC,14201			;RESULT IN AC IS INCORRECT
 13817	040417	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13818	040420	004 07 0 00 014201 		ER4	AC+1,14201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13819	040421	321 10 0 00 040412 		JUMPL	AC+2,E14200		;LOOP ON ERROR SWITCH^
 13820
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 35
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0297

 13821					;SHIFT CONNECTIONS TEST
 13822					;TEST AR0 SHRT INP-ONE'S - ASH AC,-1
 13823					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13824						SR1	(143,400000,0,600000,0,ASH,-1)^
 13825					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
 13826					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 600000,0]
 13827					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13828
 13829	040422	200 06 0 00 041624 	E14300:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13830	040423	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13831	040424	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13832	040425	312 06 0 00 041646 		CAME	AC,[XWD 600000,0]	;IS RESULT IN AC CORRECT?
 13833	040426	003 06 0 00 014301 		ER3	AC,14301			;RESULT IN AC IS INCORRECT
 13834	040427	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13835	040430	004 07 0 00 014301 		ER4	AC+1,14301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13836	040431	321 10 0 00 040422 		JUMPL	AC+2,E14300		;LOOP ON ERROR SWITCH^
 13837
 13838					;SHIFT CONNECTIONS TEST
 13839					;TEST AR0 SHRT INP-ZERO'S - ASH AC,-1
 13840					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13841						SR1	(144,377777,-1,177777,-1,ASH,-1)^
 13842					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
 13843					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
 13844					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13845
 13846	040432	200 06 0 00 041626 	E14400:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13847	040433	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13848	040434	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13849	040435	312 06 0 00 041642 		CAME	AC,[XWD 177777,-1]	;IS RESULT IN AC CORRECT?
 13850	040436	003 06 0 00 014401 		ER3	AC,14401			;RESULT IN AC IS INCORRECT
 13851	040437	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13852	040440	004 07 0 00 014401 		ER4	AC+1,14401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13853	040441	321 10 0 00 040432 		JUMPL	AC+2,E14400		;LOOP ON ERROR SWITCH^
 13854
 13855					;SHIFT CONNECTIONS TEST
 13856					;TEST AR1 SHRT INP-ONE'S - ASH AC,-1
 13857					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13858						SR1	(145,400000,0,600000,0,ASH,-1)^
 13859					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -1 BIT
 13860					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 600000,0]
 13861					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13862
 13863	040442	200 06 0 00 041624 	E14500:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13864	040443	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13865	040444	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13866	040445	312 06 0 00 041646 		CAME	AC,[XWD 600000,0]	;IS RESULT IN AC CORRECT?
 13867	040446	003 06 0 00 014501 		ER3	AC,14501			;RESULT IN AC IS INCORRECT
 13868	040447	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13869	040450	004 07 0 00 014501 		ER4	AC+1,14501		;C(AC+1) WAS MODIFIED INCORRECTLY
 13870	040451	321 10 0 00 040442 		JUMPL	AC+2,E14500		;LOOP ON ERROR SWITCH^
 13871
 13872					;SHIFT CONNECTIONS TEST
 13873					;TEST AR1 SHRT INP-ZERO'S - ASH AC,-1
 13874					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13875						SR1	(146,377777,-1,177777,-1,ASH,-1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 35-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0298

 13876					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -1 BIT
 13877					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 177777,-1]
 13878					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13879
 13880	040452	200 06 0 00 041626 	E14600:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13881	040453	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13882	040454	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13883	040455	312 06 0 00 041642 		CAME	AC,[XWD 177777,-1]	;IS RESULT IN AC CORRECT?
 13884	040456	003 06 0 00 014601 		ER3	AC,14601			;RESULT IN AC IS INCORRECT
 13885	040457	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13886	040460	004 07 0 00 014601 		ER4	AC+1,14601		;C(AC+1) WAS MODIFIED INCORRECTLY
 13887	040461	321 10 0 00 040452 		JUMPL	AC+2,E14600		;LOOP ON ERROR SWITCH^
 13888					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 35-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0299

 13889					;SHIFT CONNECTIONS TEST
 13890					;TEST AR34 SHRT INP-ONE'S - ASH AC,-1
 13891					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13892						SR1	(147,0,4,0,2,ASH,-1)^
 13893					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -1 BIT
 13894					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 13895					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13896
 13897	040462	200 06 0 00 041622 	E14700:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 13898	040463	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13899	040464	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13900	040465	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 13901	040466	003 06 0 00 014701 		ER3	AC,14701			;RESULT IN AC IS INCORRECT
 13902	040467	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13903	040470	004 07 0 00 014701 		ER4	AC+1,14701		;C(AC+1) WAS MODIFIED INCORRECTLY
 13904	040471	321 10 0 00 040462 		JUMPL	AC+2,E14700		;LOOP ON ERROR SWITCH^
 13905
 13906					;SHIFT CONNECTIONS TEST
 13907					;TEST AR34 SHRT INP-ZERO'S - ASH AC,-1
 13908					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 13909						SR1	(150,-1,-5,-1,-3,ASH,-1)^
 13910					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -1 BIT
 13911					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
 13912					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13913
 13914	040472	200 06 0 00 041635 	E15000:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 13915	040473	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13916	040474	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13917	040475	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 13918	040476	003 06 0 00 015001 		ER3	AC,15001			;RESULT IN AC IS INCORRECT
 13919	040477	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13920	040500	004 07 0 00 015001 		ER4	AC+1,15001		;C(AC+1) WAS MODIFIED INCORRECTLY
 13921	040501	321 10 0 00 040472 		JUMPL	AC+2,E15000		;LOOP ON ERROR SWITCH^
 13922
 13923					;SHIFT CONNECTIONS TEST
 13924					;TEST AR35 SHRT INP-ONE'S - ASH AC,-1
 13925					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13926						SR1	(151,0,2,0,1,ASH,-1)^
 13927					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,2] -1 BIT
 13928					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 13929					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13930
 13931	040502	200 06 0 00 041623 	E15100:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 13932	040503	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13933	040504	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13934	040505	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 13935	040506	003 06 0 00 015101 		ER3	AC,15101			;RESULT IN AC IS INCORRECT
 13936	040507	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13937	040510	004 07 0 00 015101 		ER4	AC+1,15101		;C(AC+1) WAS MODIFIED INCORRECTLY
 13938	040511	321 10 0 00 040502 		JUMPL	AC+2,E15100		;LOOP ON ERROR SWITCH^
 13939
 13940					;SHIFT CONNECTIONS TEST
 13941					;TEST AR35 SHRT INP-ZERO'S - ASH AC,-1
 13942					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 13943						SR1	(152,-1,-3,-1,-2,ASH,-1)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 35-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0300

 13944					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-3] -1 BIT
 13945					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 13946					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13947
 13948	040512	200 06 0 00 041630 	E15200:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 13949	040513	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13950	040514	240 06 0 00 777777 		ASH	AC,-1			;*SHIFT/ROTATE -1 BIT POSITIONS
 13951	040515	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 13952	040516	003 06 0 00 015201 		ER3	AC,15201			;RESULT IN AC IS INCORRECT
 13953	040517	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13954	040520	004 07 0 00 015201 		ER4	AC+1,15201		;C(AC+1) WAS MODIFIED INCORRECTLY
 13955	040521	321 10 0 00 040512 		JUMPL	AC+2,E15200		;LOOP ON ERROR SWITCH^
 13956
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 36
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0301

 13957					;SHIFT CONNECTIONS TEST
 13958					;TEST AR0 SHRT INP-ONE'S - ASH AC,-2
 13959					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13960						SR1	(153,400000,0,700000,0,ASH,-2)^
 13961					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -2 BIT
 13962					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 700000,0]
 13963					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13964
 13965	040522	200 06 0 00 041624 	E15300:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 13966	040523	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13967	040524	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13968	040525	312 06 0 00 041647 		CAME	AC,[XWD 700000,0]	;IS RESULT IN AC CORRECT?
 13969	040526	003 06 0 00 015301 		ER3	AC,15301			;RESULT IN AC IS INCORRECT
 13970	040527	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13971	040530	004 07 0 00 015301 		ER4	AC+1,15301		;C(AC+1) WAS MODIFIED INCORRECTLY
 13972	040531	321 10 0 00 040522 		JUMPL	AC+2,E15300		;LOOP ON ERROR SWITCH^
 13973
 13974					;SHIFT CONNECTIONS TEST
 13975					;TEST AR0 SHRT INP-ZERO'S - ASH AC,-2
 13976					;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
 13977						SR1	(154,377777,-1,077777,-1,ASH,-2)^
 13978					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -2 BIT
 13979					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 077777,-1]
 13980					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13981
 13982	040532	200 06 0 00 041626 	E15400:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 13983	040533	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 13984	040534	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 13985	040535	312 06 0 00 041650 		CAME	AC,[XWD 077777,-1]	;IS RESULT IN AC CORRECT?
 13986	040536	003 06 0 00 015401 		ER3	AC,15401			;RESULT IN AC IS INCORRECT
 13987	040537	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 13988	040540	004 07 0 00 015401 		ER4	AC+1,15401		;C(AC+1) WAS MODIFIED INCORRECTLY
 13989	040541	321 10 0 00 040532 		JUMPL	AC+2,E15400		;LOOP ON ERROR SWITCH^
 13990
 13991					;SHIFT CONNECTIONS TEST
 13992					;TEST AR1 SHRT INP-ONE'S - ASH AC,-2
 13993					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 13994						SR1	(155,400000,0,700000,0,ASH,-2)^
 13995					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 400000,0] -2 BIT
 13996					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 700000,0]
 13997					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 13998
 13999	040542	200 06 0 00 041624 	E15500:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 14000	040543	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14001	040544	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14002	040545	312 06 0 00 041647 		CAME	AC,[XWD 700000,0]	;IS RESULT IN AC CORRECT?
 14003	040546	003 06 0 00 015501 		ER3	AC,15501			;RESULT IN AC IS INCORRECT
 14004	040547	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14005	040550	004 07 0 00 015501 		ER4	AC+1,15501		;C(AC+1) WAS MODIFIED INCORRECTLY
 14006	040551	321 10 0 00 040542 		JUMPL	AC+2,E15500		;LOOP ON ERROR SWITCH^
 14007
 14008					;SHIFT CONNECTIONS TEST
 14009					;TEST AR1 SHRT INP-ZERO'S - ASH AC,-2
 14010					;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
 14011						SR1	(156,377777,-1,077777,-1,ASH,-2)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 36-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0302

 14012					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 377777,-1] -2 BIT
 14013					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 077777,-1]
 14014					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 14015
 14016	040552	200 06 0 00 041626 	E15600:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 14017	040553	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14018	040554	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14019	040555	312 06 0 00 041650 		CAME	AC,[XWD 077777,-1]	;IS RESULT IN AC CORRECT?
 14020	040556	003 06 0 00 015601 		ER3	AC,15601			;RESULT IN AC IS INCORRECT
 14021	040557	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14022	040560	004 07 0 00 015601 		ER4	AC+1,15601		;C(AC+1) WAS MODIFIED INCORRECTLY
 14023	040561	321 10 0 00 040552 		JUMPL	AC+2,E15600		;LOOP ON ERROR SWITCH^
 14024					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 36-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0303

 14025					;SHIFT CONNECTIONS TEST
 14026					;TEST AR34 SHRT INP-ONE'S - ASH AC,-2
 14027					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 14028						SR1	(157,0,10,0,2,ASH,-2)^
 14029					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,10] -2 BIT
 14030					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,2]
 14031					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 14032
 14033	040562	200 06 0 00 041617 	E15700:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
 14034	040563	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14035	040564	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14036	040565	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 14037	040566	003 06 0 00 015701 		ER3	AC,15701			;RESULT IN AC IS INCORRECT
 14038	040567	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14039	040570	004 07 0 00 015701 		ER4	AC+1,15701		;C(AC+1) WAS MODIFIED INCORRECTLY
 14040	040571	321 10 0 00 040562 		JUMPL	AC+2,E15700		;LOOP ON ERROR SWITCH^
 14041
 14042					;SHIFT CONNECTIONS TEST
 14043					;TEST AR34 SHRT INP-ZERO'S - ASH AC,-2
 14044					;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
 14045						SR1	(160,-1,-11,-1,-3,ASH,-2)^
 14046					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-11] -2 BIT
 14047					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-3]
 14048					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 14049
 14050	040572	200 06 0 00 041636 	E16000:	MOVE	AC,[XWD -1,-11]	;INITIALIZE AC
 14051	040573	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14052	040574	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14053	040575	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 14054	040576	003 06 0 00 016001 		ER3	AC,16001			;RESULT IN AC IS INCORRECT
 14055	040577	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14056	040600	004 07 0 00 016001 		ER4	AC+1,16001		;C(AC+1) WAS MODIFIED INCORRECTLY
 14057	040601	321 10 0 00 040572 		JUMPL	AC+2,E16000		;LOOP ON ERROR SWITCH^
 14058
 14059					;SHIFT CONNECTIONS TEST
 14060					;TEST AR35 SHRT INP-ONE'S - ASH AC,-2
 14061					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 14062						SR1	(161,0,4,0,1,ASH,-2)^
 14063					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD 0,4] -2 BIT
 14064					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD 0,1]
 14065					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 14066
 14067	040602	200 06 0 00 041622 	E16100:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 14068	040603	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14069	040604	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14070	040605	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 14071	040606	003 06 0 00 016101 		ER3	AC,16101			;RESULT IN AC IS INCORRECT
 14072	040607	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14073	040610	004 07 0 00 016101 		ER4	AC+1,16101		;C(AC+1) WAS MODIFIED INCORRECTLY
 14074	040611	321 10 0 00 040602 		JUMPL	AC+2,E16100		;LOOP ON ERROR SWITCH^
 14075
 14076					;SHIFT CONNECTIONS TEST
 14077					;TEST AR35 SHRT INP-ZERO'S - ASH AC,-2
 14078					;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
 14079						SR1	(162,-1,-5,-1,-2,ASH,-2)^
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 36-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASH)                                    SEQ 0304

 14080					;THIS MACRO SHIFTS/ROTATES THE DATA SPECIFIED IN [XWD -1,-5] -2 BIT
 14081					;POSITIONS AND COMPARES THE RESULT IN THE AC TO THE DATA SPECIFIED IN [XWD -1,-2]
 14082					;IT ALSO CHECKS THAT C(AC+1) WAS NOT MODIFIED
 14083
 14084	040612	200 06 0 00 041635 	E16200:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 14085	040613	200 07 0 00 041620 		MOVE	AC+1,[XWD 741703,607417];INITIALIZE AC+1
 14086	040614	240 06 0 00 777776 		ASH	AC,-2			;*SHIFT/ROTATE -2 BIT POSITIONS
 14087	040615	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 14088	040616	003 06 0 00 016201 		ER3	AC,16201			;RESULT IN AC IS INCORRECT
 14089	040617	312 07 0 00 041620 		CAME	AC+1,[XWD 741703,607417]
 14090	040620	004 07 0 00 016201 		ER4	AC+1,16201		;C(AC+1) WAS MODIFIED INCORRECTLY
 14091	040621	321 10 0 00 040612 		JUMPL	AC+2,E16200		;LOOP ON ERROR SWITCH^
 14092
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 37
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0305

 14093					SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)
 14094
 14095					;END CONNECTIONS-ROTC
 14096					;TEST AR-MQ END BIT INPUT GATES
 14097					;TEST LEFT-AR0,1,34,35 SHLT INP GATES
 14098					;          MQ0,1,34,35 SHLT INP GATES
 14099					;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
 14100					;	   MQ0,1,34,35 SHRT INPUT GATES
 14101					;AC,AC+1 ARE ROTATED LEFT/RIGHT AND
 14102					;END BITS ARE TESTED
 14103					;TEST ASSUMES BOTH REGISTERS ARE
 14104					;CAPABLE OF ROTATING 1,-1 AND -2 BIT POSITIONS CORRECTLY
 14105
 14106					;SHIFT CONNECTIONS TEST
 14107					;TEST MQ35 SHLT INP-ONE'S - ROTC AC,1
 14108					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14109						SR2	(163,400000,0,0,0,0,0,0,1,ROTC,1)^
 14110					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14111					;DATA SPECIFIED IN [XWD 400000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
 14112					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14113					;[XWD 0,1]
 14114
 14115	040622	200 06 0 00 041624 	E16300:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 14116	040623	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14117	040624	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14118	040625	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14119	040626	003 06 0 00 016301 		ER3	AC,16301			;RESULT IN AC IS INCORRECT
 14120	040627	312 07 0 00 041625 		CAME	AC+1,[XWD 0,1]	;IS RESULT IN AC+1 CORRECT?
 14121	040630	004 07 0 00 016301 		ER4	AC+1,16301		;RESULT IN AC+1 IS INCORRECT
 14122	040631	321 10 0 00 040622 		JUMPL	AC+2,E16300		;LOOP ON ERROR SWITCH^
 14123
 14124					;SHIFT CONNECTIONS TEST
 14125					;TEST MQ35 SHLT INP-ZERO'S - ROTC AC,1
 14126					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14127						SR2	(164,377777,-1,-1,-1,-1,-1,-1,-2,ROTC,1)^
 14128					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14129					;DATA SPECIFIED IN [XWD 377777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
 14130					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14131					;[XWD -1,-2]
 14132
 14133	040632	200 06 0 00 041626 	E16400:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 14134	040633	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14135	040634	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14136	040635	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14137	040636	003 06 0 00 016401 		ER3	AC,16401			;RESULT IN AC IS INCORRECT
 14138	040637	312 07 0 00 041627 		CAME	AC+1,[XWD -1,-2]	;IS RESULT IN AC+1 CORRECT?
 14139	040640	004 07 0 00 016401 		ER4	AC+1,16401		;RESULT IN AC+1 IS INCORRECT
 14140	040641	321 10 0 00 040632 		JUMPL	AC+2,E16400		;LOOP ON ERROR SWITCH^
 14141
 14142					;SHIFT CONNECTIONS TEST
 14143					;TEST MQ34 SHLT INP-ONE'S - ROTC AC,1
 14144					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14145						SR2	(165,0,0,0,1,0,0,0,2,ROTC,1)^
 14146					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14147					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] 1 BIT POSITIONS AND
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 37-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0306

 14148					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14149					;[XWD 0,2]
 14150
 14151	040642	200 06 0 00 041615 	E16500:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14152	040643	200 07 0 00 041625 		MOVE	AC+1,[XWD 0,1]	;INITIALIZE AC+1
 14153	040644	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14154	040645	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14155	040646	003 06 0 00 016501 		ER3	AC,16501			;RESULT IN AC IS INCORRECT
 14156	040647	312 07 0 00 041623 		CAME	AC+1,[XWD 0,2]	;IS RESULT IN AC+1 CORRECT?
 14157	040650	004 07 0 00 016501 		ER4	AC+1,16501		;RESULT IN AC+1 IS INCORRECT
 14158	040651	321 10 0 00 040642 		JUMPL	AC+2,E16500		;LOOP ON ERROR SWITCH^
 14159					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 37-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0307

 14160					;SHIFT CONNECTIONS TEST
 14161					;TEST MQ34 SHLT INP-ZERO'S - ROTC AC,1
 14162					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14163						SR2	(166,-1,-1,-1,-2,-1,-1,-1,-3,ROTC,1)^
 14164					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14165					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] 1 BIT POSITIONS AND
 14166					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14167					;[XWD -1,-3]
 14168
 14169	040652	200 06 0 00 041616 	E16600:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14170	040653	200 07 0 00 041627 		MOVE	AC+1,[XWD -1,-2]	;INITIALIZE AC+1
 14171	040654	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14172	040655	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14173	040656	003 06 0 00 016601 		ER3	AC,16601			;RESULT IN AC IS INCORRECT
 14174	040657	312 07 0 00 041630 		CAME	AC+1,[XWD -1,-3]	;IS RESULT IN AC+1 CORRECT?
 14175	040660	004 07 0 00 016601 		ER4	AC+1,16601		;RESULT IN AC+1 IS INCORRECT
 14176	040661	321 10 0 00 040652 		JUMPL	AC+2,E16600		;LOOP ON ERROR SWITCH^
 14177
 14178					;SHIFT CONNECTIONS TEST
 14179					;TEST MQ1 SHLT INP-ONE'S - ROTC AC,1
 14180					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14181						SR2	(167,0,0,100000,0,0,0,200000,0,ROTC,1)^
 14182					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14183					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 100000,0] 1 BIT POSITIONS AND
 14184					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14185					;[XWD 200000,0]
 14186
 14187	040662	200 06 0 00 041615 	E16700:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14188	040663	200 07 0 00 041631 		MOVE	AC+1,[XWD 100000,0]	;INITIALIZE AC+1
 14189	040664	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14190	040665	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14191	040666	003 06 0 00 016701 		ER3	AC,16701			;RESULT IN AC IS INCORRECT
 14192	040667	312 07 0 00 041632 		CAME	AC+1,[XWD 200000,0]	;IS RESULT IN AC+1 CORRECT?
 14193	040670	004 07 0 00 016701 		ER4	AC+1,16701		;RESULT IN AC+1 IS INCORRECT
 14194	040671	321 10 0 00 040662 		JUMPL	AC+2,E16700		;LOOP ON ERROR SWITCH^
 14195
 14196					;SHIFT CONNECTIONS TEST
 14197					;TEST MQ1 SHLT INP-ZERO'S - ROTC AC,1
 14198					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14199						SR2	(170,-1,-1,677777,-1,-1,-1,577777,-1,ROTC,1)^
 14200					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14201					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 677777,-1] 1 BIT POSITIONS AND
 14202					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14203					;[XWD 577777,-1]
 14204
 14205	040672	200 06 0 00 041616 	E17000:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14206	040673	200 07 0 00 041633 		MOVE	AC+1,[XWD 677777,-1]	;INITIALIZE AC+1
 14207	040674	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14208	040675	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14209	040676	003 06 0 00 017001 		ER3	AC,17001			;RESULT IN AC IS INCORRECT
 14210	040677	312 07 0 00 041634 		CAME	AC+1,[XWD 577777,-1]	;IS RESULT IN AC+1 CORRECT?
 14211	040700	004 07 0 00 017001 		ER4	AC+1,17001		;RESULT IN AC+1 IS INCORRECT
 14212	040701	321 10 0 00 040672 		JUMPL	AC+2,E17000		;LOOP ON ERROR SWITCH^
 14213					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 37-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0308

 14214					;SHIFT CONNECTIONS TEST
 14215					;TEST MQ0 SHLT INP-ONE'S - ROTC AC,1
 14216					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14217						SR2	(171,0,0,200000,0,0,0,400000,0,ROTC,1)^
 14218					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14219					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 200000,0] 1 BIT POSITIONS AND
 14220					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14221					;[XWD 400000,0]
 14222
 14223	040702	200 06 0 00 041615 	E17100:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14224	040703	200 07 0 00 041632 		MOVE	AC+1,[XWD 200000,0]	;INITIALIZE AC+1
 14225	040704	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14226	040705	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14227	040706	003 06 0 00 017101 		ER3	AC,17101			;RESULT IN AC IS INCORRECT
 14228	040707	312 07 0 00 041624 		CAME	AC+1,[XWD 400000,0]	;IS RESULT IN AC+1 CORRECT?
 14229	040710	004 07 0 00 017101 		ER4	AC+1,17101		;RESULT IN AC+1 IS INCORRECT
 14230	040711	321 10 0 00 040702 		JUMPL	AC+2,E17100		;LOOP ON ERROR SWITCH^
 14231
 14232					;SHIFT CONNECTIONS TEST
 14233					;TEST MQ0 SHLT INP-ZERO'S - ROTC AC,1
 14234					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14235						SR2	(172,-1,-1,577777,-1,-1,-1,377777,-1,ROTC,1)^
 14236					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14237					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 577777,-1] 1 BIT POSITIONS AND
 14238					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14239					;[XWD 377777,-1]
 14240
 14241	040712	200 06 0 00 041616 	E17200:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14242	040713	200 07 0 00 041634 		MOVE	AC+1,[XWD 577777,-1]	;INITIALIZE AC+1
 14243	040714	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14244	040715	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14245	040716	003 06 0 00 017201 		ER3	AC,17201			;RESULT IN AC IS INCORRECT
 14246	040717	312 07 0 00 041626 		CAME	AC+1,[XWD 377777,-1]	;IS RESULT IN AC+1 CORRECT?
 14247	040720	004 07 0 00 017201 		ER4	AC+1,17201		;RESULT IN AC+1 IS INCORRECT
 14248	040721	321 10 0 00 040712 		JUMPL	AC+2,E17200		;LOOP ON ERROR SWITCH^
 14249
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 38
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0309

 14250					;SHIFT CONNECTIONS TEST
 14251					;TEST AR35 SHLT INP-ONE'S - ROTC AC,1
 14252					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14253						SR2	(173,0,0,400000,0,0,1,0,0,ROTC,1)^
 14254					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14255					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 400000,0] 1 BIT POSITIONS AND
 14256					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
 14257					;[XWD 0,0]
 14258
 14259	040722	200 06 0 00 041615 	E17300:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14260	040723	200 07 0 00 041624 		MOVE	AC+1,[XWD 400000,0]	;INITIALIZE AC+1
 14261	040724	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14262	040725	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 14263	040726	003 06 0 00 017301 		ER3	AC,17301			;RESULT IN AC IS INCORRECT
 14264	040727	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14265	040730	004 07 0 00 017301 		ER4	AC+1,17301		;RESULT IN AC+1 IS INCORRECT
 14266	040731	321 10 0 00 040722 		JUMPL	AC+2,E17300		;LOOP ON ERROR SWITCH^
 14267
 14268					;SHIFT CONNECTIONS TEST
 14269					;TEST AR35 SHLT INP-ZERO'S - ROTC AC,1
 14270					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14271						SR2	(174,-1,-1,377777,-1,-1,-2,-1,-1,ROTC,1)^
 14272					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14273					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 377777,-1] 1 BIT POSITIONS AND
 14274					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
 14275					;[XWD -1,-1]
 14276
 14277	040732	200 06 0 00 041616 	E17400:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14278	040733	200 07 0 00 041626 		MOVE	AC+1,[XWD 377777,-1]	;INITIALIZE AC+1
 14279	040734	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14280	040735	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 14281	040736	003 06 0 00 017401 		ER3	AC,17401			;RESULT IN AC IS INCORRECT
 14282	040737	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14283	040740	004 07 0 00 017401 		ER4	AC+1,17401		;RESULT IN AC+1 IS INCORRECT
 14284	040741	321 10 0 00 040732 		JUMPL	AC+2,E17400		;LOOP ON ERROR SWITCH^
 14285
 14286					;SHIFT CONNECTIONS TEST
 14287					;TEST AR34 SHLT INP-ONE'S - ROTC AC,1
 14288					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14289						SR2	(175,0,1,0,0,0,2,0,0,ROTC,1)^
 14290					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14291					;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] 1 BIT POSITIONS AND
 14292					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
 14293					;[XWD 0,0]
 14294
 14295	040742	200 06 0 00 041625 	E17500:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 14296	040743	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14297	040744	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14298	040745	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 14299	040746	003 06 0 00 017501 		ER3	AC,17501			;RESULT IN AC IS INCORRECT
 14300	040747	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14301	040750	004 07 0 00 017501 		ER4	AC+1,17501		;RESULT IN AC+1 IS INCORRECT
 14302	040751	321 10 0 00 040742 		JUMPL	AC+2,E17500		;LOOP ON ERROR SWITCH^
 14303
 14304					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 38-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0310

 14305					;TEST AR34 SHLT INP-ZERO'S - ROTC AC,1
 14306					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14307						SR2	(176,-1,-2,-1,-1,-1,-3,-1,-1,ROTC,1)^
 14308					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14309					;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] 1 BIT POSITIONS AND
 14310					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
 14311					;[XWD -1,-1]
 14312
 14313	040752	200 06 0 00 041627 	E17600:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 14314	040753	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14315	040754	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14316	040755	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 14317	040756	003 06 0 00 017601 		ER3	AC,17601			;RESULT IN AC IS INCORRECT
 14318	040757	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14319	040760	004 07 0 00 017601 		ER4	AC+1,17601		;RESULT IN AC+1 IS INCORRECT
 14320	040761	321 10 0 00 040752 		JUMPL	AC+2,E17600		;LOOP ON ERROR SWITCH^
 14321					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 38-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0311

 14322					;SHIFT CONNECTIONS TEST
 14323					;TEST AR1 SHLT INP-ONE'S - ROTC AC,1
 14324					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14325						SR2	(177,100000,0,0,0,200000,0,0,0,ROTC,1)^
 14326					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14327					;DATA SPECIFIED IN [XWD 100000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
 14328					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
 14329					;[XWD 0,0]
 14330
 14331	040762	200 06 0 00 041631 	E17700:	MOVE	AC,[XWD 100000,0]	;INITIALIZE AC
 14332	040763	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14333	040764	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14334	040765	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 14335	040766	003 06 0 00 017701 		ER3	AC,17701			;RESULT IN AC IS INCORRECT
 14336	040767	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14337	040770	004 07 0 00 017701 		ER4	AC+1,17701		;RESULT IN AC+1 IS INCORRECT
 14338	040771	321 10 0 00 040762 		JUMPL	AC+2,E17700		;LOOP ON ERROR SWITCH^
 14339
 14340					;SHIFT CONNECTIONS TEST
 14341					;TEST AR1 SHLT INP-ZERO'S - ROTC AC,1
 14342					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14343						SR2	(200,677777,-1,-1,-1,577777,-1,-1,-1,ROTC,1)^
 14344					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14345					;DATA SPECIFIED IN [XWD 677777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
 14346					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
 14347					;[XWD -1,-1]
 14348
 14349	040772	200 06 0 00 041633 	E20000:	MOVE	AC,[XWD 677777,-1]	;INITIALIZE AC
 14350	040773	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14351	040774	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14352	040775	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 14353	040776	003 06 0 00 020001 		ER3	AC,20001			;RESULT IN AC IS INCORRECT
 14354	040777	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14355	041000	004 07 0 00 020001 		ER4	AC+1,20001		;RESULT IN AC+1 IS INCORRECT
 14356	041001	321 10 0 00 040772 		JUMPL	AC+2,E20000		;LOOP ON ERROR SWITCH^
 14357
 14358					;SHIFT CONNECTIONS TEST
 14359					;TEST AR0 SHLT INP-ONE'S - ROTC AC,1
 14360					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14361						SR2	(201,200000,0,0,0,400000,0,0,0,ROTC,1)^
 14362					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14363					;DATA SPECIFIED IN [XWD 200000,0] AND [XWD 0,0] 1 BIT POSITIONS AND
 14364					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
 14365					;[XWD 0,0]
 14366
 14367	041002	200 06 0 00 041632 	E20100:	MOVE	AC,[XWD 200000,0]	;INITIALIZE AC
 14368	041003	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14369	041004	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14370	041005	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 14371	041006	003 06 0 00 020101 		ER3	AC,20101			;RESULT IN AC IS INCORRECT
 14372	041007	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14373	041010	004 07 0 00 020101 		ER4	AC+1,20101		;RESULT IN AC+1 IS INCORRECT
 14374	041011	321 10 0 00 041002 		JUMPL	AC+2,E20100		;LOOP ON ERROR SWITCH^
 14375
 14376					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 38-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0312

 14377					;TEST AR0 SHLT INP-ZERO'S - ROTC AC,1
 14378					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14379						SR2	(202,577777,-1,-1,-1,377777,-1,-1,-1,ROTC,1)^
 14380					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14381					;DATA SPECIFIED IN [XWD 577777,-1] AND [XWD -1,-1] 1 BIT POSITIONS AND
 14382					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
 14383					;[XWD -1,-1]
 14384
 14385	041012	200 06 0 00 041634 	E20200:	MOVE	AC,[XWD 577777,-1]	;INITIALIZE AC
 14386	041013	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14387	041014	245 06 0 00 000001 		ROTC	AC,1			;*SHIFT/ROTATE COMBINED 1 PLACES
 14388	041015	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 14389	041016	003 06 0 00 020201 		ER3	AC,20201			;RESULT IN AC IS INCORRECT
 14390	041017	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14391	041020	004 07 0 00 020201 		ER4	AC+1,20201		;RESULT IN AC+1 IS INCORRECT
 14392	041021	321 10 0 00 041012 		JUMPL	AC+2,E20200		;LOOP ON ERROR SWITCH^
 14393
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 39
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0313

 14394					;SHIFT CONNECTIONS TEST
 14395					;TEST AR0 SHRT INP-ONE'S - ROTC AC,-1
 14396					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14397						SR2	(203,0,0,0,1,400000,0,0,0,ROTC,-1)^
 14398					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14399					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] -1 BIT POSITIONS AND
 14400					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
 14401					;[XWD 0,0]
 14402
 14403	041022	200 06 0 00 041615 	E20300:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14404	041023	200 07 0 00 041625 		MOVE	AC+1,[XWD 0,1]	;INITIALIZE AC+1
 14405	041024	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14406	041025	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 14407	041026	003 06 0 00 020301 		ER3	AC,20301			;RESULT IN AC IS INCORRECT
 14408	041027	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14409	041030	004 07 0 00 020301 		ER4	AC+1,20301		;RESULT IN AC+1 IS INCORRECT
 14410	041031	321 10 0 00 041022 		JUMPL	AC+2,E20300		;LOOP ON ERROR SWITCH^
 14411
 14412					;SHIFT CONNECTIONS TEST
 14413					;TEST AR0 SHRT INP-ZERO'S - ROTC AC,-1
 14414					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14415						SR2	(204,-1,-1,-1,-2,377777,-1,-1,-1,ROTC,-1)^
 14416					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14417					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] -1 BIT POSITIONS AND
 14418					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
 14419					;[XWD -1,-1]
 14420
 14421	041032	200 06 0 00 041616 	E20400:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14422	041033	200 07 0 00 041627 		MOVE	AC+1,[XWD -1,-2]	;INITIALIZE AC+1
 14423	041034	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14424	041035	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 14425	041036	003 06 0 00 020401 		ER3	AC,20401			;RESULT IN AC IS INCORRECT
 14426	041037	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14427	041040	004 07 0 00 020401 		ER4	AC+1,20401		;RESULT IN AC+1 IS INCORRECT
 14428	041041	321 10 0 00 041032 		JUMPL	AC+2,E20400		;LOOP ON ERROR SWITCH^
 14429
 14430					;SHIFT CONNECTIONS TEST
 14431					;TEST AR1 SHRT INP-ONE'S - ROTC AC,-1
 14432					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14433						SR2	(205,400000,0,0,0,200000,0,0,0,ROTC,-1)^
 14434					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14435					;DATA SPECIFIED IN [XWD 400000,0] AND [XWD 0,0] -1 BIT POSITIONS AND
 14436					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
 14437					;[XWD 0,0]
 14438
 14439	041042	200 06 0 00 041624 	E20500:	MOVE	AC,[XWD 400000,0]	;INITIALIZE AC
 14440	041043	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14441	041044	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14442	041045	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 14443	041046	003 06 0 00 020501 		ER3	AC,20501			;RESULT IN AC IS INCORRECT
 14444	041047	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14445	041050	004 07 0 00 020501 		ER4	AC+1,20501		;RESULT IN AC+1 IS INCORRECT
 14446	041051	321 10 0 00 041042 		JUMPL	AC+2,E20500		;LOOP ON ERROR SWITCH^
 14447
 14448					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 39-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0314

 14449					;TEST AR1 SHRT INP-ZERO'S - ROTC AC,-1
 14450					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14451						SR2	(206,377777,-1,-1,-1,577777,-1,-1,-1,ROTC,-1)^
 14452					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14453					;DATA SPECIFIED IN [XWD 377777,-1] AND [XWD -1,-1] -1 BIT POSITIONS AND
 14454					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
 14455					;[XWD -1,-1]
 14456
 14457	041052	200 06 0 00 041626 	E20600:	MOVE	AC,[XWD 377777,-1]	;INITIALIZE AC
 14458	041053	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14459	041054	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14460	041055	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 14461	041056	003 06 0 00 020601 		ER3	AC,20601			;RESULT IN AC IS INCORRECT
 14462	041057	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14463	041060	004 07 0 00 020601 		ER4	AC+1,20601		;RESULT IN AC+1 IS INCORRECT
 14464	041061	321 10 0 00 041052 		JUMPL	AC+2,E20600		;LOOP ON ERROR SWITCH^
 14465					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 39-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0315

 14466					;SHIFT CONNECTIONS TEST
 14467					;TEST AR34 SHRT INP-ONE'S - ROTC AC,-1
 14468					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14469						SR2	(207,0,4,0,0,0,2,0,0,ROTC,-1)^
 14470					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14471					;DATA SPECIFIED IN [XWD 0,4] AND [XWD 0,0] -1 BIT POSITIONS AND
 14472					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
 14473					;[XWD 0,0]
 14474
 14475	041062	200 06 0 00 041622 	E20700:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 14476	041063	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14477	041064	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14478	041065	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 14479	041066	003 06 0 00 020701 		ER3	AC,20701			;RESULT IN AC IS INCORRECT
 14480	041067	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14481	041070	004 07 0 00 020701 		ER4	AC+1,20701		;RESULT IN AC+1 IS INCORRECT
 14482	041071	321 10 0 00 041062 		JUMPL	AC+2,E20700		;LOOP ON ERROR SWITCH^
 14483
 14484					;SHIFT CONNECTIONS TEST
 14485					;TEST AR34 SHRT INP-ZERO'S - ROTC AC,-1
 14486					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14487						SR2	(210,-1,-5,-1,-1,-1,-3,-1,-1,ROTC,-1)^
 14488					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14489					;DATA SPECIFIED IN [XWD -1,-5] AND [XWD -1,-1] -1 BIT POSITIONS AND
 14490					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
 14491					;[XWD -1,-1]
 14492
 14493	041072	200 06 0 00 041635 	E21000:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 14494	041073	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14495	041074	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14496	041075	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 14497	041076	003 06 0 00 021001 		ER3	AC,21001			;RESULT IN AC IS INCORRECT
 14498	041077	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14499	041100	004 07 0 00 021001 		ER4	AC+1,21001		;RESULT IN AC+1 IS INCORRECT
 14500	041101	321 10 0 00 041072 		JUMPL	AC+2,E21000		;LOOP ON ERROR SWITCH^
 14501
 14502					;SHIFT CONNECTIONS TEST
 14503					;TEST AR35 SHRT INP-ONE'S - ROTC AC,-1
 14504					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14505						SR2	(211,0,2,0,0,0,1,0,0,ROTC,-1)^
 14506					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14507					;DATA SPECIFIED IN [XWD 0,2] AND [XWD 0,0] -1 BIT POSITIONS AND
 14508					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
 14509					;[XWD 0,0]
 14510
 14511	041102	200 06 0 00 041623 	E21100:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 14512	041103	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14513	041104	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14514	041105	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 14515	041106	003 06 0 00 021101 		ER3	AC,21101			;RESULT IN AC IS INCORRECT
 14516	041107	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14517	041110	004 07 0 00 021101 		ER4	AC+1,21101		;RESULT IN AC+1 IS INCORRECT
 14518	041111	321 10 0 00 041102 		JUMPL	AC+2,E21100		;LOOP ON ERROR SWITCH^
 14519
 14520					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 39-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0316

 14521					;TEST AR35 SHRT INP-ZERO'S - ROTC AC,-1
 14522					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14523						SR2	(212,-1,-3,-1,-1,-1,-2,-1,-1,ROTC,-1)^
 14524					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14525					;DATA SPECIFIED IN [XWD -1,-3] AND [XWD -1,-1] -1 BIT POSITIONS AND
 14526					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
 14527					;[XWD -1,-1]
 14528
 14529	041112	200 06 0 00 041630 	E21200:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 14530	041113	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14531	041114	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14532	041115	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 14533	041116	003 06 0 00 021201 		ER3	AC,21201			;RESULT IN AC IS INCORRECT
 14534	041117	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14535	041120	004 07 0 00 021201 		ER4	AC+1,21201		;RESULT IN AC+1 IS INCORRECT
 14536	041121	321 10 0 00 041112 		JUMPL	AC+2,E21200		;LOOP ON ERROR SWITCH^
 14537
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 40
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0317

 14538					;SHIFT CONNECTIONS TEST
 14539					;TEST MQ0 SHRT INP-ONE'S - ROTC AC,-1
 14540					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14541						SR2	(213,0,1,0,0,0,0,400000,0,ROTC,-1)^
 14542					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14543					;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] -1 BIT POSITIONS AND
 14544					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14545					;[XWD 400000,0]
 14546
 14547	041122	200 06 0 00 041625 	E21300:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 14548	041123	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14549	041124	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14550	041125	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14551	041126	003 06 0 00 021301 		ER3	AC,21301			;RESULT IN AC IS INCORRECT
 14552	041127	312 07 0 00 041624 		CAME	AC+1,[XWD 400000,0]	;IS RESULT IN AC+1 CORRECT?
 14553	041130	004 07 0 00 021301 		ER4	AC+1,21301		;RESULT IN AC+1 IS INCORRECT
 14554	041131	321 10 0 00 041122 		JUMPL	AC+2,E21300		;LOOP ON ERROR SWITCH^
 14555
 14556					;SHIFT CONNECTIONS TEST
 14557					;TEST MQ0 SHRT INP-ZERO'S - ROTC AC,-1
 14558					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14559						SR2	(214,-1,-2,-1,-1,-1,-1,377777,-1,ROTC,-1)^
 14560					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14561					;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] -1 BIT POSITIONS AND
 14562					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14563					;[XWD 377777,-1]
 14564
 14565	041132	200 06 0 00 041627 	E21400:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 14566	041133	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14567	041134	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14568	041135	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14569	041136	003 06 0 00 021401 		ER3	AC,21401			;RESULT IN AC IS INCORRECT
 14570	041137	312 07 0 00 041626 		CAME	AC+1,[XWD 377777,-1]	;IS RESULT IN AC+1 CORRECT?
 14571	041140	004 07 0 00 021401 		ER4	AC+1,21401		;RESULT IN AC+1 IS INCORRECT
 14572	041141	321 10 0 00 041132 		JUMPL	AC+2,E21400		;LOOP ON ERROR SWITCH^
 14573
 14574					;SHIFT CONNECTIONS TEST
 14575					;TEST MQ1 SHRT INP-ONE'S - ROTC AC,-1
 14576					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14577						SR2	(215,0,0,400000,0,0,0,200000,0,ROTC,-1)^
 14578					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14579					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 400000,0] -1 BIT POSITIONS AND
 14580					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14581					;[XWD 200000,0]
 14582
 14583	041142	200 06 0 00 041615 	E21500:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14584	041143	200 07 0 00 041624 		MOVE	AC+1,[XWD 400000,0]	;INITIALIZE AC+1
 14585	041144	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14586	041145	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14587	041146	003 06 0 00 021501 		ER3	AC,21501			;RESULT IN AC IS INCORRECT
 14588	041147	312 07 0 00 041632 		CAME	AC+1,[XWD 200000,0]	;IS RESULT IN AC+1 CORRECT?
 14589	041150	004 07 0 00 021501 		ER4	AC+1,21501		;RESULT IN AC+1 IS INCORRECT
 14590	041151	321 10 0 00 041142 		JUMPL	AC+2,E21500		;LOOP ON ERROR SWITCH^
 14591
 14592					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 40-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0318

 14593					;TEST MQ1 SHRT INP-ZERO'S - ROTC AC,-1
 14594					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14595						SR2	(216,-1,-1,377777,-1,-1,-1,577777,-1,ROTC,-1)^
 14596					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14597					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD 377777,-1] -1 BIT POSITIONS AND
 14598					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14599					;[XWD 577777,-1]
 14600
 14601	041152	200 06 0 00 041616 	E21600:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14602	041153	200 07 0 00 041626 		MOVE	AC+1,[XWD 377777,-1]	;INITIALIZE AC+1
 14603	041154	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14604	041155	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14605	041156	003 06 0 00 021601 		ER3	AC,21601			;RESULT IN AC IS INCORRECT
 14606	041157	312 07 0 00 041634 		CAME	AC+1,[XWD 577777,-1]	;IS RESULT IN AC+1 CORRECT?
 14607	041160	004 07 0 00 021601 		ER4	AC+1,21601		;RESULT IN AC+1 IS INCORRECT
 14608	041161	321 10 0 00 041152 		JUMPL	AC+2,E21600		;LOOP ON ERROR SWITCH^
 14609					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 40-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0319

 14610					;SHIFT CONNECTIONS TEST
 14611					;TEST MQ34 SHRT INP-ONE'S - ROTC AC,-1
 14612					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14613						SR2	(217,0,0,0,4,0,0,0,2,ROTC,-1)^
 14614					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14615					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,4] -1 BIT POSITIONS AND
 14616					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14617					;[XWD 0,2]
 14618
 14619	041162	200 06 0 00 041615 	E21700:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14620	041163	200 07 0 00 041622 		MOVE	AC+1,[XWD 0,4]	;INITIALIZE AC+1
 14621	041164	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14622	041165	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14623	041166	003 06 0 00 021701 		ER3	AC,21701			;RESULT IN AC IS INCORRECT
 14624	041167	312 07 0 00 041623 		CAME	AC+1,[XWD 0,2]	;IS RESULT IN AC+1 CORRECT?
 14625	041170	004 07 0 00 021701 		ER4	AC+1,21701		;RESULT IN AC+1 IS INCORRECT
 14626	041171	321 10 0 00 041162 		JUMPL	AC+2,E21700		;LOOP ON ERROR SWITCH^
 14627
 14628					;SHIFT CONNECTIONS TEST
 14629					;TEST MQ34 SHRT INP-ZERO'S - ROTC AC,-1
 14630					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14631						SR2	(220,-1,-1,-1,-5,-1,-1,-1,-3,ROTC,-1)^
 14632					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14633					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-5] -1 BIT POSITIONS AND
 14634					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14635					;[XWD -1,-3]
 14636
 14637	041172	200 06 0 00 041616 	E22000:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14638	041173	200 07 0 00 041635 		MOVE	AC+1,[XWD -1,-5]	;INITIALIZE AC+1
 14639	041174	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14640	041175	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14641	041176	003 06 0 00 022001 		ER3	AC,22001			;RESULT IN AC IS INCORRECT
 14642	041177	312 07 0 00 041630 		CAME	AC+1,[XWD -1,-3]	;IS RESULT IN AC+1 CORRECT?
 14643	041200	004 07 0 00 022001 		ER4	AC+1,22001		;RESULT IN AC+1 IS INCORRECT
 14644	041201	321 10 0 00 041172 		JUMPL	AC+2,E22000		;LOOP ON ERROR SWITCH^
 14645
 14646					;SHIFT CONNECTIONS TEST
 14647					;TEST MQ35 SHRT INP-ONE'S - ROTC AC,-1
 14648					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14649						SR2	(221,0,0,0,2,0,0,0,1,ROTC,-1)^
 14650					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14651					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,2] -1 BIT POSITIONS AND
 14652					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14653					;[XWD 0,1]
 14654
 14655	041202	200 06 0 00 041615 	E22100:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14656	041203	200 07 0 00 041623 		MOVE	AC+1,[XWD 0,2]	;INITIALIZE AC+1
 14657	041204	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14658	041205	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14659	041206	003 06 0 00 022101 		ER3	AC,22101			;RESULT IN AC IS INCORRECT
 14660	041207	312 07 0 00 041625 		CAME	AC+1,[XWD 0,1]	;IS RESULT IN AC+1 CORRECT?
 14661	041210	004 07 0 00 022101 		ER4	AC+1,22101		;RESULT IN AC+1 IS INCORRECT
 14662	041211	321 10 0 00 041202 		JUMPL	AC+2,E22100		;LOOP ON ERROR SWITCH^
 14663
 14664					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 40-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0320

 14665					;TEST MQ35 SHRT INP-ZERO'S - ROTC AC,-1
 14666					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14667						SR2	(222,-1,-1,-1,-3,-1,-1,-1,-2,ROTC,-1)^
 14668					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14669					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-3] -1 BIT POSITIONS AND
 14670					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14671					;[XWD -1,-2]
 14672
 14673	041212	200 06 0 00 041616 	E22200:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14674	041213	200 07 0 00 041630 		MOVE	AC+1,[XWD -1,-3]	;INITIALIZE AC+1
 14675	041214	245 06 0 00 777777 		ROTC	AC,-1			;*SHIFT/ROTATE COMBINED -1 PLACES
 14676	041215	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14677	041216	003 06 0 00 022201 		ER3	AC,22201			;RESULT IN AC IS INCORRECT
 14678	041217	312 07 0 00 041627 		CAME	AC+1,[XWD -1,-2]	;IS RESULT IN AC+1 CORRECT?
 14679	041220	004 07 0 00 022201 		ER4	AC+1,22201		;RESULT IN AC+1 IS INCORRECT
 14680	041221	321 10 0 00 041212 		JUMPL	AC+2,E22200		;LOOP ON ERROR SWITCH^
 14681
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 41
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0321

 14682					;SHIFT CONNECTIONS TEST
 14683					;TEST AR0 SHRT INP-ONE'S - ROTC AC,-2
 14684					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14685						SR2	(223,0,0,0,2,400000,0,0,0,ROTC,-2)^
 14686					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14687					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,2] -2 BIT POSITIONS AND
 14688					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 400000,0] AND
 14689					;[XWD 0,0]
 14690
 14691	041222	200 06 0 00 041615 	E22300:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14692	041223	200 07 0 00 041623 		MOVE	AC+1,[XWD 0,2]	;INITIALIZE AC+1
 14693	041224	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14694	041225	312 06 0 00 041624 		CAME	AC,[XWD 400000,0]	;IS RESULT IN AC CORRECT?
 14695	041226	003 06 0 00 022301 		ER3	AC,22301			;RESULT IN AC IS INCORRECT
 14696	041227	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14697	041230	004 07 0 00 022301 		ER4	AC+1,22301		;RESULT IN AC+1 IS INCORRECT
 14698	041231	321 10 0 00 041222 		JUMPL	AC+2,E22300		;LOOP ON ERROR SWITCH^
 14699
 14700					;SHIFT CONNECTIONS TEST
 14701					;TEST AR0 SHRT INP-ZERO'S - ROTC AC,-2
 14702					;TEST ABILITY TO ROTATE INTO BIT 0 OF AR
 14703						SR2	(224,-1,-1,-1,-3,377777,-1,-1,-1,ROTC,-2)^
 14704					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14705					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-3] -2 BIT POSITIONS AND
 14706					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 377777,-1] AND
 14707					;[XWD -1,-1]
 14708
 14709	041232	200 06 0 00 041616 	E22400:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14710	041233	200 07 0 00 041630 		MOVE	AC+1,[XWD -1,-3]	;INITIALIZE AC+1
 14711	041234	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14712	041235	312 06 0 00 041626 		CAME	AC,[XWD 377777,-1]	;IS RESULT IN AC CORRECT?
 14713	041236	003 06 0 00 022401 		ER3	AC,22401			;RESULT IN AC IS INCORRECT
 14714	041237	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14715	041240	004 07 0 00 022401 		ER4	AC+1,22401		;RESULT IN AC+1 IS INCORRECT
 14716	041241	321 10 0 00 041232 		JUMPL	AC+2,E22400		;LOOP ON ERROR SWITCH^
 14717
 14718					;SHIFT CONNECTIONS TEST
 14719					;TEST AR1 SHRT INP-ONE'S - ROTC AC,-2
 14720					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14721						SR2	(225,0,0,0,1,200000,0,0,0,ROTC,-2)^
 14722					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14723					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,1] -2 BIT POSITIONS AND
 14724					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 200000,0] AND
 14725					;[XWD 0,0]
 14726
 14727	041242	200 06 0 00 041615 	E22500:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14728	041243	200 07 0 00 041625 		MOVE	AC+1,[XWD 0,1]	;INITIALIZE AC+1
 14729	041244	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14730	041245	312 06 0 00 041632 		CAME	AC,[XWD 200000,0]	;IS RESULT IN AC CORRECT?
 14731	041246	003 06 0 00 022501 		ER3	AC,22501			;RESULT IN AC IS INCORRECT
 14732	041247	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14733	041250	004 07 0 00 022501 		ER4	AC+1,22501		;RESULT IN AC+1 IS INCORRECT
 14734	041251	321 10 0 00 041242 		JUMPL	AC+2,E22500		;LOOP ON ERROR SWITCH^
 14735
 14736					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 41-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0322

 14737					;TEST AR1 SHRT INP-ZERO'S - ROTC AC,-2
 14738					;TEST ABILITY TO ROTATE INTO BIT 1 OF AR
 14739						SR2	(226,-1,-1,-1,-2,577777,-1,-1,-1,ROTC,-2)^
 14740					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14741					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-2] -2 BIT POSITIONS AND
 14742					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 577777,-1] AND
 14743					;[XWD -1,-1]
 14744
 14745	041252	200 06 0 00 041616 	E22600:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14746	041253	200 07 0 00 041627 		MOVE	AC+1,[XWD -1,-2]	;INITIALIZE AC+1
 14747	041254	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14748	041255	312 06 0 00 041634 		CAME	AC,[XWD 577777,-1]	;IS RESULT IN AC CORRECT?
 14749	041256	003 06 0 00 022601 		ER3	AC,22601			;RESULT IN AC IS INCORRECT
 14750	041257	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14751	041260	004 07 0 00 022601 		ER4	AC+1,22601		;RESULT IN AC+1 IS INCORRECT
 14752	041261	321 10 0 00 041252 		JUMPL	AC+2,E22600		;LOOP ON ERROR SWITCH^
 14753					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 41-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0323

 14754					;SHIFT CONNECTIONS TEST
 14755					;TEST AR34 SHRT INP-ONE'S - ROTC AC,-2
 14756					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14757						SR2	(227,0,10,0,0,0,2,0,0,ROTC,-2)^
 14758					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14759					;DATA SPECIFIED IN [XWD 0,10] AND [XWD 0,0] -2 BIT POSITIONS AND
 14760					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,2] AND
 14761					;[XWD 0,0]
 14762
 14763	041262	200 06 0 00 041617 	E22700:	MOVE	AC,[XWD 0,10]	;INITIALIZE AC
 14764	041263	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14765	041264	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14766	041265	312 06 0 00 041623 		CAME	AC,[XWD 0,2]	;IS RESULT IN AC CORRECT?
 14767	041266	003 06 0 00 022701 		ER3	AC,22701			;RESULT IN AC IS INCORRECT
 14768	041267	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14769	041270	004 07 0 00 022701 		ER4	AC+1,22701		;RESULT IN AC+1 IS INCORRECT
 14770	041271	321 10 0 00 041262 		JUMPL	AC+2,E22700		;LOOP ON ERROR SWITCH^
 14771
 14772					;SHIFT CONNECTIONS TEST
 14773					;TEST AR34 SHRT INP-ZERO'S - ROTC AC,-2
 14774					;TEST ABILITY TO ROTATE INTO BIT 34 OF AR
 14775						SR2	(230,-1,-11,-1,-1,-1,-3,-1,-1,ROTC,-2)^
 14776					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14777					;DATA SPECIFIED IN [XWD -1,-11] AND [XWD -1,-1] -2 BIT POSITIONS AND
 14778					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-3] AND
 14779					;[XWD -1,-1]
 14780
 14781	041272	200 06 0 00 041636 	E23000:	MOVE	AC,[XWD -1,-11]	;INITIALIZE AC
 14782	041273	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14783	041274	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14784	041275	312 06 0 00 041630 		CAME	AC,[XWD -1,-3]	;IS RESULT IN AC CORRECT?
 14785	041276	003 06 0 00 023001 		ER3	AC,23001			;RESULT IN AC IS INCORRECT
 14786	041277	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14787	041300	004 07 0 00 023001 		ER4	AC+1,23001		;RESULT IN AC+1 IS INCORRECT
 14788	041301	321 10 0 00 041272 		JUMPL	AC+2,E23000		;LOOP ON ERROR SWITCH^
 14789
 14790					;SHIFT CONNECTIONS TEST
 14791					;TEST AR35 SHRT INP-ONE'S - ROTC AC,-2
 14792					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14793						SR2	(231,0,4,0,0,0,1,0,0,ROTC,-2)^
 14794					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14795					;DATA SPECIFIED IN [XWD 0,4] AND [XWD 0,0] -2 BIT POSITIONS AND
 14796					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,1] AND
 14797					;[XWD 0,0]
 14798
 14799	041302	200 06 0 00 041622 	E23100:	MOVE	AC,[XWD 0,4]	;INITIALIZE AC
 14800	041303	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14801	041304	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14802	041305	312 06 0 00 041625 		CAME	AC,[XWD 0,1]	;IS RESULT IN AC CORRECT?
 14803	041306	003 06 0 00 023101 		ER3	AC,23101			;RESULT IN AC IS INCORRECT
 14804	041307	312 07 0 00 041615 		CAME	AC+1,[XWD 0,0]	;IS RESULT IN AC+1 CORRECT?
 14805	041310	004 07 0 00 023101 		ER4	AC+1,23101		;RESULT IN AC+1 IS INCORRECT
 14806	041311	321 10 0 00 041302 		JUMPL	AC+2,E23100		;LOOP ON ERROR SWITCH^
 14807
 14808					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 41-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0324

 14809					;TEST AR35 SHRT INP-ZERO'S - ROTC AC,-2
 14810					;TEST ABILITY TO ROTATE INTO BIT 35 OF AR
 14811						SR2	(232,-1,-5,-1,-1,-1,-2,-1,-1,ROTC,-2)^
 14812					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14813					;DATA SPECIFIED IN [XWD -1,-5] AND [XWD -1,-1] -2 BIT POSITIONS AND
 14814					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-2] AND
 14815					;[XWD -1,-1]
 14816
 14817	041312	200 06 0 00 041635 	E23200:	MOVE	AC,[XWD -1,-5]	;INITIALIZE AC
 14818	041313	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14819	041314	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14820	041315	312 06 0 00 041627 		CAME	AC,[XWD -1,-2]	;IS RESULT IN AC CORRECT?
 14821	041316	003 06 0 00 023201 		ER3	AC,23201			;RESULT IN AC IS INCORRECT
 14822	041317	312 07 0 00 041616 		CAME	AC+1,[XWD -1,-1]	;IS RESULT IN AC+1 CORRECT?
 14823	041320	004 07 0 00 023201 		ER4	AC+1,23201		;RESULT IN AC+1 IS INCORRECT
 14824	041321	321 10 0 00 041312 		JUMPL	AC+2,E23200		;LOOP ON ERROR SWITCH^
 14825
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 42
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0325

 14826					;SHIFT CONNECTIONS TEST
 14827					;TEST MQ0 SHRT INP-ONE'S - ROTC AC,-2
 14828					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14829						SR2	(233,0,2,0,0,0,0,400000,0,ROTC,-2)^
 14830					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14831					;DATA SPECIFIED IN [XWD 0,2] AND [XWD 0,0] -2 BIT POSITIONS AND
 14832					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14833					;[XWD 400000,0]
 14834
 14835	041322	200 06 0 00 041623 	E23300:	MOVE	AC,[XWD 0,2]	;INITIALIZE AC
 14836	041323	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14837	041324	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14838	041325	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14839	041326	003 06 0 00 023301 		ER3	AC,23301			;RESULT IN AC IS INCORRECT
 14840	041327	312 07 0 00 041624 		CAME	AC+1,[XWD 400000,0]	;IS RESULT IN AC+1 CORRECT?
 14841	041330	004 07 0 00 023301 		ER4	AC+1,23301		;RESULT IN AC+1 IS INCORRECT
 14842	041331	321 10 0 00 041322 		JUMPL	AC+2,E23300		;LOOP ON ERROR SWITCH^
 14843
 14844					;SHIFT CONNECTIONS TEST
 14845					;TEST MQ0 SHRT INP-ZERO'S - ROTC AC,-2
 14846					;TEST ABILITY TO ROTATE INTO BIT 0 OF MQ
 14847						SR2	(234,-1,-3,-1,-1,-1,-1,377777,-1,ROTC,-2)^
 14848					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14849					;DATA SPECIFIED IN [XWD -1,-3] AND [XWD -1,-1] -2 BIT POSITIONS AND
 14850					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14851					;[XWD 377777,-1]
 14852
 14853	041332	200 06 0 00 041630 	E23400:	MOVE	AC,[XWD -1,-3]	;INITIALIZE AC
 14854	041333	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14855	041334	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14856	041335	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14857	041336	003 06 0 00 023401 		ER3	AC,23401			;RESULT IN AC IS INCORRECT
 14858	041337	312 07 0 00 041626 		CAME	AC+1,[XWD 377777,-1]	;IS RESULT IN AC+1 CORRECT?
 14859	041340	004 07 0 00 023401 		ER4	AC+1,23401		;RESULT IN AC+1 IS INCORRECT
 14860	041341	321 10 0 00 041332 		JUMPL	AC+2,E23400		;LOOP ON ERROR SWITCH^
 14861
 14862					;SHIFT CONNECTIONS TEST
 14863					;TEST MQ1 SHRT INP-ONE'S - ROTC AC,-2
 14864					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14865						SR2	(235,0,1,0,0,0,0,200000,0,ROTC,-2)^
 14866					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14867					;DATA SPECIFIED IN [XWD 0,1] AND [XWD 0,0] -2 BIT POSITIONS AND
 14868					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14869					;[XWD 200000,0]
 14870
 14871	041342	200 06 0 00 041625 	E23500:	MOVE	AC,[XWD 0,1]	;INITIALIZE AC
 14872	041343	200 07 0 00 041615 		MOVE	AC+1,[XWD 0,0]	;INITIALIZE AC+1
 14873	041344	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14874	041345	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14875	041346	003 06 0 00 023501 		ER3	AC,23501			;RESULT IN AC IS INCORRECT
 14876	041347	312 07 0 00 041632 		CAME	AC+1,[XWD 200000,0]	;IS RESULT IN AC+1 CORRECT?
 14877	041350	004 07 0 00 023501 		ER4	AC+1,23501		;RESULT IN AC+1 IS INCORRECT
 14878	041351	321 10 0 00 041342 		JUMPL	AC+2,E23500		;LOOP ON ERROR SWITCH^
 14879
 14880					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 42-1
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0326

 14881					;TEST MQ1 SHRT INP-ZERO'S - ROTC AC,-2
 14882					;TEST ABILITY TO ROTATE INTO BIT 1 OF MQ
 14883						SR2	(236,-1,-2,-1,-1,-1,-1,577777,-1,ROTC,-2)^
 14884					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14885					;DATA SPECIFIED IN [XWD -1,-2] AND [XWD -1,-1] -2 BIT POSITIONS AND
 14886					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14887					;[XWD 577777,-1]
 14888
 14889	041352	200 06 0 00 041627 	E23600:	MOVE	AC,[XWD -1,-2]	;INITIALIZE AC
 14890	041353	200 07 0 00 041616 		MOVE	AC+1,[XWD -1,-1]	;INITIALIZE AC+1
 14891	041354	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14892	041355	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14893	041356	003 06 0 00 023601 		ER3	AC,23601			;RESULT IN AC IS INCORRECT
 14894	041357	312 07 0 00 041634 		CAME	AC+1,[XWD 577777,-1]	;IS RESULT IN AC+1 CORRECT?
 14895	041360	004 07 0 00 023601 		ER4	AC+1,23601		;RESULT IN AC+1 IS INCORRECT
 14896	041361	321 10 0 00 041352 		JUMPL	AC+2,E23600		;LOOP ON ERROR SWITCH^
 14897					PAGE
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 42-2
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0327

 14898					;SHIFT CONNECTIONS TEST
 14899					;TEST MQ34 SHRT INP-ONE'S - ROTC AC,-2
 14900					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14901						SR2	(237,0,0,0,10,0,0,0,2,ROTC,-2)^
 14902					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14903					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,10] -2 BIT POSITIONS AND
 14904					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14905					;[XWD 0,2]
 14906
 14907	041362	200 06 0 00 041615 	E23700:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14908	041363	200 07 0 00 041617 		MOVE	AC+1,[XWD 0,10]	;INITIALIZE AC+1
 14909	041364	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14910	041365	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14911	041366	003 06 0 00 023701 		ER3	AC,23701			;RESULT IN AC IS INCORRECT
 14912	041367	312 07 0 00 041623 		CAME	AC+1,[XWD 0,2]	;IS RESULT IN AC+1 CORRECT?
 14913	041370	004 07 0 00 023701 		ER4	AC+1,23701		;RESULT IN AC+1 IS INCORRECT
 14914	041371	321 10 0 00 041362 		JUMPL	AC+2,E23700		;LOOP ON ERROR SWITCH^
 14915
 14916					;SHIFT CONNECTIONS TEST
 14917					;TEST MQ34 SHRT INP-ZERO'S - ROTC AC,-2
 14918					;TEST ABILITY TO ROTATE INTO BIT 34 OF MQ
 14919						SR2	(240,-1,-1,-1,-11,-1,-1,-1,-3,ROTC,-2)^
 14920					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14921					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-11] -2 BIT POSITIONS AND
 14922					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14923					;[XWD -1,-3]
 14924
 14925	041372	200 06 0 00 041616 	E24000:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14926	041373	200 07 0 00 041636 		MOVE	AC+1,[XWD -1,-11]	;INITIALIZE AC+1
 14927	041374	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14928	041375	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14929	041376	003 06 0 00 024001 		ER3	AC,24001			;RESULT IN AC IS INCORRECT
 14930	041377	312 07 0 00 041630 		CAME	AC+1,[XWD -1,-3]	;IS RESULT IN AC+1 CORRECT?
 14931	041400	004 07 0 00 024001 		ER4	AC+1,24001		;RESULT IN AC+1 IS INCORRECT
 14932	041401	321 10 0 00 041372 		JUMPL	AC+2,E24000		;LOOP ON ERROR SWITCH^
 14933
 14934					;SHIFT CONNECTIONS TEST
 14935					;TEST MQ35 SHRT INP-ONE'S - ROTC AC,-2
 14936					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14937						SR2	(241,0,0,0,4,0,0,0,1,ROTC,-2)^
 14938					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14939					;DATA SPECIFIED IN [XWD 0,0] AND [XWD 0,4] -2 BIT POSITIONS AND
 14940					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD 0,0] AND
 14941					;[XWD 0,1]
 14942
 14943	041402	200 06 0 00 041615 	E24100:	MOVE	AC,[XWD 0,0]	;INITIALIZE AC
 14944	041403	200 07 0 00 041622 		MOVE	AC+1,[XWD 0,4]	;INITIALIZE AC+1
 14945	041404	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14946	041405	312 06 0 00 041615 		CAME	AC,[XWD 0,0]	;IS RESULT IN AC CORRECT?
 14947	041406	003 06 0 00 024101 		ER3	AC,24101			;RESULT IN AC IS INCORRECT
 14948	041407	312 07 0 00 041625 		CAME	AC+1,[XWD 0,1]	;IS RESULT IN AC+1 CORRECT?
 14949	041410	004 07 0 00 024101 		ER4	AC+1,24101		;RESULT IN AC+1 IS INCORRECT
 14950	041411	321 10 0 00 041402 		JUMPL	AC+2,E24100		;LOOP ON ERROR SWITCH^
 14951
 14952					;SHIFT CONNECTIONS TEST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 42-3
DAKAIM	MAC	20-JAN-77 10:36		DIAGNOSTIC SECTION - END CONNECTIONS TEST (ROTC)                                   SEQ 0328

 14953					;TEST MQ35 SHRT INP-ZERO'S - ROTC AC,-2
 14954					;TEST ABILITY TO ROTATE INTO BIT 35 OF MQ
 14955						SR2	(242,-1,-1,-1,-5,-1,-1,-1,-2,ROTC,-2)^
 14956					;THIS MACRO PERFORMS A COMBINED SHIFT/ROTATE OPERATION ON THE
 14957					;DATA SPECIFIED IN [XWD -1,-1] AND [XWD -1,-5] -2 BIT POSITIONS AND
 14958					;COMPARES THE RESULT IN AC AND AC+1 TO THE DATA SPECIFIED IN [XWD -1,-1] AND
 14959					;[XWD -1,-2]
 14960
 14961	041412	200 06 0 00 041616 	E24200:	MOVE	AC,[XWD -1,-1]	;INITIALIZE AC
 14962	041413	200 07 0 00 041635 		MOVE	AC+1,[XWD -1,-5]	;INITIALIZE AC+1
 14963	041414	245 06 0 00 777776 		ROTC	AC,-2			;*SHIFT/ROTATE COMBINED -2 PLACES
 14964	041415	312 06 0 00 041616 		CAME	AC,[XWD -1,-1]	;IS RESULT IN AC CORRECT?
 14965	041416	003 06 0 00 024201 		ER3	AC,24201			;RESULT IN AC IS INCORRECT
 14966	041417	312 07 0 00 041627 		CAME	AC+1,[XWD -1,-2]	;IS RESULT IN AC+1 CORRECT?
 14967	041420	004 07 0 00 024201 		ER4	AC+1,24201		;RESULT IN AC+1 IS INCORRECT
 14968	041421	321 10 0 00 041412 		JUMPL	AC+2,E24200		;LOOP ON ERROR SWITCH^
 14969
 14970	041422	254 00 0 00 030057 	LAST1:	JRST	BEGEND
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
UUOERR	KLM	22-APR-75 01:42		*UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, V75B, APR 22,1975                       SEQ 0329

 14971					SUBTTL	*UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, V75B, APR 22,1975
 14972
 14973					;THIS SUBROUTINE PROVIDES ERROR REPORTING THRU THE USE OF UUO'S.
 14974
 14975	041423	202 00 0 00 041767 	ERRMES:	MOVEM	0,%ERAC0#	;SAVE AC0
 14976						IFDEF	EXCASB,<IFDEF	KI10,<
 14977						SKIPN	KAIFLG
 14978						JRST	.+5
 14979						SKIPE	USER		;USER MODE ?
 14980						JRST	.+3
 14981						SKIPE	MARGIN
 14982						DATAO	APR,[IMGNOF,,ISPDOF] ;CLR MARGINS >>
 14983	041424	202 01 0 00 041770 		MOVEM	1,%ERAC1#	;SAVE AC1
 14984	041425	202 02 0 00 041771 		MOVEM	2,%ERAC2#	;SAVE AC2
 14985	041426	350 00 0 00 030053 		AOS	ERRTLS		;INCREMENT ERROR TOTALS
 14986	041427	550 00 0 00 030114 		HRRZ	0,$SVUPC	;GET PC OF UUO
 14987	041430	316 00 0 00 030052 		CAMN	0,ERRPC		;PC = PC OF LAST ERROR ?
 14988	041431	350 00 0 00 041764 		AOS	MICNT#		;YES, ADD 1 TO ERROR COUNT
 14989	041432	200 00 0 00 041764 		MOVE	0,MICNT
 14990	041433	504 00 0 00 030114 		HRL	0,$SVUPC
 14991	041434	336 00 0 00 030041 		SKIPN	KLFLG		;NOT KL10
 14992	041435	332 00 0 00 030037 		SKIPE	USER		;AND NOT USER?
 14993	041436	254 00 0 00 041440 		JRST	.+2
 14994	041437	7 004 14 0 00 000000 		DATAO	PI,0		;YES, DISPLAY ERROR PC,ERROR COUNT
 14995	041440	402 00 0 00 041765 		SETZM	PROCED#		;CLEAR PROCEED FLAG
 14996	041441	037 10 0 00 000002 		SWITCH
 14997	041442	603 00 0 00 040000 		TLNE	NOPNT		;PRINTOUT ?
 14998	041443	254 00 0 00 041556 		JRST	%ERRS1		;NO, RESTORE AC'S AND RETURN
 14999	041444	200 01 0 00 030113 		MOVE	1,$SVUUO
 15000	041445	242 01 0 00 777745 		LSH	1,-^D27
 15001	041446	202 01 0 00 041766 		MOVEM	1,%ACS1A#	;SAVE UUO NUMBER
 15002	041447	200 00 0 00 041767 		MOVE	0,%ERAC0
 15003	041450	200 01 0 00 041770 		MOVE	1,%ERAC1
 15004	041451	335 00 1 00 041763 		SKIPGE	@ERRLOP		;ERR LOOP AC > OR = 0 ?
 15005	041452	254 00 0 00 041610 		JRST	%ERRS4		;NO, SEE IF PRINT ALL
 15006	041453	402 00 0 00 041764 	%ERMS1:	SETZM	MICNT		;CLEAR ERROR COUNT
 15007	041454	331 00 0 00 030043 		SKIPL	MONCTL		;DIAG MON OR SYS EXER ?
 15008	041455	254 00 0 00 041461 		JRST	.+4		;NO, DON'T NEED TITLE
 15009	041456	336 00 0 00 041772 		SKIPN	%ERFST#		;FIRST ERROR ?
 15010	041457	037 04 0 00 000002 		PNTNM			;YES, PRINT PROGRAM TITLE
 15011	041460	476 00 0 00 041772 		SETOM	%ERFST
 15012	041461	336 00 0 00 030047 		SKIPN	PASCNT		;FIRST PASS ?
 15013	041462	254 00 0 00 041466 		JRST	.+4		;YES
 15014						PMSG	<^TEST PASS COUNT = >^
 15015	041463	037 02 0 00 041651 		PSIXM	[SIXBIT\^TEST PASS COUNT = _\]^
 15016	041464	200 00 0 00 030047 		MOVE	PASCNT
 15017	041465	037 15 0 00 000000 		PNTDEC
 15018						PMSG	<^PC =   >^
 15019	041466	037 02 0 00 041655 		PSIXM	[SIXBIT\^PC =   _\]^
 15020	041467	550 00 0 00 030114 		HRRZ	0,$SVUPC	;GET PC OF UUO
 15021	041470	202 00 0 00 030052 		MOVEM	0,ERRPC		;SAVE FOR COMPARE
 15022	041471	037 06 0 00 000000 		PNT6			;PRINT UUO ADDRESS
 15023						XLIST
 15024						IFDEF	ERDIAG,<LIST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 2
UUOERR	KLM	22-APR-75 01:42		*UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, V75B, APR 22,1975                       SEQ 0330

 15025					;DIAGNOSTIC FORMAT ERROR PRINTER
 15026
 15027					;PRINT RESULT
 15028
 15029	041472				%ERMS2:	PMSG	<^RESULT  = >^
 15030	041472	037 02 0 00 041657 		PSIXM	[SIXBIT\^RESULT  = _\]^
 15031	041473	200 01 0 00 030113 		MOVE	1,$SVUUO	;GET AC # OF UUO
 15032	041474	242 01 0 00 777751 		LSH	1,-27
 15033	041475	405 01 0 00 000017 		ANDI	1,17
 15034	041476	200 00 0 01 000000 		MOVE	0,(1)		;GET C(AC)
 15035	041477	307 01 0 00 000001 		CAIG	1,1		;IS AC # = TO SAVE AC ?
 15036	041500	200 00 0 01 041767 		MOVE	0,%ERAC0(1)	;YES, GET SAVED AC
 15037	041501	037 13 0 00 000000 		PNTHW			;PRINT C(AC)
 15038
 15039	041502	200 00 0 00 030046 		MOVE	CONSW
 15040	041503	603 00 0 00 000200 		TLNE	TXTINH		;PRINT FAILURE DES AND FLT NBR ?
 15041	041504	254 00 0 00 041553 		JRST	%ERMORE		;NO, RESTORE AC'S ETC.
 15042
 15043					;PRINT FAILURE DESCRIPTOR
 15044
 15045	041505	200 01 0 00 041766 		MOVE	1,%ACS1A	;GET UUO NUMBER
 15046	041506	307 01 0 00 000001 		CAIG	1,1		;PRINT DESCRIPTOR ?
 15047	041507	254 00 0 00 041513 		JRST	%ERMS3		;NO, JUST PRINT FAULT NUMBER
 15048	041510	037 00 0 00 030242 		PCRL
 15049	041511	200 00 0 01 041537 		MOVE	%FLTTB(1)
 15050	041512	037 17 0 00 000000 		PNTAL			;PRINT FAULT DESCRIPTOR
 15051
 15052					;PRINT FAULT NUMBER
 15053
 15054	041513				%ERMS3:	PMSG	<^FAULT NUMBER = >^
 15055	041513	037 02 0 00 041661 		PSIXM	[SIXBIT\^FAULT NUMBER = _\]^
 15056	041514	201 00 0 00 041536 		MOVEI	TLET
 15057	041515	037 00 0 00 000000 		PNTA			;PRINT TEST LETTER
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 3
UUOERR	KLM	22-APR-75 01:42		*UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, V75B, APR 22,1975                       SEQ 0331

 15058
 15059	041516	550 00 0 00 030113 		HRRZ	$SVUUO
 15060	041517	602 00 0 00 700000 		TRNE	700000
 15061	041520	254 00 0 00 041534 		JRST	%ER6X
 15062	041521	602 00 0 00 070000 		TRNE	070000
 15063	041522	254 00 0 00 041532 		JRST	%ER5X
 15064	041523	602 00 0 00 007000 		TRNE	007000
 15065	041524	254 00 0 00 041530 		JRST	%ER4X
 15066	041525	037 03 0 00 000000 		PNT3			;PRINT FAULT NUMBER
 15067	041526	037 00 0 00 030242 	%ER7X:	PCRL
 15068	041527	254 00 0 00 041553 		JRST	%ERMORE
 15069
 15070	041530	037 04 0 00 000000 	%ER4X:	PNT4
 15071	041531	254 00 0 00 041526 		JRST	%ER7X
 15072	041532	037 05 0 00 000000 	%ER5X:	PNT5
 15073	041533	254 00 0 00 041526 		JRST	%ER7X
 15074	041534	037 06 0 00 000000 	%ER6X:	PNT6
 15075	041535	254 00 0 00 041526 		JRST	%ER7X
 15076
 15077					;FAILURE DESCRIPTORS
 15078
 15079	041536	000000	000000		TLET:	0			;TEST LETTER
 15080	041537	000000	000000		%FLTTB:	0			;DESCRIPTOR TABLE
 15081	041540	000000	041615		%NODES:	[0]			;NO DESCRIPTOR
 15082	041541	000000	041615		SPDES:	[0]			;SPECIAL USER FAILURE DESCRIPTOR
 15083	041542	000000	041664		$ACF:	[ASCIZ/C(AC) FAILED/]
 15084	041543	000000	041667		%AC1F:	[ASCIZ/C(AC+1) FAILED/]
 15085	041544	000000	041672		%EF:	[ASCIZ/C(E) FAILED/]
 15086	041545	000000	041675		%E1F:	[ASCIZ/C(E+1) FAILED/]
 15087	041546	000000	041700		%ARF:	[ASCIZ/C(C(ACR)) FAILED/]
 15088	041547	000000	041704		%AR1F:	[ASCIZ/C(C(ACR+1)) FAILED/]
 15089	041550	000000	041710		%ALF:	[ASCIZ/C(C(ACL)) FAILED/]
 15090	041551	000000	041714		%EEF:	[ASCIZ/C(C(E)) FAILED/]
 15091	041552	000000	041717		%FF:	[ASCIZ/FLAG FAILED/]
 15092					>
 15093						XLIST
 15094						LIST
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 8
UUOERR	KLM	22-APR-75 01:42		*UUOERR* OLD-UUO ERROR HANDLER SUBROUTINE, V75B, APR 22,1975                       SEQ 0332

 15095					;RESTORE AC'S AND RETURN OR HALT
 15096
 15097	041553	256 00 0 00 030101 	%ERMORE:XCT	ERMORE
 15098	041554	037 16 0 00 000002 		PNTMGN			;PRINT MARGINS
 15099	041555	037 10 0 00 000002 		SWITCH
 15100
 15101	041556	037 07 0 00 000003 	%ERRS1:	TTALTM			;ALTMODE CHECK
 15102	041557	254 00 0 00 041563 		JRST	.+4		;NONE
 15103	041560	201 00 0 00 041563 		MOVEI	.+3		;SAVE CONT ADDRESS
 15104	041561	202 00 0 00 000130 		MOVEM	JOBOPC
 15105	041562	254 00 1 00 030063 		JRST	@ALTMGO		;PERFORM TRANSFER
 15106	041563	200 00 0 00 030046 		MOVE	CONSW
 15107	041564	603 00 0 00 002000 		TLNE	0,ERSTOP	;HALT ON ERROR SWITCH SET ?
 15108	041565	037 14 0 00 000004 		ERRHLT			;YES
 15109	041566	607 00 0 00 004000 		TLNN	0,LOOPER	;LOOP ON ERROR SWITCH SET ?
 15110	041567	476 00 0 00 041765 		SETOM	PROCED		;NO, SET THE PROCEED FLAG
 15111	041570	603 00 0 00 010000 		TLNE	0,DING		;RING BELL SWITCH SET ?
 15112	041571	037 01 0 00 000007 		PBELL			;YES, GO RING BELL
 15113
 15114	041572	200 02 0 00 041771 	%ERRS2:	MOVE	2,%ERAC2	;RESTORE AC'S
 15115	041573	200 01 0 00 041770 		MOVE	1,%ERAC1
 15116	041574	476 00 1 00 041763 		SETOM	@ERRLOP		;SET C(ERR LOOP AC) TO -1
 15117	041575	336 00 0 00 041765 		SKIPN	PROCED		;LOOP ON ERROR ?
 15118	041576	254 00 0 00 041606 		JRST	%ERRS5		;YES
 15119	041577	350 00 1 00 041763 		AOS	@ERRLOP		;NO, INC C(ERR LOOP AC)
 15120	041600	350 00 1 00 041763 		AOS	@ERRLOP		;SO IT ='S 1
 15121	041601	331 00 0 00 030043 		SKIPL	MONCTL		;UNDER DIAGNOSTIC MONITOR ?
 15122	041602	254 00 0 00 041606 		JRST	%ERRS5		;NO, CONTINUE PROGRAM
 15123	041603	200 00 0 00 030053 		MOVE	0,ERRTLS	;YES
 15124	041604	301 00 0 00 000005 		CAIL	0,5		;PRINTED ALLOWED ERRORS ?
 15125	041605	254 00 0 00 030061 		JRST	$BEND2
 15126
 15127	041606	200 00 0 00 041767 	%ERRS5:	MOVE	0,%ERAC0	;NO, CONTINUE PROGRAM
 15128						IFDEF	EXCASB,<IFDEF KI10,<
 15129						SKIPN	KAIFLG
 15130						JRST	.+5
 15131						SKIPE	USER
 15132						JRST	.+3
 15133						SKIPE	MARGIN
 15134						DATAO	APR,MARGIN	;RESET MARGIN SYSTEM >>
 15135	041607	254 00 0 00 030065 		JRST	UUOEXT
 15136
 15137	041610	200 00 0 00 030046 	%ERRS4:	MOVE	0,CONSW
 15138	041611	607 00 0 00 001000 		TLNN	PALERS		;PRINT ALL ERRORS ?
 15139	041612	254 00 0 00 041556 		JRST	%ERRS1		;NO
 15140	041613	254 00 0 00 041453 		JRST	%ERMS1		;YES
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1
STOR	KLM	18-JAN-77 11:42		*STOR* RESERVED STORAGE, JAN 18,1977                                               SEQ 0333

 15141					SUBTTL	*STOR* RESERVED STORAGE, JAN 18,1977
 15142
 15143					;PROGRAM LITERALS
 15144
 15145						XLIST
 15146					IFNDEF	$LPAPER,<LIST>
 15147	041614					LIT
 15148	041614	101 111 000 000 000
 15149	041615	000000	000000
 15150	041616	777777	777777
 15151	041617	000000	000010
 15152	041620	741703	607417
 15153	041621	000000	000020
 15154	041622	000000	000004
 15155	041623	000000	000002
 15156	041624	400000	000000
 15157	041625	000000	000001
 15158	041626	377777	777777
 15159	041627	777777	777776
 15160	041630	777777	777775
 15161	041631	100000	000000
 15162	041632	200000	000000
 15163	041633	677777	777777
 15164	041634	577777	777777
 15165	041635	777777	777773
 15166	041636	777777	777767
 15167	041637	777777	777774
 15168	041640	577777	777776
 15169	041641	377777	777776
 15170	041642	177777	777777
 15171	041643	377777	777775
 15172	041644	177777	777775
 15173	041645	177777	777776
 15174	041646	600000	000000
 15175	041647	700000	000000
 15176	041650	077777	777777
 15177	041651	76 64 45 63 64 00
 15178	041652	60 41 63 63 00 43
 15179	041653	57 65 56 64 00 35
 15180	041654	00 77 00 00 00 00
 15181	041655	76 60 43 00 35 00
 15182	041656	00 00 77 00 00 00
 15183	041657	76 62 45 63 65 54
 15184	041660	64 00 00 35 00 77
 15185	041661	76 46 41 65 54 64
 15186	041662	00 56 65 55 42 45
 15187	041663	62 00 35 00 77 00
 15188	041664	103 050 101 103 051
 15189	041665	040 106 101 111 114
 15190	041666	105 104 000 000 000
 15191	041667	103 050 101 103 053
 15192	041670	061 051 040 106 101
 15193	041671	111 114 105 104 000
 15194	041672	103 050 105 051 040
 15195	041673	106 101 111 114 105
DAKAI PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC (9) 0,2	MACRO %52(537) 10:41 20-JAN-77 PAGE 1-1
STOR	KLM	18-JAN-77 11:42		*STOR* RESERVED STORAGE, JAN 18,1977                                               SEQ 0334

 15196	041674	104 000 000 000 000
 15197	041675	103 050 105 053 061
 15198	041676	051 040 106 101 111
 15199	041677	114 105 104 000 000
 15200	041700	103 050 103 050 101
 15201	041701	103 122 051 051 040
 15202	041702	106 101 111 114 105
 15203	041703	104 000 000 000 000
 15204	041704	103 050 103 050 101
 15205	041705	103 122 053 061 051
 15206	041706	051 040 106 101 111
 15207	041707	114 105 104 000 000
 15208	041710	103 050 103 050 101
 15209	041711	103 114 051 051 040
 15210	041712	106 101 111 114 105
 15211	041713	104 000 000 000 000
 15212	041714	103 050 103 050 105
 15213	041715	051 051 040 106 101
 15214	041716	111 114 105 104 000
 15215	041717	106 114 101 107 040
 15216	041720	106 101 111 114 105
 15217	041721	104 000 000 000 000
 15218						LIST
 15219	041722	000000	000000		ENDSLD:	0
 15220
 15221					IFDEF	DEBUG,<
 15222	041723				PATCH:	BLOCK DEBUG		;PATCHING AREA
 15223					>
 15224
 15225					;PROGRAM VARIABLES
 15226	041763					VAR
 15227
 15228					IFDEF	PGMEND,<
 15229	041773	000000	000000		END:	0
 15230			030000			END	BEGIN	>

NO ERRORS DETECTED

PROGRAM BREAK IS 000000
ABSLUTE BREAK IS 041774
CPU TIME USED 01:03.688

11K CORE USED