SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (LSHC)

EXIT:	DROPDV		;CLOSE LOGICAL OUTPUT FILE
	EXIT

PGMNAM:	ASCIZ/
PDP-10  KA10 BASIC INSTRUCTION DIAGNOSTIC #10 SHIFT-ROTATE [DAKAJ]
/

START:	PGMINT
	MOVE	[ASCIZ/AJ/]
	MOVEM	TLET

STARTA:	JRST	E00		;GO PERFORM DIAGNOSTIC
	AC=1
E00:	SAVEAC	(1,1)

;END CONNECTIONS-LSHC
;TEST AR-MQ END BIT INPUT GATES
;TEST LEFT-AR0,1,34,35 SHLT INP GATES
;          MQ0,1,34,35 SHLT INP GATES
;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
;	   MQ0,1,34,35 SHRT INPUT GATES
;AC,AC+1 ARE LOGICALLY SHIFTED LEFT/RIGHT AND
;END BITS ARE TESTED
;TEST ASSUMES BOTH REGISTERS ARE
;CAPABLE OF SHIFTING 1,-1 AND -2 BIT POSITIONS CORRECTLY
;INPUT GATES PREVIOUSLY TESTED ARE AGAIN
;TESTED HERE
;AN ERROR IS MOST LIKELY DUE TO FAILURE
;OF LSHC TO BRING UP ENABLING LEVEL

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(243,-1,-1,-1,-1,-1,-1,-1,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(244,0,0,0,1,0,0,0,2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(245,-1,-1,-1,-2,-1,-1,-1,-4,LSHC,1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ1 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(246,0,0,100000,0,0,0,200000,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(247,-1,-1,677777,-1,-1,-1,577777,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(250,0,0,200000,0,0,0,400000,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(251,-1,-1,577777,-1,-1,-1,377777,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(252,0,0,400000,0,0,1,0,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(253,-1,-1,377777,-1,-1,-2,-1,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(254,0,1,0,0,0,2,0,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(255,-1,-2,-1,-1,-1,-3,-1,-2,LSHC,1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR1 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(256,100000,0,0,0,200000,0,0,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(257,677777,-1,-1,-1,577777,-1,-1,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHLT INP-ONE'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(260,200000,0,0,0,400000,0,0,0,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHLT INP-ZERO'S - LSHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(261,577777,-1,-1,-1,377777,-1,-1,-2,LSHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(262,-1,-1,-1,-1,377777,-1,-1,-1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(263,400000,0,0,0,200000,0,0,0,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(264,377777,-1,-1,-1,177777,-1,-1,-1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(265,0,4,0,0,0,2,0,0,LSHC,-1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(266,-1,-5,-1,-1,377777,-3,-1,-1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(267,0,2,0,0,0,1,0,0,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(270,-1,-3,-1,-1,377777,-2,-1,-1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(271,0,1,0,0,0,0,400000,0,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(272,-1,-2,-1,-1,377777,-1,377777,-1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(273,0,0,400000,0,0,0,200000,0,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(274,-1,-1,377777,-1,377777,-1,577777,-1,LSHC,-1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(275,0,0,0,4,0,0,0,2,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(276,-1,-1,-1,-5,377777,-1,-1,-3,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ONE'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(277,0,0,0,2,0,0,0,1,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ZERO'S - LSHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(300,-1,-1,-1,-3,377777,-1,-1,-2,LSHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(301,-1,-1,-1,-1,177777,-1,-1,-1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(302,-1,-1,-1,-1,177777,-1,-1,-1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(303,0,10,0,0,0,2,0,0,LSHC,-2)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(304,-1,-11,-1,-1,177777,-3,-1,-1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(305,0,4,0,0,0,1,0,0,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(306,-1,-5,-1,-1,177777,-2,-1,-1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(307,0,2,0,0,0,0,400000,0,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(310,-1,-3,-1,-1,177777,-1,377777,-1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(311,0,1,0,0,0,0,200000,0,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(312,-1,-2,-1,-1,177777,-1,577777,-1,LSHC,-2)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(313,0,0,0,10,0,0,0,2,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(314,-1,-1,-1,-11,177777,-1,-1,-3,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ONE'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(315,0,0,0,4,0,0,0,1,LSHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ZERO'S - LSHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(316,-1,-1,-1,-5,177777,-1,-1,-2,LSHC,-2)

SUBTTL	DIAGNOSTIC SECTION - END CONNECTIONS TEST (ASHC)

;END CONNECTIONS-ASHC
;TEST AR-MQ END BIT INPUT GATES
;TEST LEFT-AR0,1,34,35 SHLT INP GATES
;          MQ0,1,34,35 SHLT INP GATES
;TEST RIGHT-AR0,1,34,35 SHRT INP GATES
;	   MQ0,1,34,35 SHRT INPUT GATES
;AC,AC+1 ARE ARITHMETICALLY SHIFTED LEFT/RIGHT AND
;END BITS ARE TESTED
;TEST ASSUMES BOTH REGISTERS ARE
;CAPABLE OF SHIFTING 1,-1 AND -2 BIT POSITIONS CORRECTLY

;GATES PREVIOUSLY TESTED,ARE AGAIN TESTED
;ERRORS MOST LIKELY DUE TO FAILURE OF
;ASHC TO BRING UP ENABLING LEVELS

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(317,-1,-1,-1,-1,-1,-1,-1,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(320,0,0,0,1,0,0,0,2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(321,-1,-1,-1,-2,-1,-1,-1,-4,ASHC,1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ1 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(322,0,0,100000,0,0,0,200000,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(323,-1,-1,677777,-1,-1,-1,577777,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHLT INP-ONE'S - ASHC AC,1
;RESULT IN MQ0 SHOULD AGREE WITH INITIAL AR0
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(324,400000,0,0,0,400000,0,400000,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHLT INP-ZERO'S - ASHC AC,1
;RESULT IN MQ0 SHOULD AGREE WITH INITIAL AR0
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(325,377777,-1,-1,-1,377777,-1,377777,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(326,0,0,200000,0,0,1,0,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(327,-1,-1,577777,-1,-1,-2,-1,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(330,0,1,0,0,0,2,0,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(331,-1,-2,-1,-1,-1,-3,-1,-2,ASHC,1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR1 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(332,100000,0,0,0,200000,0,0,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(333,677777,-1,-1,-1,577777,-1,-1,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHLT INP-ONE'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(334,400000,0,400000,0,400000,0,400000,0,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHLT INP-ZERO'S - ASHC AC,1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(335,377777,-1,377777,-1,377777,-1,377777,-2,ASHC,1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(336,400000,0,400000,0,600000,0,400000,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(337,377777,-1,377777,-1,177777,-1,377777,-1,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(340,400000,0,400000,0,600000,0,400000,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(341,377777,-1,377777,-1,177777,-1,377777,-1,ASHC,-1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(342,0,4,0,0,0,2,0,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(343,-1,-5,-1,-1,-1,-3,-1,-1,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(344,0,2,0,0,0,1,0,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(345,-1,-3,-1,-1,-1,-2,-1,-1,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(346,400000,0,0,0,600000,0,400000,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(347,377777,-1,-1,-1,177777,-1,377777,-1,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(350,0,1,0,0,0,0,200000,0,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(351,-1,-2,-1,-1,-1,-1,577777,-1,ASHC,-1)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(352,0,0,0,4,0,0,0,2,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(353,-1,-1,-1,-5,-1,-1,-1,-3,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ONE'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(354,0,0,0,2,0,0,0,1,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ZERO'S - ASHC AC,-1
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(355,-1,-1,-1,-3,-1,-1,-1,-2,ASHC,-1)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(356,400000,0,400000,0,700000,0,400000,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR0 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF AR
	SR2	(357,377777,-1,377777,-1,077777,-1,377777,-1,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(360,400000,0,400000,0,700000,0,400000,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR1 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF AR
	SR2	(361,377777,-1,377777,-1,077777,-1,377777,-1,ASHC,-2)
PAGE
;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(362,0,10,0,0,0,2,0,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR34 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF AR
	SR2	(363,-1,-11,-1,-1,-1,-3,-1,-1,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(364,0,4,0,0,0,1,0,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST AR35 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF AR
	SR2	(365,-1,-5,-1,-1,-1,-2,-1,-1,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(366,400000,0,0,0,700000,0,400000,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ0 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 0 OF MQ
	SR2	(367,377777,-1,-1,-1,077777,-1,377777,-1,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(370,0,2,0,0,0,0,200000,0,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ1 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 1 OF MQ
	SR2	(371,-1,-3,-1,-1,-1,-1,577777,-1,ASHC,-2)
PAGE
;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(372,0,0,0,10,0,0,0,2,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ34 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 34 OF MQ
	SR2	(373,-1,-1,-1,-11,-1,-1,-1,-3,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ONE'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(374,0,0,0,4,0,0,0,1,ASHC,-2)

;SHIFT CONNECTIONS TEST
;TEST MQ35 SHRT INP-ZERO'S - ASHC AC,-2
;TEST ABILITY TO SHIFT INTO BIT 35 OF MQ
	SR2	(375,-1,-1,-1,-5,-1,-1,-1,-2,ASHC,-2)
SUBTTL	DIAGNOSTIC SECTION - BIT POSITION RELIABILITY TEST

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(445,252525,252525,525252,525252,ROT,1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(446,525252,525252,252525,252525,ROT,1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(447,252525,252525,525252,525252,ROT,-1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(450,525252,525252,252525,252525,ROT,-1)
PAGE
;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(451,146314,631463,631463,146314,ROT,-2)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR1	(452,631463,146314,146314,631463,ROT,-2)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(453,252525,252525,252525,252525,525252,525252,525252,525252,ROTC,1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(454,525252,525252,525252,525252,252525,252525,252525,252525,ROTC,1)
PAGE
;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(455,252525,252525,252525,252525,525252,525252,525252,525252,ROTC,-1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(456,525252,525252,525252,525252,252525,252525,252525,252525,ROTC,-1)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(457,146314,631463,146314,631463,631463,146314,631463,146314,ROTC,-2)

;BIT POSITION RELIABILITY TEST
;TEST ABILITY TO ROTATE ONES AND ZEROS INTO ALL BIT POSITIONS
	SR2	(460,631463,146314,631463,146314,146314,631463,146314,631463,ROTC,-2)
SUBTTL	DIAGNOSTIC SECTION - SC GATING TEST

	AC=5
	SAVEAC	(1,1)

SN=37600
	ZZ=17

		;SHIFT LEFT
E37600:	REPEAT	^D3,<
;TEST SC HIGH ORDER BITS
;TEST THE ABILITY TO SET THE FOUR MOST
;SIGNIFICANT BITS
;AC IS LOGICALLY SHIFTED LEFT
;AND TESTED
;FAILURE TO SET BIT 0 RESULTS IN NO SHIFT
;AN ERROR WILL OCCUR IF AC EQUALS ZERO
;FOLLOWING A SHIFT
;FAILURE TO SET SC BIT 1,2 OR
;3 WILL RESULT IN EXCESSIVE SHIFTING

SN=SN+1
	ZZ=ZZ+1
	MOVEI	AC,1		;SET BIT 35
	LSH	AC,ZZ		;*SHIFT LEFT (N) NUMBER OF TIMES
	CAIN	AC,1		;TEST FOR SHIFT
	ER3	AC,SN		;SC BIT 0 FAILED TO SET
	SKIPN	AC		;SHIFT EXCEEDED OCTAL 44
	ER3	AC,SN		;SC BIT (N) FAILED TO SET
	JUMPL	AC+2,.-6	;LOOP ON ERROR SWITCH
>

SUBTTL	DIAGNOSTIC SECTION - SC AR CONTROL AND GATING TEST

;TEST SC AR EN
;TEST THE ABILITY OF SC AR EN TO
;AFFECT A TRANSFER BETWEEN SC AND AR
;MALFUNCTION OF SCAD OR SC COUNT GATES
;WILL AFFECT TEST
;AC IS ROTATED LEFT/RIGHT AND TESTED FOR
;EVIDENCE OF ROTATE

	AC=7
	SAVEAC	(1,1)

E37700:	MOVEI	AC,1		;SET BIT 35
	ROT	AC,-5		;*ROTATE RIGHT
	ROT	AC,7		;*ROTATE LEFT
	CAIN	AC,1		;TEST FOR PRESENCE
	ER3	AC,37701		;OF PULSE
	JUMPL	AC+2,E37700	;LOOP ON ERROR SWITCH

				;TEST PULSE WITH SC BITS 5-8
E40000:	MOVEI	AC,1		;SET BIT 35
	ROT	AC,17		;*ROTATE LEFT
	CAIN	AC,1		;TEST FOR ROTATE LEFT
	ER3	AC,40001		;SC AR EN FAILED
	JUMPL	AC+2,E40000	;LOOP ON ERROR SWITCH

				;TEST PULSE WITH SC BITS 4-8
E40100:	MOVEI	AC,1		;SET BIT 35
	ROT	AC,37		;*ROTATE LEFT
	CAIN	AC,1		;TEST FOR ROTATE LEFT
	ER3	AC,40101		;TEST FOR ROTATE LEFT
	JUMPL	AC+2,E40100	;LOOP ON ERROR SWITCH
	AC=6
	SAVEAC	(1,1)

SN=40200
	ZZ=0

E40200:	REPEAT	^D8, <
;TEST SC-AR CONNECTION-ONE'S
;TEST THE ABILITY OF SC AR EN
;TO TRANSFER ONE'S TO SC
;SC BITS EIGHT THROUGH ONE ARE SET IN TURN
;MALFUNCTION OF SCAD OR SC COUNT GATES
;WILL AFFECT TEST
;FAILURE OF A SHIFT COUNTER BIT TO SET
;RESULTS IN NO ROTATE

SN=SN+1
	ZZ=ZZ+ZZ
	IFE	ZZ,<ZZ=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE LEFT (N) NUMBER OF TIMES
	CAIN	AC,1		;TEST FOR ROTATE
	ER3	AC,SN		;SC BIT (N) FAILED TO SET
	JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
>
	AC=5
	SAVEAC	(1,1)

SN=40300
	XX=0
	ZZ=-1

E40300:	REPEAT	^D6, <
;TEST SC AR CONNETION-ZERO'S
;TEST THE ABILITY OF A SC BIT TO REMAIN
;A ZERO WHEN TRANSFERRING BR TO SC
;TEST DETECTS A SC F/F PERMENTLY SET TO A ONE
;TEST BY ROTATING RIGHT TWO,LEFT ONE
;MALFUNTION OF SCAD OR SC COUNT GATES
;WILL AFFECT TEST

SN=SN+1
	XX=XX+XX
	ZZ=ZZ+ZZ
	IFE	XX,<XX=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE RIGHT (N) NUMBER OF TIMES
	ROT	AC,XX		;*ROTATE LEFT (N) NUMBER OF TIMES
	CAIN	AC,1		;TEST FOR ROTATE
	ER3	AC,SN		;SC BIT (N) FAILED TO CLEAR
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
SUBTTL	DIAGNOSTIC SECTION - SC-SCAD GATING TEST

;TEST DIRECTION
;TEST THE ABILITY TO ROTATE IN THE
;SPECIFIED DIRECTION
;FAILURE OF AC TO ROTATE OR ROTATING IN THE
;WRONG DIRECTION WILL CAUSE AN ERROR
;MALFUNCTION OF SCAD OR SC COUNT GATES WILL
;CAUSE AN ERROR

	AC=4
	SAVEAC	(1,1)

				;TEST LEFT
E40400:	MOVEI	AC,400000	;SET AC BIT 18
	MOVSI	AC-1,-1		;SET LEFT,CLEAR RIGHT
	ROT	AC,3		;*ROTATE LEFT
	TDNN	AC,AC-1		;TEST DIRECTION
	ER3	AC,40401	;FAILED OR WRONG DIRECTION
	JUMPL	AC+2,E40400	;LOOP ON ERROR SWITCH

				;TEST RIGHT
E40500:	MOVSI	AC,1		;SET AC BIT 17
	MOVEI	AC-1,-1		;CLEAR LEFT,SET RIGHT
	ROT	AC,-3		;*ROTATE RIGHT
	TDNN	AC,AC-1		;TEST DIRECTION
	ER3	AC,40501	;FAILED OR WRONG DIRECTION
	JUMPL	AC+2,E40500	;LOOP ON ERROR SWITCH
	AC=3
	SAVEAC	(1,1)

SN=40600
	ZZ=0

		;TEST FOR NO ROTATE
E40600:	REPEAT	^D8,<
;SCAD-SC NEGATE SET UP TEST
;TEST A BIT FAILING TO CLEAR ON COMPLEMENT
;TEST SC+1 ENABLE
;A BIT FAILING TO CLEAR RESULTS IN NO ROTATE
;A BIT FAILING TO CLEAR AND SC+1 FAILING RESULTS
;IN ROT LEFT ONE
;MALFUNCTION OF SCAD OR SC COUNT GATES
;WILL AFFECT TEST

SN=SN+1
	ZZ=ZZ+ZZ
	IFE	ZZ,<ZZ=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE LEFT (N) NUMBER OF TIMES
	CAIN	AC,1		;SC BIT (N) FAILED TO CLEAR
	ER3	AC,SN		;ON NEGATE
	JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
>
PAGE
SN=40700
	ZZ=1

		;TEST FOR ROTATE LEFT ONE
E40700:	REPEAT	^D7,<
;SCAD-SC NEGATE SET UP TEST
;TEST A BIT FAILING TO CLEAR ON COMPLEMENT
;TEST SC+1 ENABLE
;A BIT FAILING TO CLEAR RESULTS IN NO ROTATE
;A BIT FAILING TO CLEAR AND SC+1 FAILING RESULTS
;IN ROT LEFT ONE
;MALFUNCTION OF SCAD OR SC COUNT GATES
;WILL AFFECT TEST

SN=SN+1
	ZZ=ZZ+ZZ
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE LEFT (N) NUMBER OF TIMES
	CAIN	AC,2		;SC BIT (N) FAILED TO CLEAR
	ER3	AC,SN		;AND SC+1 FAILED
	JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
>
	AC=2
	SAVEAC	(1,1)

SN=41000
	XX=1
	ZZ=0

		;ROTATE FROM 3 TO 17 TIMES
E41000:	REPEAT	^D5,<
;SCAD SC COUNT TEST
;TEST THE ABILITY OF SCAD TO PROPERLY
;COUNT THE SHIFT COUNTER
;TEST SC-SCAD CONNECTION
;AC IS ROTATED FROM 3 THROUGH 105 TIMES
;AN ERROR WILL OCCUR IF AC FAILS TO ROTATE
;THE CORRECT NUMBER OF BITS
;ROTATING TO THE LEFT EXERCISES MAXIMUM
;LOGIC

SN=SN+1
	XX=XX*10
	ZZ=ZZ+3
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	CAIE	AC,XX		;TEST AC
	ER3	AC,SN		;INCORRECT ROTATE
	JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
>
PAGE
SN=41100
	XX=0

		;ROTATE FROM 22 TO 41 TIMES
E41100:	REPEAT	^D6,<
;SCAD SC COUNT TEST
;TEST THE ABILITY OF SCAD TO PROPERLY
;COUNT THE SHIFT COUNTER
;TEST SC-SCAD CONNECTION
;AC IS ROTATED FROM 3 THROUGH 105 TIMES
;AN ERROR WILL OCCUR IF AC FAILS TO ROTATE
;THE CORRECT NUMBER OF BITS
;ROTATING TO THE LEFT EXERCISES MAXIMUM
;LOGIC

SN=SN+1
	XX=XX*10
	ZZ=ZZ+3
	IFE	XX,<XX=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	MOVSS	AC		;SWAP CONTENTS OF AC
	CAIE	AC,XX		;TEST AC
	ER3	AC,SN		;INCORRECT ROTATE
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
SN=41200
	XX=0

		;ROTATE FROM 44 TO 36 TIMES
E41200:	REPEAT	^D6,<
;SCAD SC COUNT TEST
;TEST THE ABILITY OF SCAD TO PROPERLY
;COUNT THE SHIFT COUNTER
;TEST SC-SCAD CONNECTION
;AC IS ROTATED FROM 3 THROUGH 105 TIMES
;AN ERROR WILL OCCUR IF AC FAILS TO ROTATE
;THE CORRECT NUMBER OF BITS
;ROTATING TO THE LEFT EXERCISES MAXIMUM
;LOGIC

SN=SN+1
	XX=XX*10
	ZZ=ZZ+3
	IFE	XX,<XX=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	CAIE	AC,XX		;TEST AC
	ER3	AC,SN		;INCORRECT ROTATE
	JUMPL	AC+2,.-4	;LOOP ON ERROR SWITCH
>
PAGE
SN=41300
	XX=0

		;ROTATE FROM 66 TO 105 TIMES
E41300:	REPEAT	^D6,<
;SCAD SC COUNT TEST
;TEST THE ABILITY OF SCAD TO PROPERLY
;COUNT THE SHIFT COUNTER
;TEST SC-SCAD CONNECTION
;AC IS ROTATED FROM 3 THROUGH 105 TIMES
;AN ERROR WILL OCCUR IF AC FAILS TO ROTATE
;THE CORRECT NUMBER OF BITS
;ROTATING TO THE LEFT EXERCISES MAXIMUM
;LOGIC

SN=SN+1
	XX=XX*10
	ZZ=ZZ+3
	IFE	XX,<XX=1>
	MOVEI	AC,1		;SET BIT 35
	ROT	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	MOVSS	AC		;SWAP CONTENTS OF AC
	CAIE	AC,XX		;TEST AC
	ER3	AC,SN		;INCORRECT ROTATE
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
SUBTTL	DIAGNOSTIC SECTION - SHIFT COUNTER RELIABILITY TEST

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(461,230703,603700,230703,603700,ROT,0)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(462,230703,603700,700230,703603,ROT,77)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(463,230703,603700,740114,341701,ROT,76)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(464,230703,603700,370023,070360,ROT,74)
PAGE
;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(465,230703,603700,017401,143417,ROT,70)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(466,230703,603700,036037,002307,ROT,60)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(467,230703,603700,011434,170174,ROT,40)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(470,230703,603700,600461,607407,ROT,100)
PAGE
;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(471,230703,603700,461607,407600,ROT,1)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(472,230703,603700,143417,017401,ROT,2)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(473,230703,603700,307036,037002,ROT,3)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(474,230703,603700,434170,174011,ROT,5)
;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(475,230703,603700,703603,700230,ROT,11)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(476,230703,603700,701740,114341,ROT,21)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(477,230703,603700,023070,360370,ROT,41)

;SHIFT COUNTER TEST
;TEST SHIFT COUNTER FOR ANY BITS S-A-0/1
	SR1	(500,230703,603700,401143,417017,ROT,101)
SUBTTL	DIAGNOSTIC SECTION - SUPPLEMENTARY SHIFT COUNTER RELIABILITY TEST

ADR=501-3
N=-374-44

	REPEAT	^D15,	<
ADR=ADR+3
N=N+44

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS -1 POSITION
	SR1	(\ADR,230703,603700,114341,701740,ROT,N-1)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS
	SR1	(\<ADR+1>,230703,603700,230703,603700,ROT,N)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS +1 POSITION
	SR1	(\<ADR+2>,230703,603700,461607,407600,ROT,N+1)
PAGE>
N=-374-44

	REPEAT	^D1,	<
ADR=ADR+3
N=N+44

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS -1 POSITION
	SR2	(\ADR,230703,603700,770037,600377,374017,700177,514341,701740,ROTC,N-1)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS
	SR2	(\<ADR+1>,230703,603700,770037,600377,770037,600377,230703,603700,ROTC,N)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS +1 POSITION
	SR2	(\<ADR+2>,230703,603700,770037,600377,760077,400776,461607,407601,ROTC,N+1)
PAGE>
	REPEAT	^D7,	<
ADR=ADR+3
N=N+44

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS -1 POSITION
	SR2	(\ADR,230703,603700,770037,600377,514341,701740,374017,700177,ROTC,N-1)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS
	SR2	(\<ADR+1>,230703,603700,770037,600377,230703,603700,770037,600377,ROTC,N)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS +1 POSITION
	SR2	(\<ADR+2>,230703,603700,770037,600377,461607,407601,760077,400776,ROTC,N+1)
PAGE
ADR=ADR+3
N=N+44

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS -1 POSITION
	SR2	(\ADR,230703,603700,770037,600377,374017,700177,514341,701740,ROTC,N-1)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS
	SR2	(\<ADR+1>,230703,603700,770037,600377,770037,600377,230703,603700,ROTC,N)

;SHIFT COUNTER TEST
;TEST FOR CORRECT ROTATION BY A MULTIPLE OF 36 POSITIONS +1 POSITION
	SR2	(\<ADR+2>,230703,603700,770037,600377,760077,400776,461607,407601,ROTC,N+1)
PAGE>
;SHIFT COUNTER TEST
;TEST FOR MAXIMUM LEFT ROTATION (255 POSITIONS)
	SR1	(633,230703,603700,307036,037002,ROT,377)

;SHIFT COUNTER TEST
;TEST FOR MAXIMUM RIGHT ROTATION -1 (255 POSITIONS)
	SR1	(634,230703,603700,023070,360370,ROT,-377)

;SHIFT COUNTER TEST
;TEST FOR MAXIMUM LEFT ROTATION (255 POSITIONS)
	SR2	(635,230703,603700,770037,600377,700376,003772,307036,037007,ROTC,377)

;SHIFT COUNTER TEST
;TEST FOR MAXIMUM RIGHT ROTATION -1 (255 POSITIONS)
	SR2	(636,230703,603700,770037,600377,077003,760037,723070,360370,ROTC,-377)
;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(637,230703,603700,230703,603700,ROT,400)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(640,230703,603700,230703,603700,ROT,1000)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(641,230703,603700,230703,603700,ROT,2000)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(642,230703,603700,230703,603700,ROT,4000)
PAGE
;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(643,230703,603700,230703,603700,ROT,10000)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(644,230703,603700,230703,603700,ROT,20000)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(645,230703,603700,230703,603700,ROT,40000)

;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(646,230703,603700,230703,603700,ROT,100000)
PAGE
;SHIFT COUNTER TEST
;VERIFY THAT NO ROTATION TO LEFT GREATER THAN 255 POSITIONS CAN OCCUR
;RESULT SHOULD INDICATE NO ROTATION
	SR1	(647,230703,603700,230703,603700,ROT,200000)

;SHIFT COUNTER TEST
;TEST FOR MAXIMUM RIGHT ROTATION (256 POSITIONS)
	SR1	(650,230703,603700,011434,170174,ROT,400000)

;SHIFT COUNTER TEST
;TEST FOR MAXIMUM RIGHT ROTATION (256 POSITIONS)
	SR2	(651,230703,603700,770037,600377,037401,770017,751434,170174,ROTC,400000)
SUBTTL	DIAGNOSTIC SECTION - ACCUMULATOR ADDRESSING TEST

;TEST ACCUMULATOR ADDRESSING
;TEST THE ABILITY OF ROTC,LSHC,ASHC
;TO ADDRESS THE CORRECT ACCUMULATORS
;EACH AC IS LOADED WITH IT'S RESPECTIVE ADDRESS
;TESTING IS ACCOMPLISHED BY SHIFTING/ROTATING
;LEFT ZERO TIMES
;AN ERROR WILL OCCUR IF C(AC),C(AC+1) DIFFER
;FROM AC'S ADDRESSED BY INSTRUCTION
;THE NUMBER OF THE AC REFERENCED IN ERROR
;IS IN AC
;INADVERTENT SHIFTING OR PICKING UP OF
;BITS DURING FAC OR SAC WILL CAUSE AN ERROR

	AC=-2
	ZZ=-2
		;SET UP ACCUMULATOR'S
	REPEAT	^D7,<
	ZZ=ZZ+2
	AC=AC+2
	MOVEI	AC,ZZ		;AC NUMBER TO AC
	MOVEI	AC+1,ZZ+1	;AC NUMBER TO AC+1
>
PAGE
	AC=1
	SAVEAC	(1,1)

SN=41400
	AC=14
	ZZ=14

		;TEST ROTC-ACCUMULATOR'S 7-14
E41400:	REPEAT	^D5,<
;TEST ACCUMULATOR ADDRESSING
;TEST THE ABILITY OF ROTC,LSHC,ASHC
;TO ADDRESS THE CORRECT ACCUMULATORS
;EACH AC IS LOADED WITH IT'S RESPECTIVE ADDRESS
;TESTING IS ACCOMPLISHED BY SHIFTING/ROTATING
;LEFT ZERO TIMES
;AN ERROR WILL OCCUR IF C(AC),C(AC+1) DIFFER
;FROM AC'S ADDRESSED BY INSTRUCTION
;THE NUMBER OF THE AC REFERENCED IN ERROR
;IS IN AC
;INADVERTENT SHIFTING OR PICKING UP OF
;BITS DURING FAC OR SAC WILL CAUSE AN ERROR

SN=SN+1
	ZZ=ZZ-1
	AC=AC-1
	ROTC	AC,0		;*ROTATE LEFT ZERO TIMES
	CAIE	AC,ZZ		;TEST FOR CORRECT AC
	ER3	AC,SN		;INCORRECT AC
	CAIE	AC+1,ZZ+1	;TEST FOR CORRECT AC+1
	ER4	AC,SN		;INCORRECT AC+1
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
	AC=11
	SAVEAC	(1,1)

SN=41500
	AC=12
	ZZ=12

		;TEST LSHC-ACCUMULATORS 5-12
E41500:	REPEAT	^D5,<
;TEST ACCUMULATOR ADDRESSING
;TEST THE ABILITY OF ROTC,LSHC,ASHC
;TO ADDRESS THE CORRECT ACCUMULATORS
;EACH AC IS LOADED WITH IT'S RESPECTIVE ADDRESS
;TESTING IS ACCOMPLISHED BY SHIFTING/ROTATING
;LEFT ZERO TIMES
;AN ERROR WILL OCCUR IF C(AC),C(AC+1) DIFFER
;FROM AC'S ADDRESSED BY INSTRUCTION
;THE NUMBER OF THE AC REFERENCED IN ERROR
;IS IN AC
;INADVERTENT SHIFTING OR PICKING UP OF
;BITS DURING FAC OR SAC WILL CAUSE AN ERROR

SN=SN+1
	ZZ=ZZ-1
	AC=AC-1
	LSHC	AC,0		;*SHIFT LEFT ZERO TIMES
	CAIE	AC,ZZ		;TEST FOR CORRECT AC
	ER3	AC,SN		;INCORRECT AC
	CAIE	AC+1,ZZ+1	;TEST FOR CORRECT AC+1
	ER4	AC,SN		;INCORRECT AC+1
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>


	AC=4
	SAVEAC	(1,1)

SN=41600
	AC=5
	ZZ=5

		;TEST ASHC-ACCUMULATORS 0-5
E41600:	REPEAT	^D5,<
;TEST ACCUMULATOR ADDRESSING
;TEST THE ABILITY OF ROTC,LSHC,ASHC
;TO ADDRESS THE CORRECT ACCUMULATORS
;EACH AC IS LOADED WITH IT'S RESPECTIVE ADDRESS
;TESTING IS ACCOMPLISHED BY SHIFTING/ROTATING
;LEFT ZERO TIMES
;AN ERROR WILL OCCUR IF C(AC),C(AC+1) DIFFER
;FROM AC'S ADDRESSED BY INSTRUCTION
;THE NUMBER OF THE AC REFERENCED IN ERROR
;IS IN AC
;INADVERTENT SHIFTING OR PICKING UP OF
;BITS DURING FAC OR SAC WILL CAUSE AN ERROR

SN=SN+1
	ZZ=ZZ-1
	AC=AC-1
	ASHC	AC,0		;*SHIFT LEFT ZERO TIMES
	CAIE	AC,ZZ		;TEST FOR CORRECT AC
	ER3	AC,SN		;INCORRECT AC
	CAIE	AC+1,ZZ+1	;TEST FOR CORRECT AC+1
	ER4	AC+1,SN		;INCORRECT AC+1
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
PAGE
;	AC=17
;	SAVEAC	(1,1)

SN=41700

		;TEST ASHC-ACUMMULATORS 17-0
E41700:	REPEAT	^D0,<
;TEST ACCUMULATOR ADDRESSING
;TEST THE ABILITY OF ROTC,LSHC,ASHC
;TO ADDRESS THE CORRECT ACCUMULATORS
;EACH AC IS LOADED WITH IT'S RESPECTIVE ADDRESS
;TESTING IS ACCOMPLISHED BY SHIFTING/ROTATING
;LEFT ZERO TIMES
;AN ERROR WILL OCCUR IF C(AC),C(AC+1) DIFFER
;FROM AC'S ADDRESSED BY INSTRUCTION
;THE NUMBER OF THE AC REFERENCED IN ERROR
;IS IN AC
;INADVERTENT SHIFTING OR PICKING UP OF
;BITS DURING FAC OR SAC WILL CAUSE AN ERROR

SN=SN+1
	ASHC	AC,0		;*SHIFT LEFT ZERO TIMES
	CAIE	AC,17		;TEST FOR CORRECT AC
	ER3	AC,SN		;INCORRECT AC
	CAIE	AC+1,0		;TEST FOR CORRECT AC+1
	ER4	AC+1,SN		;INCORRECT AC+1
	JUMPL	AC+2,.-5	;LOOP ON ERROR SWITCH
>
SUBTTL	DIAGNOSTIC SECTION - SUPPLEMENTARY BIT POSITION RELIABILITY TEST

	AC=12
	SAVEAC	(1,1)

SN=42000
	WW=030303		;USED FOR COMPARISON
	XX=030303		;SELECTED PATTERN
	ZZ=0

		;ROT LEFT (011)-TEST AC,AC+1
E42000:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW+WW
	ZZ=ZZ+1
	SETACS (WW,XX)		;SET UP ACCUMULATORS
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD =0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD =0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
PAGE
	AC=14
	SAVEAC	(1,1)

SN=42100
	WW=606060		;USED FOR COMPARISON
	XX=606060		;SELECTED PATTERN
	ZZ=0

		;ROT RIGHT (110)-TEST AC,AC+1
E42100:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW/2
	ZZ=ZZ-1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD =0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD =0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
	AC=13
	SAVEAC	(1,1)

SN=42200
	WW=050505		;USED FOR COMPARISON
	XX=050505		;SELECTED PATTERN
	ZZ=0

		;ROT LEFT (101)-TEST AC,AC+1
E42200:	REPEAT	^D3,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW+WW
	ZZ=ZZ+1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD  = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
PAGE
	AC=12
	SAVEAC	(1,1)

SN=42300
	WW=505050		;USED FOR COMPARISON
	XX=505050		;SELECTED PATTERN
	ZZ=0

		;ROT RIGHT (101)-TEST AC,AC+1
E42300:	REPEAT	^D3,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW/2
	ZZ=ZZ-1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD =0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
	AC=11
	SAVEAC	(1,1)

SN=42400
	WW=070707		;USED FOR COMPARISON
	XX=070707		;SELECTED PATTERN
	ZZ=0

		;ROT LEFT (111)-TEST AC,AC+1
E42400:	REPEAT	^D3,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW+WW
	ZZ=ZZ+1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
PAGE
	AC=10
	SAVEAC	(1,1)

SN=42500
	WW=707070		;USED FOR COMPARISON
	XX=707070		;SELECTED PATTERN
	ZZ=0

		;ROT RIGHT (111)-TEST AC,AC+1
E42500:	REPEAT	^D3,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW/2
	ZZ=ZZ-1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
	AC=7
	SAVEAC	(1,1)

SN=42600
	WW=025025		;USED FOR COMPARISON
	XX=025025		;SELECTED PATTERN
	ZZ=0

		;ROT LEFT (010101)-TEST AC,AC+1
E42600:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW+WW
	ZZ=ZZ+1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
PAGE
	AC=6
	SAVEAC	(1,1)

SN=42700
	WW=520520		;USED FOR COMPARISON
	XX=520520		;SELECTED PATTERN
	ZZ=0

		;ROT RIGHT (101010)-TEST AC,AC+1
E42700:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW/2
	ZZ=ZZ-1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
	AC=5
	SAVEAC	(1,1)

SN=43000
	WW=033033		;USED FOR COMPARISON
	XX=033033		;SELECTED PATTERN
	ZZ=0

		;ROT LEFT (011011)-TEST AC,AC+1
E43000:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW+WW
	ZZ=ZZ+1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
PAGE
	AC=4
	SAVEAC	(1,1)

SN=43100
	WW=660660		;USED FOR COMPARISON
	XX=660660		;SELECTED PATTERN
	ZZ=0

		;ROT RIGHT (110110)-TEST AC,AC+1
E43100:	REPEAT	^D4,<
;TEST SELECTED BIT CONFIGURATIONS
;TEST ABILITY TO ROTATE SELECTED PATTERNS
;AC,AC+1 ARE ROTATED LEFT/RIGHT AND TESTED
;TEST AC-AC-1 IS UTILIZED AS COMPARISON REGISTER
;        ERROR WILL OCCUR IF AC-1 DIFFERS FROM 0
;        AC-1 CONTAINS BIT(S) THAT FAILED
;TEST AC+1-AC IS UTILIZED AS COMPARISON REGISTER
;         ERROR WILL OCCUR IF AC DIFFERS FROM 0
;         AC CONTAINS BIT(S) THAT FAILED

SN=SN+1
	WW=WW/2
	ZZ=ZZ-1
	SETACS (WW,XX)
	ROTC	AC,ZZ		;*ROTATE (N) NUMBER OF TIMES
	XOR	AC-1,AC		;COMPARE AC
	SKIPE	<AC-1>&17	;SHOULD = 0
	ER3	AC,SN		;AC-1 CONTAINS BIT(S) THAT FAILED
	XOR	AC-2,<AC+1>&17	;COMPARE AC+1
	SKIPE	<AC-2>&17	;SHOULD = 0
	ER4	AC+1,SN		;AC CONTAINS BIT(S) THAT FAILED
	JUMPL	AC+2,.-^D13	;LOOP ON ERROR SWITCH
>
SUBTTL	DIAGNOSTIC SECTION - ARITHMETIC OVERFLOW FLAG TEST

;TEST AROV FLAG-ASH,ASHC
;TEST THE ABILITY OF ASH,ASHC TO
;SET AROV FLAG
;TEST (00),(11) FOR SET NOT CONDITION
;TEST (01),(10) FOR SET CONDITION
;AN ERROR WILL OCCUR IF FLAG IS
;SET/SET NOT AS APPROPRIATE

	AC=10
	SAVEAC	(1,1)

				;ASH AROV SET NOT (11)
E43200:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,-1		;SET LEFT,CLEAR RIGHT
	ASH	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET NOT COND
	JRST	0,.+2		;FLAG NOT SET
	ER13	AC-2,43201	;FLAG IS SET
	JUMPL	AC+2,E43200	;LOOP ON ERROR SWITCH

				;ASH AROV SET NOT (00)
E43300:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	SETZ	AC,		;CLEAR AC
	ASH	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET NOT COND
	JRST	0,.+2		;FLAG NOT SET
	ER13	AC-2,43301	;FLAG IS SET
	JUMPL	AC+2,E43300	;LOOP ON ERROR SWITCH
PAGE
	AC=7
	SAVEAC	(1,1)

				;ASH AROV SET (01)
E43400:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,377777	;CLEAR 0 AND RIGHT HALF
	ASH	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET COND
	ER13	AC-2,43401	;FLAG IS NOT SET
	JUMPL	AC+2,E43400	;LOOP ON ERROR SWITCH

				;ASH AROV SET (10)
E43500:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,400000	;SET BIT 0
	ASH	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET COND
	ER13	AC-2,43501	;FLAG IS NOT SET
	JUMPL	AC+2,E43500	;LOOP ON ERROR SWITCH
	AC=10
	SAVEAC	(1,1)

				;ASHC AROV SET NOT (11)
E43600:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,-1		;SET LEFT, CLEAR RIGHT
	ASHC	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET NOT COND
	JRST	0,.+2		;FLAG NOT SET
	ER13	AC-2,43601	;FLAG IS SET
	JUMPL	AC+2,E43600	;LOOP ON ERROR SWITCH


				;ASHC AROV SET NOT (00)
E43700:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	SETZ	AC,		;CLEAR AC
	ASHC	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET NOT COND
	JRST	0,.+2		;FLAG NOT SET
	ER13	AC-2,43701	;FLAG IS SET
	JUMPL	AC+2,E43700	;LOOP ON ERROR SWITCH

	AC=7
	SAVEAC	(1,1)

				;ASHC AROV SET (01)
E44000:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,377777	;CLEAR 0 AND RIGHT HALF
	ASHC	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET COND
	ER13	AC-2,44001	;FLAG IS NOT SET
	JUMPL	AC+2,E44000	;LOOP ON ERROR SWITCH

				;ASHC AROV SET (10)
E44100:	JFCL	10,.+1		;CLR FLAG EXEC NEXT INST
	MOVSI	AC,400000	;SET BIT 0
	ASHC	AC,1		;*SHIFT LEFT ONE
	JSP	AC-2,.+1	;SAVE FLAGS
	JFCL	10,.+2		;TEST FOR SET COND
	ER13	AC-2,44101	;FLAG IS NOT SET
	JUMPL	AC+2,E44100	;LOOP ON ERROR SWITCH
SUBTTL	DIAGNOSTIC SECTION - TEST INDEXING, INDIRECT ADDRESSING AND XCT OF ROT

;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN IT IS
;INDEXED.  THE NUMBER OF BIT POSITIONS SHIFTED IS EQUAL TO E + C(X),
;WHERE E IS THE ADDRESS PORTION OF THE INSTRUCTION WORD AND X IS THE INDEX REG.
;IN THIS CASE, C(AC)=230703,,603700, E=0, X=6 AND C(X)=3;
;HENCE, THE NET ROTATION SHOULD BE 3 BIT POSITIONS LEFT,
;AND THE RESULT IN THE AC SHOULD BE 307036,,037002

	AC=7
	SAVEAC	(1,1)

E70000:	MOVEI	6,3			;PRELOAD INDEX REG WITH 3
	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	ROT	AC,(6)			;*ROT C(AC) 3 BIT POSITIONS LEFT
	CAME	AC,[307036,,037002]	;IS RESULT IN AC CORRECT?
	ER3	AC,70001		;INDEXING FAILED
	JUMPL	AC+2,E70000		;LOOP ON ERROR SWITCH

;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN IT IS
;INDEXED.  THE NUMBER OF BIT POSITIONS SHIFTED IS EQUAL TO E + C(X),
;WHERE E IS THE ADDRESS PORTION OF THE INSTRUCTION WORD AND X IS THE INDEX REG.
;IN THIS CASE, C(AC)=230703,,603700, E=4, X=5 AND C(X)=0;
;HENCE, THE NET ROTATION SHOULD BE 4 BIT POSITIONS LEFT,
;AND THE RESULT IN THE AC SHOULD BE 616074,,076004.

E70100:	MOVEI	5,0			;PRELOAD INDEX REG WITH 0
	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	ROT	AC,4(5)			;*ROT C(AC) 4 BIT POSITIONS LEFT
	CAME	AC,[616074,,076004]	;IS RESULT IN AC CORRECT?
	ER3	AC,70101		;INDEXING FAILED
	JUMPL	AC+2,E70100		;LOOP ON ERROR SWITCH
;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN IT IS
;INDEXED.  THE NUMBER OF BIT POSITIONS SHIFTED IS EQUAL TO E + C(X),
;WHERE E IS THE ADDRESS PORTION OF THE INSTRUCTION WORD AND X IS THE INDEX REG.
;IN THIS CASE, C(AC)=230703,,603700, E=16, X=6 AND C(X)=5;
;HENCE, THE NET ROTATION SHOULD BE 21 BIT POSITIONS LEFT,
;AND THE RESULT IN THE AC SHOULD BE 407600,,461607.

E70200:	MOVEI	6,5			;PRELOAD INDEX REG WITH 5
	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	ROT	AC,16(6)		;*ROT C(AC) 21 BIT POSITIONS LEFT
	CAME	AC,[407600,,461607]	;IS RESULT IN AC CORRECT?
	ER3	AC,70201		;INDEXING FAILED
	JUMPL	AC+2,E70200		;LOOP ON ERROR SWITCH
;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN E IS
;INDIRECTLY ADDRESSED.  THE NUMBER OF BIT POSITIONS SHIFTED IS EQUAL TO C(E),
;WHERE E IS THE ADDRESS PORTION OF THE INSTRUCTION WORD.
;IN THIS CASE, C(AC)=230703,,603700, E=6 AND C(E)=35;
;HENCE, THE NET ROTATION SHOULD BE 35 BIT POSITIONS LEFT,
;AND THE RESULT IN THE AC SHOULD BE 401143,,417017.

E70300:	MOVEI	6,35			;PRELOAD E WITH 35
	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	ROT	AC,@6			;*ROT C(AC) 35 BIT POSITIONS LEFT
	CAME	AC,[401143,,417017]	;IS RESULT IN AC CORRECT?
	ER3	AC,70301		;INDIRECT ADDRESSING FAILED
	JUMPL	AC+2,E70400		;LOOP ON ERROR SWITCH

;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN E IS
;INDIRECTLY ADDRESSED.  THE NUMBER OF BIT POSITIONS SHIFTED IS EQUAL TO THE RIGHT HALF OF C(E),
;WHERE E IS THE ADDRESS PORTION OF THE INSTRUCTION WORD.
;IN THIS CASE, C(AC)=230703,,603700, E=[0,,1] AND C(E)=15;
;HENCE, THE NET ROTATION SHOULD BE 1 BIT POSITION LEFT,
;AND THE RESULT IN THE AC SHOULD BE 461607,,407600.

E70400:	SETOM	1		;PRELOAD AC1 WITH -1,,-1 IN CASE IND. ADR. FAILS
	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	ROT	AC,@[0,,1]		;*ROT C(AC) 1 BIT POSITION LEFT
	CAME	AC,[461607,,407600]	;IS RESULT IN AC CORRECT?
	ER3	AC,70401		;INDIRECT ADDRESSING FAILED
	JUMPL	AC+2,E70400		;LOOP ON ERROR SWITCH
;THIS TEST VERIFIES THAT THE ROT INSTRUCTION FUNCTIONS CORRECTLY WHEN IT IS
;EXECUTED BY AN XCT INSTRUCTION.
;IN THIS CASE, C(AC)=230703,,603700 AND E=2.
;HENCE, THE NET ROTATION SHOULD BE 2 BIT POSITIONS LEFT,
;AND THE RESULT IN THE AC SHOULD BE 143417,,017401.

E70500:	MOVE	AC,[230703,,603700]	;INITIALIZE AC WITH 230703,,603700
	XCT	[ROT AC,2]	;*XCT SHOULD ROT C(AC) 2 BIT POSITIONS LEFT
	CAME	AC,[143417,,017401]	;IS RESULT IN AC CORRECT?
	ER3	AC,70501		;XCT OF ROT FAILED
	JUMPL	AC+2,E70500		;LOOP ON ERROR SWITCH

	JRST	BEGEND		;REPEAT DIAGNOSTIC