This machine uses the 3rd ROM BIOS that IBM released for the PC AT, a revision that included support for 3.5-inch 1.44Mb diskettes – which will be nice, because I have a number of 1.44Mb diskette images I would like to be able to read in a PCjs machine.
Since machines with this BIOS also ran at 8Mhz, I’ve bumped the CPU speed up to 8,000,000 cycles/second. It’ll be interesting to see whether this BIOS also increased any of its hard-coded timing delay-loops as a result.
Anyway, when I enabled ChipSet I/O port messages in the Debugger:
m chipset on m port on
I can see that the BIOS Power-On Self Test (POST) progresses nicely until it starts generating lots of port 0x61 activity:
chipset.inPort(0x0061,8042_RWREG): 0x30 at F000:05A8 chipset.inPort(0x0061,8042_RWREG): 0x20 at F000:05AE
I know what I’m going to be doing this afternoon now.
October 13, 2014